Differential Fluid Etching Apparatus Patents (Class 156/345.1)
  • Publication number: 20130220364
    Abstract: Methods and apparatus for the cleaning reactor box chambers using molecular fluorine as the cleaning material. The molecular fluorine is dissociated in-situ in the chamber using the chamber RF power source.
    Type: Application
    Filed: August 11, 2011
    Publication date: August 29, 2013
    Inventors: Jean-Charles Cigal, Stefan Petri, Paul Alan Stockman, Oliver Knieling
  • Patent number: 8518827
    Abstract: Methods and apparatus for spectrum-based endpointing. An endpointing method includes selecting a reference spectrum. The reference spectrum is a spectrum of white light reflected from a film of interest on a first substrate and has a thickness greater than a target thickness. The reference spectrum is empirically selected for particular spectrum-based endpoint determination logic so that the target thickness is achieved when endpoint is called by applying the particular spectrum-based endpoint logic. The method includes obtaining a current spectrum. The current spectrum is a spectrum of white light reflected from a film of interest on a second substrate when the film of interest is being subjected to a polishing step and has a current thickness that is greater than the target thickness. The method includes determining, for the second substrate, when an endpoint of the polishing step has been achieved. The determining is based on the reference and current spectra.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: August 27, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Dominic J. Benvegnu, Jeffrey Drue David, Boguslaw A. Swedek
  • Patent number: 8506711
    Abstract: An flat-panel display (FPD) manufacturing apparatus is provided. The apparatus is flexibly configured so that it is capable of easily processing large-size substrates while also simplifying manufacturing, transporting, operating, and repair processes.
    Type: Grant
    Filed: January 23, 2009
    Date of Patent: August 13, 2013
    Assignee: Advanced Display Process Engineering Co., Ltd.
    Inventors: Young Jong Lee, Jun Young Choi, Saeng Hyun Jo, Byung-Oh Yoon, Gyeong-Hoon Kim, Hong-Gi Jeong
  • Patent number: 8500907
    Abstract: The invention relates to a masking system for masking a cylinder bore (2) of a combustion engine (3) during a thermal coating procedure including a masking body (4) which can be placed during the thermal coating of a first cylinder (5) of the combustion engine (3) in the cylinder bore (2) of a second cylinder (7) to cover a cylinder wall (6) of the second cylinder (7). In this arrangement the masking body (4) is designed in such a way that a flow gap (10) of predeterminable breadth can be set between the masking body (4) and the cylinder wall (6) of the second cylinder (7) for the production of a flow (8) of a fluid (9).
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: August 6, 2013
    Assignee: Sulzer Metco AG
    Inventors: Christian Bohnheio, Gerard Barbezat
  • Publication number: 20130192460
    Abstract: Technologies are generally described for perforated graphene monolayers and membranes containing perforated graphene monolayers. An example membrane may include a graphene monolayer having a plurality of discrete pores that may be chemically perforated into the graphene monolayer. The discrete pores may be of substantially uniform pore size. The pore size may be characterized by one or more carbon vacancy defects in the graphene monolayer. The graphene monolayer may have substantially uniform pore sizes throughout. In some examples, the membrane may include a permeable substrate that contacts the graphene monolayer and which may support the graphene monolayer. Such perforated graphene monolayers, and membranes comprising such perforated graphene monolayers may exhibit improved properties compared to conventional polymeric membranes for gas separations, e.g., greater selectivity, greater gas permeation rates, or the like.
    Type: Application
    Filed: January 26, 2012
    Publication date: August 1, 2013
    Applicant: Empire Technology Development, LLC
    Inventors: Seth A. Miller, Gary L. Duerksen
  • Publication number: 20130192756
    Abstract: A sealing apparatus is provided herein. In some embodiments, the sealing apparatus includes an annular body including a first portion having a circular cross-section and a second portion extending radially outward from the first portion, wherein the second portion has a rectangular cross-section. In some embodiments, a sealing apparatus includes a body configured to be retained in a recess of a first surface; an arm extending from the body away from the first surface and configured to provide a force when deflected towards the body by a second surface to form a seal between the first surface and the second surface.
    Type: Application
    Filed: March 13, 2013
    Publication date: August 1, 2013
    Applicant: APPLIED MATERIALS, INC.
    Inventor: APPLIED MATERIALS, INC.
  • Publication number: 20130187546
    Abstract: In some embodiments, the present disclosure relates to a plasma processing system that generates a magnetic field having a maximum strength that is independent of workpiece size. The plasma processing system has a plurality of side electromagnets that have a size which is independent of the workpiece size. The side electromagnets are located around a perimeter of a processing chamber configured to house a semiconductor workpiece. When a current is provided to the side electromagnets, separate magnetic fields emanate from separate positions around the workpiece. The separate magnetic fields contribute to the formation of an overall magnetic field that controls the distribution of plasma within the processing chamber. Because the size of the plurality of separate side magnets is independent of the workpiece size, the plurality of side magnets can generate a magnetic field having a maximum field strength that is independent of workpiece size.
    Type: Application
    Filed: January 20, 2012
    Publication date: July 25, 2013
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Bo-Hung Lin, Ming-Chih Tsai, Chia-Ho Chen, Chung-En Kao
  • Patent number: 8486291
    Abstract: In the present invention, provided is a plasma processing method which reduces or eliminates the emission of contaminating matters caused by a quality-altered layer on the surface of yttria of a processing chamber's inner wall and parts inside the processing chamber. It is the plasma processing method including an etching step of setting a sample inside the processing chamber, and etching the sample, a deposition-product removing step of removing a deposition product by using a plasma, the deposition product being deposited inside the processing chamber by the etching step, the plasma being generated using a gas which contains fluorine or chlorine, and a step of exposing, to a rare-gas-based plasma, the inside of the processing chamber after the deposition-product removing step.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: July 16, 2013
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Takeshi Ohmori, Yasuhiro Nishimori, Hiroaki Ishimura, Hitoshi Kobayashi, Masamichi Sakaguchi
  • Patent number: 8486222
    Abstract: A substrate processing apparatus includes a processing chamber configured to process a substrate, a substrate support member provided within the processing chamber to support the substrate, a microwave generator provided outside the processing chamber, a waveguide launch port configured to supply a microwave generated by the microwave generator into the processing chamber, wherein the central position of the waveguide launch port is deviated from the central position of the substrate supported on the substrate support member and the waveguide launch port faces a portion of a front surface of the substrate supported on the substrate support member, and a control unit configured to change a relative position of the substrate support member in a horizontal direction with respect to the waveguide launch port.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: July 16, 2013
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Tokunobu Akao, Unryu Ogawa, Masahisa Okuno, Shinji Yashima, Atsushi Umekawa, Kaichiro Minami
  • Patent number: 8486798
    Abstract: A replaceable chamber element for use in a plasma processing system, such as a plasma etching system, is described. The replaceable chamber element includes a chamber component configured to be exposed to plasma in a plasma processing system, wherein the chamber component is fabricated to include a semiconductor junction, and wherein a capacitance of the chamber component is varied when a voltage is applied across the semiconductor junction.
    Type: Grant
    Filed: February 5, 2012
    Date of Patent: July 16, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Zhiying Chen, Jianping Zhao, Lee Chen, Merritt Funk, Radha Sundararajan
  • Publication number: 20130168019
    Abstract: One aspect related to a system configured to split a processed semiconductor wafer. The semiconductor wafer comprises a brittle material and has at least one layer formed on a first surface of the semiconductor wafer. At least one trench is etched in the first surface and through the at least one layer thereby forming a line on the surface where at least some of the brittle material is removed. Provided are means for splitting the semiconductor wafer into separate pieces along the line.
    Type: Application
    Filed: March 1, 2013
    Publication date: July 4, 2013
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventor: Infineon Technologies Austria AG
  • Patent number: 8475622
    Abstract: A method of reusing a consumable part for use in a plasma processing apparatus includes cleaning a surface of the consumable part made of SiC that has been eroded by a first plasma process performed for a specific period of time. The method further includes depositing SiC on the cleaned surface of the eroded consumable part by CVD. The method also includes remanufacturing a consumable part having a predetermined shape by machining the eroded consumable part on which the SiC is deposited for performing a second plasma process on a substrate by using the remanufactured consumable part.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: July 2, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Nobuyuki Nagayama, Naoyuki Satoh, Keiichi Nagakubo, Kazuya Nagaseki
  • Publication number: 20130160795
    Abstract: In some embodiments, the present disclosure relates to a plasma etching system having direct and localized plasma sources in communication with a processing chamber. The direct plasma is operated to provide a direct plasma to the processing chamber for etching a semiconductor workpiece. The direct plasma has a high potential, formed by applying a large bias voltage to the workpiece. After etching is completed the bias voltage and direct plasma source are turned off. The localized plasma source is then operated to provide a low potential, localized plasma to a position within the processing chamber that is spatially separated from the workpiece. The spatial separation results in formation of a diffused plasma having a zero/low potential that is in contact with the workpiece. The zero/low potential of the diffused plasma allows for reactive ashing to be performed, while mitigating workpiece damage resulting from ion bombardment caused by positive plasma potentials.
    Type: Application
    Filed: December 27, 2011
    Publication date: June 27, 2013
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ying Xiao, Chin-Hsiang Lin
  • Publication number: 20130143411
    Abstract: Disclosed are systems and methods for improving front-side process uniformity by back-side metallization. In some implementations, a metal layer can be formed on the back side of a semiconductor wafer prior to certain process steps such as plasma-based processes. Presence of such a back-side metal layer reduces variations in, for example, thickness of a deposited and/or etched layer resulting from the plasma-based processes. Such reduction in thickness variations can result from reduced variation in radio-frequency (RF) coupling during the plasma-based processes. Various examples of wafer types, back-side metal layer configurations, and plasma-based processes are disclosed.
    Type: Application
    Filed: November 15, 2012
    Publication date: June 6, 2013
    Applicant: SKYWORKS SOLUTIONS, INC.
    Inventor: Skyworks Solutions, Inc.
  • Publication number: 20130134126
    Abstract: A technique, comprising defining at least part of one or more electronic devices on a substrate sheet by means of one or more material removal processes, wherein the substrate sheet is arranged on a lower layer so as to overhang said lower layer more at a first end than it does at an opposite, second end; and removing loose material from under said overhang at said first end by means of a stream of gas directed at said substrate and said lower layer from an outlet, said stream of gas having at said outlet at least a directional component parallel to a direction from said second end to said first end.
    Type: Application
    Filed: June 3, 2011
    Publication date: May 30, 2013
    Applicant: PLASTIC LOGIC LIMITED
    Inventors: Dorota Kowal-Paul, Enrico Bellmann, Oisin Kenny, Stefan Ruckmich
  • Publication number: 20130131825
    Abstract: The present invention relates to a novel bone graft and methods for producing said graft. Said bone graft can be used for surgical, plastic and/or cosmetic bone replacement for a patient in need thereof. The bone graft is made of a scaffold or matrix of sheet material having a 3-dimensional pattern of a continuous network of voids and/or indentations for enhancing new bone growth.
    Type: Application
    Filed: November 23, 2011
    Publication date: May 23, 2013
    Applicant: AMENDIA INC.
    Inventor: Timothy Ganey
  • Publication number: 20130126094
    Abstract: Disclosed is a substrate processing apparatus with an improved structure to reduce impurities in a chamber being attached to a substrate during processing of the substrate. The substrate processing apparatus generates plasma to process a substrate and includes a sidewall configured to receive the substrate on a receiving portion surrounded by the sidewall and a dielectric coupled to an upper part of the sidewall configured to hermetically seal the receiving portion, wherein the dielectric includes a shielding portion protruding from a bottom of the dielectric opposite the substrate to an inside of the receiving portion and a curved portion in a region at which the bottom and the shielding portion are connected to each other.
    Type: Application
    Filed: November 23, 2012
    Publication date: May 23, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: SAMSUNG ELECTRONICS CO., LTD.
  • Publication number: 20130129922
    Abstract: This disclosure provides systems, methods and apparatus for processing multiple substrates in a batch cluster tool. A batch cluster tool can include a transfer chamber, an etch process chamber, and one or both of an ALD process chamber and an SAM process chamber. Multiple substrates are transferred from a transfer chamber into an etch chamber. The substrates are exposed to a vapor phase etchant. The substrates can then transferred to an atomic layer deposition (ALD) chamber and exposed to vapor phase reactants to form a thin film on the substrates by ALD. The substrates can be transferred either from the etch process chamber or the ALD chamber to a third chamber and exposed to vapor phase reactants to form a self-assembled monolayer (SAM) on the substrates.
    Type: Application
    Filed: November 21, 2011
    Publication date: May 23, 2013
    Applicant: QUALCOMM MEMS TECHNOLOGIES, INC.
    Inventors: Teruo Sasagawa, Leonard Eugene Fennell
  • Publication number: 20130126092
    Abstract: In one embodiment, a plasma processing assembly may include an upper process body coupled to a hinge body and a lower process body coupled to a base hinge member. The hinge body can be pivotally engaged with the base hinge member. A self locking latch can be pivotally engaged with the base hinge member. When the hinge body is rotated around the first axis of rotation, the protruding latch engagement member can contact the self locking latch and can rotate the self locking latch around the second axis of rotation opposite to the bias direction. The self locking latch can rotate around the second axis of rotation in the bias direction and can block the hinge body from rotating around the first axis of rotation.
    Type: Application
    Filed: December 9, 2011
    Publication date: May 23, 2013
    Applicant: LAM RESEARCH CORPORATION
    Inventor: Greg Sexton
  • Publication number: 20130118686
    Abstract: A liner for a semiconductor processing chamber and a semiconductor processing chamber are provided. In one embodiment, a liner for a semiconductor processing chamber includes a body having an outwardly extending flange. A plurality of protrusions extend from a bottom surface of the flange. The protrusions have a bottom surface defining a contact area that is asymmetrically distributed around the bottom surface of the flange.
    Type: Application
    Filed: October 1, 2012
    Publication date: May 16, 2013
    Applicant: Applied Materials, Inc.
    Inventors: James D. Carducci, Kallol Bera, Nipun Misra, Larry D. Elizaga
  • Patent number: 8440048
    Abstract: A load lock includes a chamber including an upper portion, a lower portion, and a partition between the upper portion and the lower portion, the partition including an opening therethrough. The load lock further includes a first port in communication with the upper portion of the chamber and a second port in communication with the lower portion of the chamber. The load lock includes a rack disposed within the chamber and a workpiece holder mounted on a first surface of the rack, wherein the rack and the workpiece holder are movable by an indexer that is capable of selectively moving wafer slots of the rack into communication with the second port. The indexer can also move the rack into an uppermost position, at which the first surface of the boat and the partition sealingly separate the upper portion and the lower portion to define an upper chamber and a lower chamber. Auxiliary processing, such as wafer pre-cleaning, or metrology can be conducted in the upper portion.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: May 14, 2013
    Assignee: ASM America, Inc.
    Inventors: Ravinder Aggarwal, Jeroen Stoutjesdijk, Eric Hill, Loring G. Davis, John T. DiSanto
  • Publication number: 20130112337
    Abstract: A manufacturing method of a shower plate includes inserting a green body, a degreasing body, a temporary sintered body or a sintered body of a ceramic member, which has a plurality of gas discharge holes or gas flow holes, into a longitudinal hole of a green body, a degreasing body or a temporary sintered body of the shower plate, which has been formed by power ingredients; and sintering them simultaneously.
    Type: Application
    Filed: December 28, 2012
    Publication date: May 9, 2013
    Applicants: NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITY, TOKYO ELECTRON LIMITED
    Inventors: Tokyo Electron Limited, National University Corporation Tohoku University
  • Publication number: 20130109187
    Abstract: Post etch treatments (PETs) of low-k dielectric films are described. For example, a method of patterning a low-k dielectric film includes etching a low-k dielectric layer disposed above a substrate with a first plasma process. The etching involves forming a fluorocarbon polymer on the low-k dielectric layer. The low-k dielectric layer is surface-conditioned with a second plasma process. The surface-conditioning removes the fluorocarbon polymer and forms an Si—O-containing protecting layer on the low-k dielectric layer. The Si—O-containing protecting layer is removed with a third plasma process.
    Type: Application
    Filed: October 5, 2012
    Publication date: May 2, 2013
    Inventors: Srinivas D. Nemani, Nicolas J. Bright, Thorsten B. Lill, Yifeng Zhou, Jamie Saephan, Ellie Yieh
  • Publication number: 20130105082
    Abstract: Provided are a substrate processing device and an impedance matching method. The substrate processing device includes: a high frequency power source for generating high frequency power; a process chamber for performing a plasma process by using the high frequency power; a matching circuit for compensating for a changed impedance of the process chamber; and a transformer disposed between the process chamber and the matching circuit in order to reduce the impedance of the process chamber.
    Type: Application
    Filed: October 31, 2012
    Publication date: May 2, 2013
    Applicant: Semes Co., Ltd.
    Inventor: Semes Co., Ltd.
  • Publication number: 20130095666
    Abstract: Plasma confinement rings are adapted to reach sufficiently high temperatures on plasma-exposed surfaces of the rings to substantially reduce polymer deposition on those surfaces. The plasma confinement rings include an RF lossy material effective to enhance heating at portions of the rings. A low-emissivity material can be provided on a portion of the plasma confinement ring assembly to enhance heating effects.
    Type: Application
    Filed: December 6, 2012
    Publication date: April 18, 2013
    Applicant: LAM RESEARCH CORPORATION
    Inventor: LAM RESEARCH CORPORATION
  • Publication number: 20130095665
    Abstract: A substrate processing system comprises a first processing module in which a process gas is supplied to a substrate to etch a silicon oxide layer formed on the substrate and a second processing module in which an activated oxygen gas is supplied to the substrate. With the system and a method using the same, the silicon oxide layer can be etched and a condensation layer and/or fumes and/or photoresist residues can be removed in a cost-effective way.
    Type: Application
    Filed: November 29, 2012
    Publication date: April 18, 2013
    Applicant: TES CO. LTD.
    Inventor: TES CO. LTD.
  • Patent number: 8398777
    Abstract: A pedestal positioning assembly system for use in a substrate processing system includes a pedestal rigidly attached to a pedestal shaft, a reference rigidly attached to the substrate processing system, a lateral adjustment assembly to adjust a lateral location of the pedestal relative to the reference, and a vertical adjustment assembly to adjust a tilt of the pedestal relative to the reference. The lateral adjustment assembly and the vertical adjustment assembly are external to a processing chamber and are coupled to the pedestal disposed within the processing chamber through the pedestal shaft. The reference can be a ring and the lateral adjustment assembly substantially centers the pedestal within the ring. A method of adjusting a pedestal includes leveling the pedestal, translating the pedestal, calibrating the pedestal height to a preheat ring level, and checking the level and location of the pedestal while rotating the pedestal.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: March 19, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Richard O. Collins, Kailash Kiran Patalay, Jean R. Vatus, Zhepeng Cong
  • Patent number: 8398775
    Abstract: The present invention comprises an electrode arrangement for a coating device with a stationary first electrode (3) and a second movable electrode (18), whose principle surfaces are opposing each other during coating, wherein the second electrode (18) may be moved along a plane parallel to the opposing principle surfaces, wherein at least one end face of an electrode running transversely to the principal surface an electrical shield (12, 19, 13) is provided, which extends at least partially parallel to the end face of one electrode, wherein at least one part (14) of the shield is formed so as to be movable.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: March 19, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Frank Stahr, Ulf Stephan, Olaff Steinke, Klaus Schade
  • Patent number: 8388755
    Abstract: The present invention relates to the field of semiconductor processing and provides apparatus and methods that improve chemical vapor deposition (CVD) of semiconductor materials by promoting more efficient thermalization of precursor gases prior to their reaction. In preferred embodiments, the invention comprises heat transfer structures and their arrangement within a CVD reactor so as to promote heat transfer to flowing process gases. In certain preferred embodiments applicable to CVD reactors transparent to radiation from heat lamps, the invention comprises radiation-absorbent surfaces placed to intercept radiation from the heat lamps and to transfer it to flowing process gases.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: March 5, 2013
    Assignee: Soitec
    Inventors: Chantal Arena, Christiaan J. Werkhoven, Ronald Thomas Bertram, Jr., Ed Lindow
  • Publication number: 20130048600
    Abstract: The present invention provides a method for creating an optical feature, including: providing a substrate; creating one or more volumetric periodic/non-periodic structures on the substrate; and micromachining the one or more volumetric periodic/non-periodic structures on the substrate to create the optical feature. Optionally, the substrate is a photomaterial. The one or more volumetric periodic/non-periodic structures are aligned one or more of substantially perpendicular to, substantially parallel to, and substantially at an angle to the substrate. The one or more volumetric periodic/non-periodic structures have a predetermined frequency, orientation, and angle. Optionally, different portions of the one or more volumetric periodic/non-periodic structures are subjected to different degrees and/or shapes of micromachining.
    Type: Application
    Filed: July 19, 2012
    Publication date: February 28, 2013
    Applicant: CYBERNETIC INDUSTRIAL CORPORATION OF GEORGIA
    Inventor: Vitali PRISACAR
  • Publication number: 20130052830
    Abstract: Provided is a plasma reactor having a dual inductively coupled plasma source that includes a plasma reactor body having a substrate processing area and a dielectric window which comes in contact with the substrate processing area; and a plasma source including a first antenna for providing first induced electromotive force for generating plasma onto a central area of the substrate processing area through the dielectric window and a second antenna for providing second induced electromotive force for generating the plasma onto an outer area of the substrate processing area, wherein a TSV is formed at a target substrate within the substrate processing area by repeatedly performing a deposition process and an etch process using the plasma generated through the dual inductively coupled plasma source.
    Type: Application
    Filed: December 27, 2011
    Publication date: February 28, 2013
    Inventors: Gyoo-Dong KIM, Dae-Kyu Choi
  • Patent number: 8383001
    Abstract: There is provided a plasma etching method capable of achieving a sufficient organic film modifying effect by high-velocity electrons. In forming a hole in an etching target film by plasma etching, a first condition of generating plasma within a processing chamber by way of turning on a plasma-generating high frequency power application unit and a second condition of not generating the plasma within the processing chamber by way of turning off the plasma-generating high frequency power application unit are repeated alternately. Further, a negative DC voltage is applied from a first DC power supply such that an absolute value of the applied negative DC voltage during a period of the second condition is greater than an absolute value of the applied negative DC voltage during a period of the first condition.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: February 26, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Hiromasa Mochiki, Yoshinobu Ooya, Fumio Yamazaki, Toshio Haga
  • Patent number: 8381677
    Abstract: A method and apparatus for processing a substrate are provided. The chamber body comprises a chamber bottom and a sidewall having a slit valve. A substrate support comprising a support body is disposed in the chamber body. A first end of at least one wide RF ground strap is coupled with the support body and a second end of at least one RF ground strap is coupled with the chamber bottom. At least one extension bar is positioned along a peripheral edge of the support body. The method comprises providing a processing chamber having a slit valve and a substrate support, providing RF power to a distribution plate disposed over the substrate support, flowing gas through the distribution plate, plasma processing a substrate disposed on the substrate support, and reducing the generation of plasma adjacent to the slit valve.
    Type: Grant
    Filed: December 13, 2007
    Date of Patent: February 26, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Beom Soo Park, Robin L. Tiner, Soo Young Choi, John M. White
  • Patent number: 8366827
    Abstract: Disclosed are chamber inserts and apparatuses using the chamber inserts. A chamber insert may include a cylindrical body portion including a top end portion and a bottom end portion, a first protruding portion extending outwardly from a first portion of the cylindrical body portion, the first portion positioned circumferentially along the cylindrical body portion and a second protruding portion extending outwardly from a second portion of the cylindrical body portion, the second portion positioned circumferentially along less than all of the cylindrical body portion. In another example, the chamber insert may include a cylindrical body portion including a top end portion and a bottom end portion, the cylindrical body portion including a slit and at least one hole, the slit and the at least one hole positioned circumferentially along the cylindrical body portion and a first protruding portion extending outwardly from a first portion of the cylindrical body portion.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: February 5, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hun Seo, Jin-Gi Hong, Kyung-Bum Koo, Yun-Ho Choi, Eun-Taeck Lee, Hyun Chul Kwun
  • Publication number: 20130029492
    Abstract: A plasma processing method and a plasma processing apparatus in which a stable process region can be ensured in a wide range, from low microwave power to high microwave power. The plasma processing method includes making production of plasma easy in a region in which production of plasma by continuous discharge is difficult, and plasma-processing an object to be processed, with the generated plasma, wherein the plasma is produced by pulsed discharge in which ON and OFF are repeated, radio-frequency power for producing the pulsed discharge, during an ON period, is a power to facilitate production of plasma by continuous discharge, and a duty ratio of the pulsed discharge is controlled so that an average power of the radio-frequency power per cycle is power in the region in which production of plasma by continuous discharge is difficult.
    Type: Application
    Filed: February 1, 2012
    Publication date: January 31, 2013
    Inventors: Yoshiharu INOUE, Tetsuo ONO, Michikazu MORIMOTO, Masaki FUJII, Masakazu MIYAJI
  • Patent number: 8357262
    Abstract: Disclosed is a corrosion resistant member comprising a sintered material having an ?-Al2O3 crystal and an YAG (yttrium-aluminum-garnet) crystal. The corrosion resistant member contains metal elements, 70 to 98% by mass (inclusive) of Al in terms of Al2O3 and 2 to 30% by mass of Y in terms of Y2O3. The corrosion resistant member has a peak intensity ratio I116/I104 within the range from 0.94 to 1.98, preferably. 2.21 or higher, wherein I116 and I104 represent peak intensities attributed to the (116) face and the (104) face, respectively, of an ?-Al2O3 crystal as measured by X-ray diffractometry on its surface layer.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: January 22, 2013
    Assignee: Kyocera Corporation
    Inventors: Masahiro Nakahara, Tetsuji Hayasaki, Yoshihiro Okawa
  • Publication number: 20130017668
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a split-beam laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Application
    Filed: July 11, 2011
    Publication date: January 17, 2013
    Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar, Aparna Iyer
  • Publication number: 20130014898
    Abstract: A plasma processing system comprising of a plasma source having a source enclosure for generating plasma is provided. The plasma processing system also includes a plasma breaker disposed inside the source enclosure. The plasma breaker has a plurality of trenches wherein at least one of the trenches has a sufficiently high aspect ratio such that materials deposited inside the source enclosure covers a surface of the plasma breaker without being deposited at a bottom of at least one of the trenches for at least a time period (t).
    Type: Application
    Filed: July 11, 2011
    Publication date: January 17, 2013
    Inventor: Hariharakeshava Sarpangala Hegde
  • Publication number: 20130017672
    Abstract: A plasma treatment method includes: creating a plasma from a mixed gas containing carbon and nitrogen to generate CN active species, and treating a surface of a semiconductor substrate with the CN active species.
    Type: Application
    Filed: July 7, 2012
    Publication date: January 17, 2013
    Applicant: SONY CORPORATION
    Inventors: Nobuyuki Kuboi, Masanaga Fukusawa
  • Publication number: 20130011628
    Abstract: A method and an apparatus for processing display laminate, wherein the display laminate comprises a front electrode layer (106), a display material layer (104) and a protective film layer (102). The display laminate is continuous. A section of protective film layer (102) is continuously removed from the edge of the display laminate by a cutting unit (304) while the display laminate is running through the cutting unit (304). After removing the section of the protective film layer (102), a section of the display material layer (104) located at the same edge as the removed section of the protecting film layer (102) is continuously removed by spraying medium in a spraying unit (310) while the display laminate is running through the spraying unit (310).
    Type: Application
    Filed: January 11, 2011
    Publication date: January 10, 2013
    Applicant: MARISENSE OY
    Inventors: Esa Hämäläinen, Tero Kallioiinen, Jouko Parppei
  • Patent number: 8349082
    Abstract: Disclosed herein is a vacuum processing apparatus for performing a desired process for a substrate after establishing a vacuum atmosphere therein. More particularly, the vacuum processing apparatus includes a vacuum chamber, which is divided into a chamber body and an upper cover. The upper cover is configured to be easily opened away from and closed to the chamber body.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: January 8, 2013
    Assignee: Advanced Display Process Engineering Co., Ltd.
    Inventors: Young Jong Lee, Jun Young Choi, Hyoung-Kyu Son, Jeong-Bin Lee, Gyeong-Hoon Kim, Hyung-Soo Kim, Myung-Woo Han
  • Publication number: 20130004763
    Abstract: The embodiments disclose a method of fabricating a stack, including replacing a metal layer of a stack imprint structure with an oxide layer, patterning the oxide layer stack using chemical etch processes to transfer the pattern image and cleaning etch residue from the stack imprint structure to substantially prevent contamination of the metal layers.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 3, 2013
    Applicant: SEAGATE TECHNOLOGY, LLC
    Inventors: Michael R. Feldbaum, Justin Jia-Jen Hwu, David S. Kuo, Gennady Gauzner, Kim Yang Lee, Li-Ping Wang
  • Publication number: 20130005142
    Abstract: Provided is a method and apparatus for forming a silicon film, which are capable of suppressing generation of a void or seam. The method includes performing a first film-forming process, performing an etching process, performing a doping process, and performing a second film-forming process. In the first film-forming process, a non-doped silicon film that is not doped with an impurity is formed so as to embed a groove of an object. In the etching process, the non-doped silicon film formed via the first film-forming process is etched. In the doping process, the non-doped silicon film etched via the etching process is doped with an impurity. In the second film-forming process, an impurity-doped silicon film is formed so as to embed the silicon film doped via the doping process.
    Type: Application
    Filed: June 29, 2012
    Publication date: January 3, 2013
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Akinobu Kakimoto, Satoshi Takagi, Kazuhide Hasebe
  • Publication number: 20130001196
    Abstract: This disclosure describes systems, methods, and apparatuses for generating an ionizing electromagnetic field via a remote plasma source such that the field controllably extends through a field projection portion where the field attenuates, to a plasma processing portion where the field is attenuated but still strong enough to sustain a plasma. The plasma has a low voltage and RF energy and can be used for a variety of semiconductor and thin film processing operations including chamber cleaning via radical generation, etching, and deposition.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 3, 2013
    Inventors: Daniel J. Hoffman, Daniel Carter, Karen Peterson, Randy Grilly
  • Publication number: 20130000846
    Abstract: An apparatus for etching an etch layer formed on a substrate is provided. A first photoresist (PR) mask with first mask features is provided on the etch layer. The apparatus performs a process for providing a protective coating on the first PR mask. The process includes at least one cycle. Each cycle includes (a) a deposition phase for depositing a deposition layer over the surface of the first mask features using a deposition gas, and (b) a profile shaping phase for shaping the profile of the deposition layer using a profile shaping gas. A liquid PR material is applied over the first PR mask having the protective coating. The PR material is patterned into a second mask features, where the first and second mask features form a second PR mask. The etch layer is etched though the second PR mask.
    Type: Application
    Filed: September 10, 2012
    Publication date: January 3, 2013
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Andrew R. ROMANO, S.M. Reza SADJADI
  • Publication number: 20130001188
    Abstract: The embodiments disclose a method to protect magnetic bits during carbon field planarization, including depositing a stop layer upon magnetic bits and magnetic film of a patterned stack, depositing a carbon fill layer on the stop layer and using the stop layer during planarization and etch-back of the carbon field to protect the patterned stack magnetic bits during the carbon field planarization.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 3, 2013
    Applicant: SEAGATE TECHNOLOGY, LLC
    Inventors: David Kuo, Michael R. Feldbaum, Paritosh Rajora, Hieu Lam
  • Patent number: 8343305
    Abstract: Apparatus and methods for diagnosing status of a consumable part of a plasma reaction chamber, the consumable part including at least one conductive element embedded therein. The method includes the steps of: coupling the conductive element to a power supply so that a bias potential relative to the ground is applied to the conductive element; exposing the consumable part to plasma erosion until the conductive element draws a current from the plasma upon exposure of the conductive element to the plasma; measuring the current; and evaluating a degree of erosion of the consumable part due to the plasma based on the measured current.
    Type: Grant
    Filed: September 4, 2007
    Date of Patent: January 1, 2013
    Assignee: Lam Research Corporation
    Inventor: Roger Patrick
  • Publication number: 20120325406
    Abstract: A plasma processing chamber has a lower liner with an integrated flow equalizer. In an etching process, the processing gases may be unevenly drawn from the processing chamber which may cause an uneven etching of the substrate. The integrated flow equalizer is configured to equalize the flow of the processing gases evacuated from the chamber via the lower liner.
    Type: Application
    Filed: September 7, 2012
    Publication date: December 27, 2012
    Inventors: James D. CARDUCCI, Andrew NGUYEN, Ajit BALAKRISHNA, Michael C. KUTNEY
  • Publication number: 20120325404
    Abstract: An inductively-coupled-plasma (ICP) type plasma processing apparatus is provided. The plasma processing includes an antenna which is substantially straight in a plan view of the antenna. A plasma is generated for performing a plasma treatment to a substrate when a high frequency current is applied to the antenna to form an electric field in a vacuum container. The antenna includes two go-and-return conductors closely disposed to each other in an up-down direction, wherein the up-down direction is perpendicular to a surface of the substrate, and the high frequency current is applied to flow in opposite directions between the two go-and-return conductors. An interval is defined by a distance between the two go-and-return conductors in the up-down direction, varies in a longitudinal direction of the antenna.
    Type: Application
    Filed: April 17, 2012
    Publication date: December 27, 2012
    Applicant: NISSIN ELECTRIC CO., LTD.
    Inventors: TAKANORI TSUNODA, YOSHIO MATSUBARA, YASUNORI ANDO, MASAYUKI TSUJI
  • Publication number: 20120325407
    Abstract: Plasma confinement ring assemblies are provided that include confinement rings adapted to reach sufficiently high temperatures on plasma-exposed surfaces of the rings to avoid polymer deposition on those surfaces. The plasma confinement rings include thermal chokes adapted to localize heating at selected portions of the rings that include the plasma exposed surfaces. The thermal chokes reduce heat conduction from those portions to other portions of the rings, which causes selected portions of the rings to reach desired temperatures during plasma processing.
    Type: Application
    Filed: August 14, 2012
    Publication date: December 27, 2012
    Applicant: Lam Research Corporation
    Inventors: Rajinder Dhindsa, Felix Kozakevich, James H. Rogers, David Trussell