Differential Fluid Etching Apparatus Patents (Class 156/345.1)
  • Publication number: 20120329246
    Abstract: Semiconductor die break strength and yield are improved with a combination of laser dicing and etching, which are followed by dicing an underlying layer of material, such as die attach film (DAF) or metal. A second laser process or a second etch process may be used for dicing of the underlying layer of material. Performing sidewall etching before cutting the underlying layer of material reduces or prevents debris on the kerf sidewalls during the sidewall etching process. A thin wafer dicing laser system may include either a single laser process head solution or a dual laser process head solution to meet throughput requirements.
    Type: Application
    Filed: June 24, 2011
    Publication date: December 27, 2012
    Applicant: ELECTRO SCIENTIFIC INDUSTRIES, INC.
    Inventor: Daragh S. Finn
  • Patent number: 8336489
    Abstract: A thermal evaporation apparatus for depositing of a material on a substrate is described. The apparatus can comprise material storage means; heating means to generate a vapour of the material in the material storage means; vapour outlet means comprising a vapour receiving pipe having vapour outlet passages, and emission reducing means arranged such that an external surface of the vapour outlet means directed to said substrate exhibits low emission. Also the use of the apparatus, and a method of depositing a material onto a substrate by thermal evaporation are described.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: December 25, 2012
    Inventors: Volker Probst, Walter Stetter
  • Patent number: 8337619
    Abstract: A method of treating a metal surface of a portion of a substrate processing system to lower a defect concentration near a processed surface of a substrate includes forming a protective coating on the metal surface, wherein the protective coating includes nickel (Ni) and a fluoropolymer. Forming the protective coating on the metal surface can further include forming a nickel layer on the metal surface, impregnating the nickel layer with a fluoropolymer, and removing fluoropolymer from the surface leaving a predominantly nickel surface so the fluoropolymer is predominantly subsurface. A substrate processing system includes a process chamber into which a reactant gas is introduced, a pumping system for removing material from the process chamber, a first component with a protective coating, wherein the protective coating forms a surface of the component which is exposed to an interior of the substrate processing chamber or an interior of the pumping system.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: December 25, 2012
    Assignee: Applied Materials, Inc.
    Inventors: David K. Carlson, Roger N. Anderson
  • Publication number: 20120322238
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The semiconductor wafer is disposed on a water-soluble die attach film. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The water-soluble die attach film is then patterned with an aqueous solution.
    Type: Application
    Filed: June 15, 2011
    Publication date: December 20, 2012
    Inventors: Wei-Sheng Lei, Madhava Rao Yalamanchili, Brad Eaton, Saravjeet Singh, Ajay Kumar
  • Publication number: 20120322239
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The semiconductor wafer is supported by a substrate carrier. The mask is then patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits while supported by the substrate carrier.
    Type: Application
    Filed: June 15, 2011
    Publication date: December 20, 2012
    Inventors: Saravjeet Singh, Brad Eaton, Ajay Kumar, Wei-Sheng Lei, James M. Holden, Madhava Rao Yalamanchili, Todd J. Egan
  • Publication number: 20120322240
    Abstract: Methods and apparatuses for dicing substrates by both laser scribing and plasma etching. A method includes laser ablating material layers, the ablating by a laser beam with a centrally peaked spatial power profile to form an ablated trench in the substrate below thin film device layers which is positively sloped. In an embodiment, a femtosecond laser forms a positively sloped ablation profile which facilitates vertically-oriented propagation of microcracks in the substrate at the ablated trench bottom. With minimal lateral runout of microcracks, a subsequent anisotropic plasma etch removes the microcracks for a cleanly singulated chip with good reliability.
    Type: Application
    Filed: June 15, 2011
    Publication date: December 20, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventors: James M. HOLDEN, Nir Merry, Todd Egan
  • Publication number: 20120322235
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a galvanic laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Application
    Filed: June 15, 2011
    Publication date: December 20, 2012
    Inventors: Wei-Sheng Lei, Saravjeet Singh, Madhava Rao Yalamanchili, Brad Eaton, Ajay Kumar
  • Publication number: 20120322237
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The patterned mask is then separated from the singulated integrated circuits.
    Type: Application
    Filed: June 15, 2011
    Publication date: December 20, 2012
    Inventors: Wei-Sheng Lei, Saravjeet Singh, Madhava Rao Yalamanchili, Brad Eaton, Ajay Kumar
  • Publication number: 20120322236
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a pulse train laser scribing process using multiple-pulse bursts to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Application
    Filed: June 15, 2011
    Publication date: December 20, 2012
    Inventors: Wei-Sheng Lei, Saravjeet Singh, Madhava Rao Yalamanchili, Brad Eaton, Ajay Kumar
  • Publication number: 20120312472
    Abstract: A semiconductor device manufacturing apparatus includes: a first pattern forming unit for forming a first pattern by patterning a first mask material layer; a boundary layer forming unit for forming a boundary layer at sidewall portions and top portions of the first pattern; a second mask material layer forming unit for forming a second mask material layer so as to cover a surface of the boundary layer; a second mask material removing unit for removing a part of the second mask material layer to expose top portions of the boundary layer; a boundary layer etching unit for forming a second pattern by etching and removing the boundary layer and forming a void between the sidewall portions of the first pattern and the second mask material layer; and a trimming unit for reducing a width of the first pattern and a width of the second pattern to predetermined widths.
    Type: Application
    Filed: August 22, 2012
    Publication date: December 13, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hidetami Yaegashi, Satoru Shimura
  • Publication number: 20120305183
    Abstract: A semiconductor device manufacturing apparatus includes: a first pattern forming unit for forming a first pattern by patterning a first mask material layer; a trimming unit for reducing a width of the first pattern to a predetermined width; a boundary layer forming unit for forming a boundary layer, on a surface of the first pattern; a second mask material layer forming unit for forming a second mask material layer on a surface of the boundary layer; a second mask material removing unit for removing a part of the second mask material layer to expose top portions of the boundary layer; and a boundary layer etching unit for exposing the first pattern and forming a second pattern having the second mask material layer at a top portion thereof by etching the boundary layer.
    Type: Application
    Filed: August 21, 2012
    Publication date: December 6, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hidetami Yaegashi, Satoru Shimura, Takashi Hayakawa
  • Publication number: 20120309135
    Abstract: A method of etching through-substrate vias comprising depositing a layer of embossable material on a first side and a second side of a thin-film stack, the thin-film stack including a base substrate, embossing the embossable material deposited on the first side and the second side of the thin-film stack with a pattern, hardening the embossable material, and etching the first and second sides of the thin-film stack, the etching of the second side of the thin-film stack forming vias through the base substrate.
    Type: Application
    Filed: June 6, 2011
    Publication date: December 6, 2012
    Inventor: Devin Alexander Mourey
  • Publication number: 20120308783
    Abstract: The embodiments disclose a method of creating two-sided template from a single recorded master, including fabricating a first template using a single recorded master, wherein the first template has a changed duty cycle and an unchanged servo arc orientation, creating a replicate of the first template, wherein the replicate has a mirrored servo arc orientation and a changed duty cycle and fabricating a second template using the replicate to produce a predetermined mirrored servo arc orientation and a predetermined duty cycle for imprinting on a second side of a patterned stack.
    Type: Application
    Filed: August 3, 2011
    Publication date: December 6, 2012
    Applicant: SEAGATE TECHNOLOGY, LLC
    Inventors: David Kuo, Gennady Gauzner, Kim Yang Lee
  • Publication number: 20120298134
    Abstract: A method for cleaning an optical element of an extreme ultraviolet light source device for removing, from the optical element in a chamber, scattered matter generated together with extreme ultraviolet light by plasma formed through laser beam excitation of a target in the chamber, the method which comprises: making the scattered matter generated by the plasma no larger than nanosize by using solid tin as the target and using a CO2 laser as an excitation source of the solid tin; and imparting, to the scattered matter no larger than the nanosize adhered to the optical element, an effect of overcoming the adherence of the scattered matter.
    Type: Application
    Filed: August 6, 2012
    Publication date: November 29, 2012
    Applicant: GIGAPHOTON INC.
    Inventors: Masato Moriya, Yoshifumi Ueno, Tamotsu Abe, Akira Sumitani
  • Publication number: 20120298133
    Abstract: A device to provide improved anti-smudging, better gripping and longer shelf-life to products and surfaces includes an electric superheated steam generator and an electric low-ion plasma generator to provide superheated steam and low-ion plasma to the surfaces of products including plastics. One embodiment envisions the superheated steam generator and the low-ion plasma generator being contained in a housing while another embodiment anticipates a conveyor means positioned in front of the superheated steam generator and the low-ion plasma generator. A method for the improving of anti-smudging, gripping and shelf-life for properties includes the application of superheated steam and low-ion plasma by means of a superheated steam generator and a low-ion plasma generator to products for specific periods of time and at specific distances to attain desired surface and bulk properties. The superheated steam and low-ion plasma may be applied individually, simultaneously or sequentially.
    Type: Application
    Filed: September 20, 2010
    Publication date: November 29, 2012
    Inventors: Venkata Burada, Jainagesh Sekhar, Jerod Batt, G.S. Reddy, Brian Kandell
  • Patent number: 8313578
    Abstract: A plasma processing chamber having a lowered flow equalizer and a lower chamber liner. In an etching process, the processing gases may be unevenly drawn from the processing chamber which may cause an uneven etching of the substrate. By equalizing the flow of the processing gases evacuated from the chamber, a more uniform etching may occur. By electrically coupling the flow equalizer to the chamber liners, the RF return path from the flow equalizer may run along the chamber liners and hence, reduce the amount of plasma drawn below the substrate during processing.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: November 20, 2012
    Assignee: Applied Materials, Inc.
    Inventors: James D. Carducci, Kin Pong Lo, Kallol Bera, Michael C. Kutney, Matthew L. Miller
  • Publication number: 20120285619
    Abstract: An electrostatic chuck for receiving a substrate in a substrate processing chamber comprises a ceramic puck having a substrate receiving surface having a plurality of spaced apart mesas, an opposing backside surface, and central and peripheral portions. A plurality of heat transfer gas conduits traverse the ceramic puck and terminate in ports on the substrate receiving surface to provide heat transfer gas to the substrate receiving surface. An electrode is embedded in the ceramic puck to generate an electrostatic force to retain a substrate placed on the substrate receiving surface. A plurality of heater coils are also embedded in the ceramic puck, the heaters being radially spaced apart and concentric to one another.
    Type: Application
    Filed: July 23, 2012
    Publication date: November 15, 2012
    Inventors: Alexander Matyushkin, Dennis Koosau, Theodoros Panagopoulos, John Holland
  • Patent number: 8310054
    Abstract: A semiconductor device manufacturing method includes removing copper deposits, by use of an organic acid gas and an oxidizing gas, from a surface of a second interlayer insulation film having a groove formed therein and reaching a copper-containing electric connector member. The second interlayer insulation film is disposed on a first interlayer insulation film provided with the electric connector member. The method then includes reducing a surface of the electric connector member exposed at a bottom of the groove of the second interlayer insulation film; forming a barrier layer on the second interlayer insulation film; and forming a copper-containing conductive film to fill the groove of the second interlayer insulation film.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: November 13, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Hidenori Miyoshi, Kazuichi Hayashi
  • Patent number: 8309465
    Abstract: A system produces devices that include a semiconductor part and a non-semiconductor part. A front end is configured to receive a semiconductor part and to process the semiconductor part. A back end is configured to receive the processed semiconductor part and to assemble the processed semiconductor part and a non-semiconductor part into a device. A transfer device is configured to automatically handle the semiconductor part in the front end and to automatically transfer the processed semiconductor part to the back end.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: November 13, 2012
    Assignee: Infineon Technologies AG
    Inventors: Oskar Neuhoff, Tobias Gamon, Norbert Martin Haueis, Dirk Pikorz, Michael Wolfgang Larisch, Franz Reithner
  • Patent number: 8308962
    Abstract: The efficiency of an etching process may be increased in various ways, and the cost of an etching process may be decreased. Unused etchant may be isolated and recirculated during the etching process. Etching byproducts may be collected and removed from the etching system during the etching process. Components of the etchant may be isolated and used to general additional etchant. Either or both of the etchant or the layers being etched may also be optimized for a particular etching process.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: November 13, 2012
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventors: Philip Floyd, Chok Ho, Teruo Sasagawa, Xiaoming Yan
  • Publication number: 20120276746
    Abstract: A manufacturing method for a semiconductor device includes: arranging a plurality of silicon substrates having a sacrifice layer in a reaction chamber in such a manner that surfaces of silicon substrates face each other; introducing an etching gas into the reaction chamber; reacting the etching gas and the sacrifice layer in each silicon substrate so that the sacrifice layer is dry-etched; and arranging a partition member in the reaction chamber to partition a predetermined range between adjacent silicon substrates. The partition member has a property in such a manner that a water molecule hardly penetrates the partition member. The water molecule is a reaction product between the etching gas and the sacrifice layer.
    Type: Application
    Filed: April 27, 2011
    Publication date: November 1, 2012
    Applicant: DENSO CORPORATION
    Inventors: Yuji HIKIDA, Kouichi Miyashita
  • Patent number: 8287650
    Abstract: Embodiments of a cover ring for use in a plasma processing chamber are provided. In one embodiment, a cover ring for use in a plasma processing chamber includes a ring-shaped body fabricated from a yttrium (Y) containing material. The body includes a bottom surface having an inner locating ring and an outer locating ring. The inner locating ring extends further from the body than the outer locating ring. The body includes an inner diameter wall having a main wall and a secondary wall separated by a substantially horizontal land. The body also includes a top surface having an outer sloped top surface meeting an inner sloped surface at an apex. The inner sloped surface defines an angle with a line perpendicular to a centerline of the body less than about 70 degrees.
    Type: Grant
    Filed: September 10, 2008
    Date of Patent: October 16, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Changhun Lee, Michael D. Willwerth, Hoan Hguyen
  • Patent number: 8282844
    Abstract: A method and system of etching a metal nitride, such as titanium nitride, is described. The etching process comprises introducing a process composition having a halogen containing gas, such as Cl2, HBr, or BCl3, and a hydrocarbon gas having the chemical formula CxHy, where x and y are equal to unity or greater.
    Type: Grant
    Filed: August 1, 2007
    Date of Patent: October 9, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Akiteru Ko, Hiroyuki Takahashi, Masayuki Sawataishi
  • Publication number: 20120247672
    Abstract: In a plasma processing apparatus, a ceiling electrode plate provided to face a substrate holding stage via a process space contacts and is supported by an electrode support by interposing a cooling plate, and a heat-transfer sheet is provided in a contact surface between the ceiling electrode plate and the cooling plate. The heat-transfer sheet has thermal conductivity of 0.5 to 2.0 W/m·K. The heat-transfer sheet is provided of a heat-resistant adhesive agent or a rubber including silicon, or the heat-transfer sheet is formed of a ceramic filler including oxide, nitride, or carbide. The ceramic filler of 25 to 60 volume % is contained in the heat-resistant adhesive agent or the rubber. A thickness of the heat-transfer sheet is in a range between 30 and 80 ?m, and the heat-transfer sheet is not provided in a predetermined area around gas holes of the ceiling electrode plate.
    Type: Application
    Filed: March 30, 2012
    Publication date: October 4, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Yoshiyuki KOBAYASHI
  • Patent number: 8276604
    Abstract: In accordance with one embodiment of the present disclosure, an assembly is provided comprising a multi-component electrode and a peripherally engaging electrode carrier. The peripherally engaging electrode carrier comprises a carrier frame and a plurality of reciprocating electrode supports. The multi-component electrode is positioned in the electrode accommodating aperture of the carrier frame. The backing plate of the electrode comprises a plurality of mounting recesses formed about its periphery. The reciprocating electrode supports can be reciprocated into and out of the mounting recesses. Additional embodiments of broader and narrower scope are contemplated.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: October 2, 2012
    Assignee: Lam Research Corporation
    Inventors: Jason Augustino, Armen Avoyan, Yan Fang, Duane Outka, Hong Shih, Stephen Whitten
  • Patent number: 8277567
    Abstract: A method of cleaning a turbo pump is described. The turbo pump is coupled with a CVD chamber of depositing a material and thus accumulates the material therein. The method includes switching off the turbo pump and using another pump to pump a reactive gas, which can react with the material to form gaseous products, through the turbo pump. Thereby, the turbo pump is cleaned up and is prevented from being a particle source in subsequent CVD operations.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: October 2, 2012
    Assignee: United Microelectronics Corp.
    Inventors: Kian-Soong Poh, Jui-Ling Tang, Chong-Tat Lee, Cheng-Chung Lim
  • Publication number: 20120241284
    Abstract: Sterilization and cleaning of an escalator hand rail are performed. A sterilization and cleaning device including a hand rail; a plasma source for irradiating the hand rails with ions or radicals or UV light; an enclosure for housing the plasma source; a power source for generating plasma; a fan for generating relatively negative pressure in the enclosure; filter units for removing removed bacteria, viruses, and organic matters such as hand marks; and filter plates located backward and forward of a moving direction of the hand rail in the enclosure along the hand rail is provided.
    Type: Application
    Filed: January 3, 2012
    Publication date: September 27, 2012
    Applicant: Hitachi, Ltd.
    Inventors: Hiroyuki KOBAYASHI, Takumi Tandou, Naoshi Itabashi
  • Patent number: 8273178
    Abstract: A thin film deposition apparatus and a method of maintaining the same are disclosed. In one embodiment, a thin film deposition apparatus includes: a chamber including a removable chamber cover; one or more reactors housed in the chamber; a chamber cover lifting device connected to the chamber cover. The chamber cover lifting device is configured to move the chamber cover vertically between a lower position and an upper position. The apparatus further includes a level sensing device configured to detect whether the chamber cover is level, and a level maintaining device configured to adjust the chamber cover if the chamber cover is not level. This configuration maintains the chamber cover to be level as a condition for further vertical movement of the chamber cover.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: September 25, 2012
    Assignee: ASM Genitech Korea Ltd.
    Inventors: Se Yong Kim, Woo Chan Kim, Dong Rak Jung
  • Publication number: 20120238101
    Abstract: A method and an apparatus for etching microstructures and the like that provides improved selectivity to surrounding materials when etching silicon using xenon difluoride (XeF2). Etch selectivity is greatly enhanced with the addition of hydrogen to the process chamber.
    Type: Application
    Filed: September 27, 2010
    Publication date: September 20, 2012
    Inventor: Anthony O'Hara
  • Patent number: 8270141
    Abstract: Embodiments of electrostatic chucks are provided herein. In some embodiments, an electrostatic chuck may include a body having a notched upper peripheral edge, defined by a first surface perpendicular to a body sidewall and a stepped second surface disposed between the first surface and a body upper surface, and a plurality of holes disposed through the body along the first surface; a plurality of fasteners disposed through the plurality of holes to couple the body to a base disposed beneath the body; a dielectric member disposed above the body upper surface to electrostatically retain a substrate; an insulator ring disposed about the body within the notched upper peripheral edge and having a stepped inner sidewall that mates with the stepped second surface to define a non-linear interface therebetween; and an edge ring disposed over the insulator ring, the non-linear interface limiting arcing between the edge ring and the fastener.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: September 18, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Michael D. Willwerth, David Palagashvili, Douglas A. Buchberger, Jr., Michael G. Chafin
  • Publication number: 20120228261
    Abstract: There is provided a VUV light processing apparatus that can apply vacuum ultraviolet light to the entire surface of a wafer in excellent reproducibility and can process the wafer with VUV (vacuum ultraviolet) light in excellent reproducibility. A VUV light processing apparatus includes: a chamber connected with a gas supply apparatus and an evacuation apparatus, the chamber being capable of reducing the pressure inside the chamber; a plasma light source that generates VUV light including a wavelength of 200 nm or less, the plasma light source including a plasma generating unit that generates plasma in the chamber; and a VUV transmission filter provided between a stage on which a sample to be processed is placed and the sample in the chamber, the VUV transmission filter transmitting the VUV light including a wavelength of 200 nm or less and not transmitting electrons, ions, and radicals in plasma, the VUV transmission filter having the outer diameter size larger than that of the sample.
    Type: Application
    Filed: November 16, 2010
    Publication date: September 13, 2012
    Inventors: Seiichi Watanabe, Yutaka Kozuma, Tooru Aramaki, Naoki Yasui, Norihiko Ikeda, Hiroaki Takikawa
  • Publication number: 20120231628
    Abstract: A substrate processing chamber includes a lift actuator that moves a pedestal between a substrate loading position and a substrate processing position. An adjustable seal defines an expandable sealed volume between a bottom surface of the pedestal and a bottom surface of the substrate processing chamber and is moveable between the substrate loading position and the substrate processing position. When the pedestal is in the substrate processing position, the pedestal and the adjustable seal define a first inert volume and a first process volume. When the pedestal is in the substrate loading position, the pedestal and the adjustable seal define a second inert volume and a second process volume. The second inert volume is less than the first inert volume and the second process volume is greater than the first process volume.
    Type: Application
    Filed: February 23, 2012
    Publication date: September 13, 2012
    Applicant: Novellus Systems Inc.
    Inventor: James F. Lee
  • Patent number: 8262844
    Abstract: Provided is a plasma processing apparatus including a processing vessel accommodating a target object; a microwave generator configured to generate a microwave; a waveguide configured to induce the microwave to the processing vessel; a planar antenna having a plurality of microwave radiation holes through which the microwave induced to the waveguide is radiated toward the processing vessel; a microwave transmission plate configured to serve as a ceiling wall of the processing vessel and transmit the microwave passed from the microwave radiation holes of the planar antenna; a processing gas inlet unit configured to introduce a processing gas into the processing vessel; and a magnetic field generating unit positioned above the planar antenna and configured to generate a magnetic field within the processing vessel and control a property of plasma of the processing gas by the magnetic field, the plasma being generated by the microwave within the processing vessel.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: September 11, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Hiraku Ishikawa, Yasuhiro Tobe
  • Patent number: 8262846
    Abstract: A blow-off part 152 is provided with a blow-off port 1a? which is dimensioned small enough so as not to allow a blow-off stream to be blown off directly to a part of a wafer W which part is located at the more internal side of the wafer than the outer edge of the wafer W and not to be subjected to plasmatizing process. A suction part 151 is provided with a suction port 81A in associating with the blow-off part 152. The suction port 81A is disposed proximate to the blow-off port 1a? and forms a suction stream oriented generally in the reverse direction with respect to the blow-off stream.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: September 11, 2012
    Assignee: Sekisui Chemical Co., Ltd.
    Inventors: Mitsuhide Nogami, Eiji Miyamoto
  • Publication number: 20120222813
    Abstract: Embodiments of the present disclosure generally relate to vacuum processing chambers having different pumping requirements and connected to a shared pumping system through a single foreline. In one embodiment, the vacuum processing chambers include a high conductance pumping conduit and a low conductance pumping conduit coupled to a single high conductance foreline. In another embodiment, a plurality of unbalanced chamber groups may be connected to a common pumping system by a final foreline.
    Type: Application
    Filed: February 29, 2012
    Publication date: September 6, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Aniruddha Pal, Martin Jeffrey Salinas, Jared Ahmad Lee, Paul B. Reuter, Imad Yousif
  • Publication number: 20120211466
    Abstract: The following description relates to a plasma processing apparatus and a method thereof. The plasma processing apparatus comprises a first plasma chamber having a first plasma discharge space, a first plasma source for supplying a first activation energy to the first plasma discharge space within the first plasma chamber, a second plasma chamber which is connected to the first plasma chamber and has a second discharge space, and a second plasma source for supplying a second activation energy for inducing inductive coupled plasma to the second plasma discharge space within the second plasma chamber.
    Type: Application
    Filed: February 28, 2011
    Publication date: August 23, 2012
    Inventor: Dae-Kyu Choi
  • Publication number: 20120208351
    Abstract: A cleaning apparatus for a semiconductor manufacturing apparatus includes: a oxide removal unit that removes an oxide over a surface of a deposit adhered to components of the semiconductor manufacturing apparatus, and a deposit removal unit that removes the deposit after the oxide over the surface is removed by the oxide removal unit.
    Type: Application
    Filed: January 25, 2012
    Publication date: August 16, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Norikazu Nakamura, Atsushi Yamada, Masayuki Takeda, Keiji Watanabe, Kenji Imanishi
  • Publication number: 20120205045
    Abstract: A semiconductor machine and a cleaning process are provided. The semiconductor machine includes a chamber and a cleaning module. The cleaning process includes the following steps. Firstly, the semiconductor machine is used to perform a semiconductor manufacturing process, wherein a titanium-based material is etched in the semiconductor manufacturing process. Then, a cleaning task is activated to clean the semiconductor machine by using a cleaning agent including a gas mixture of a fluoride compound and oxygen.
    Type: Application
    Filed: February 11, 2011
    Publication date: August 16, 2012
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Li-Hsun HO, Ching-Shing Huang, Chih-Hui Shen, Tao-Min Chang
  • Publication number: 20120199286
    Abstract: A first electrode, a second electrode and a third electrode are provided in a middle of a passage. The second electrode is provided on an upstream side of the first electrode, and the third electrode is provided on a downstream side of the first electrode. A connecting line connects the first electrode to a first pole of a pulsed power supply, and connects the second electrode and the third electrode to a second pole of the pulsed power supply. The first electrode crosses a first gas passing surface and occupies a part of the first gas passing surface. The second electrode and the third electrode cross a second gas passing surface and a third gas passing surface and occupy a part of the second gas passing surface and the third gas passing surface respectively.
    Type: Application
    Filed: April 19, 2012
    Publication date: August 9, 2012
    Applicant: NGK Insulators Ltd.
    Inventors: Wataru SHIONOYA, Naohiro SHIMIZU, Yuichiro IMANISHI, Sozaburo HOTTA
  • Patent number: 8236380
    Abstract: A gas supply system for supplying a gas into a processing chamber for processing a substrate to be processed includes: a processing gas supply unit; a processing gas supply line; a first and a second processing gas branch line; a branch flow control unit; an additional gas supply unit; an additional gas supply line; a first and a second additional gas branch line; a flow path switching unit; and a control unit. Before processing the substrate to be processed, the control unit performs a pressure ratio control on the branch flow control unit while the processing gas supply unit supplies the processing gas. After the inner pressures of the first and the second processing gas branch line become stable, the control unit switches the pressure ratio control to a fixed pressure control, and then the additional gas supply unit supplies the additional gas.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: August 7, 2012
    Assignee: Tokyo Electron Limited
    Inventor: Kenetsu Mizusawa
  • Publication number: 20120190208
    Abstract: Uniformity of a plasma process on a surface of a substrate is to be improved. In a plasma processing apparatus that processes a substrate by generating plasma from a processing gas introduced in a processing container, a ratio between an introducing amount of the processing gas introduced to a center portion of the substrate received in the processing container and an introducing amount of the processing gas introduced to a peripheral portion of the substrate received in the processing container is changed during a plasma process. Accordingly, a variation in an etching rate or the like between the center portion and the peripheral portion of the substrate may be reduced. Therefore, uniformity of the plasma process on the surface of the substrate is improved.
    Type: Application
    Filed: August 10, 2010
    Publication date: July 26, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Toshihisa Ozu, Naoki Matsumoto, Takashi Tsukamoto, Kazuto Takai
  • Patent number: 8227052
    Abstract: The invention relates to a method for plasma-assisted chemical vapour deposition for coating or material removal on the inner wall of a hollow body (42). The method involves introducing a gas lance (44) into the hollow body (42) and forming a cavity plasma (45) to form a plasma cloud arranged at the tip of the gas lance by applying an electric radio-frequency field to an RF electrode (41).
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: July 24, 2012
    Assignee: Ralf Stein
    Inventor: Oliver Nöll
  • Patent number: 8225745
    Abstract: System and method for operating a material deposition system are disclosed. In one embodiment, the method can include periodically injecting a precursor into a vaporizer through an injector at the vaporizer, vaporizing the precursor in the vaporizer and supplying the vaporized precursor to a reaction chamber in fluid communication with the vaporizer, and shutting down the vaporizer and the reaction chamber after a period of time. The method can also include conducting maintenance of the injector at the vaporizer by using a vapor solvent rinse.
    Type: Grant
    Filed: February 2, 2011
    Date of Patent: July 24, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Eugene P. Marsh, David R. Atwell
  • Publication number: 20120180953
    Abstract: A plasma processing apparatus includes a planar antenna member, which introduces electromagnetic waves generated by means of an electromagnetic wave generator into a processing chamber; a waveguide which supplies the electromagnetic waves to the planar antenna member; and a wave retardation plate, which is provided on the planar antenna member, and changes the wavelength of the electromagnetic waves supplied from the waveguide; a cover member which covers the wave retardation plate and the planar antenna member from above. The wave retardation plate is configured using a dielectric material, and the permittivity of the region between the planar antenna member and the cover member is not uniform on the plane parallel to the upper surface of the planar antenna member.
    Type: Application
    Filed: September 29, 2010
    Publication date: July 19, 2012
    Applicant: Tokyo Electron Limited
    Inventors: Shigenori Ozaki, Ryusaku Ota, Hikaru Adachi, Makoto Ishitsubo
  • Patent number: 8221579
    Abstract: In a method of reusing a consumable part for use in a plasma processing apparatus, a silicon carbide (SiC) lump is formed by depositing SiC by chemical vapor deposition (CVD), and a consumable part for the plasma processing apparatus is manufactured by processing the SiC lump, the consumable part having a predetermined shape. A first plasma process is performed on a substrate by using the manufactured consumable part. A surface of the consumable part that has been eroded by the plasma process is subjected to a clean process for a specific period of time. SiC is deposited on the cleaned surface of the eroded consumable part by CVD. A consumable part having the predetermined shape is remanufactured by processing the eroded consumable part having the surface on which the SiC is deposited. A second plasma process is performed on a substrate by using the remanufactured consumable part.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: July 17, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Nobuyuki Nagayama, Naoyuki Satoh, Keiichi Nagakubo, Kazuya Nagaseki
  • Publication number: 20120175063
    Abstract: A substrate processing apparatus capable of removing deposits attached on a component of a lower temperature in a gap between two components, temperatures of which are greatly different from each other, without degrading a working ratio of the substrate processing apparatus. In the substrate processing apparatus, a chamber receives a wafer, a focus ring surrounds the wafer disposed in the chamber, a side surface protective member transmits a laser beam, a laser beam irradiating apparatus irradiates the laser beam to the side surface protective member, an inner focus ring of the focus ring is disposed adjacent to the wafer and is cooled down and an outer focus ring surrounds the inner focus ring and is not cooled down in a focus ring, and a facing surface of the side surface protective member faces a gap between the inner focus ring and the outer focus ring.
    Type: Application
    Filed: January 5, 2012
    Publication date: July 12, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Jun YAMAWAKU, Chishio KOSHIMIZU
  • Patent number: 8216422
    Abstract: An apparatus for supporting a substrate within a processing chamber is provided. In one aspect, a substrate support member is provided comprising a housing having a bore formed therethrough, a support pin at least partially disposed within the bore, and a plurality of bearing elements disposed about the housing. In one aspect, the bearing elements comprise a roller having a central bore formed therethrough, a contoured outer surface, and a shaft at least partially disposed through the central bore. In another aspect, the bearing elements comprise a ball assembly comprising a larger spherical member and four smaller spherical members arranged about the larger spherical member.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: July 10, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Shinichi Kurita, Suhail Anwar, Toshio Kiyotake
  • Patent number: 8216374
    Abstract: A gas coupler is capable of conducting gas between a gas component, gas source and substrate processing chamber. The gas coupler comprises a metal block comprising a gas component seating surface having a plurality of gas component coupling ports. The block also has a plurality of sidewalls at right angles to the gas component seating surface, each sidewall comprising a counterbored gas orifice. A plurality of right-angled internal passageways are each connected to a gas component coupling port. Each internal passageway terminates at counterbored gas orifice on a different sidewall surface so that each gas component coupling port is fluidly connected to a different sidewall.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: July 10, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Joel Huston, Jeffery Tobin, Christophe Marcadal
  • Publication number: 20120160296
    Abstract: The present invention relates to devices and method for textured semiconductor materials. Devices and methods shown provide a textured surface with properties that provide a high breakdown voltage. The devices and methods of the present invention can be used to make semiconductor substrates for use in photovoltaic applications such as solar cells.
    Type: Application
    Filed: September 30, 2011
    Publication date: June 28, 2012
    Inventors: Olivier Laparra, Paul Schroeder, Jean Patrice Rakotoniaina, Chia-Ming Chang, Omar Sidelkheir, Alain Paul Blosse, Kamel Ounadjela
  • Publication number: 20120156877
    Abstract: A top assembly for a processing chamber having a back plate and a hub is provided. The back plate has a first portion and a second portion. The first portion is connected to the second portion through a central region of the back plate, wherein a gap is defined between opposing surfaces of the first and second portions outside the central region. The first portion includes an embedded heating element. The hub is affixed to a top surface of the second portion of the back plate over the central region. The hub has a top surface with a plurality of channel openings defined within a central region of the hub and a bottom surface having a central extension with a plurality of channels defined therethrough. The bottom surface includes an annular extension spaced apart from the central extension.
    Type: Application
    Filed: December 20, 2010
    Publication date: June 21, 2012
    Inventors: Lipyeow Yap, Jay DeDontney, Shouqian Shao, Jason Wright