Abstract: A diffusing agent composition including a condensation product and an impurity diffusion component. The condensation product is a reaction product resulting from hydrolysis of an alkoxysilane. The impurity diffusion component is a monoester or diester of phosphoric acid, or a mixture thereof.

Abstract: Methods of forming an image sensor are provided. A method of forming an image sensor includes forming a trench in a substrate to define a unit pixel region of the substrate. The method includes forming an in-situ-doped passivation layer on an exposed surface of the trench. The method includes forming a capping pattern on the in-situ-doped passivation layer, in the trench. The method includes forming a photoelectric conversion region in the unit pixel region. Moreover, the method includes forming a floating diffusion region in the unit pixel region.

Abstract: A solar cell including a non-amorphous semiconductor substrate of a first conductive type; at least a first semiconductor layer on the non-amorphous semiconductor substrate, the first semiconductor layer including a portion that is amorphous and a plurality of portions having crystal lumps, so that the plurality of portions having the crystal lumps are distributed in the first semiconductor layer; a first electrode on the semiconductor substrate; and a second electrode on the semiconductor substrate.

Abstract: A trap rich layer for an integrated circuit chip is formed by chemical etching and/or laser texturing of a surface of a semiconductor layer. In some embodiments, a trap rich layer is formed by a technique selected from the group of techniques consisting of laser texturing, chemical etch, irradiation, nanocavity formation, porous Si-etch, semi-insulating polysilicon, thermal stress relief and mechanical texturing. Additionally, combinations of two or more of these techniques may be used to form a trap rich layer.

Abstract: The invention relates to a method for manufacturing a photovoltaic module comprising a plurality of solar cells in a thin-layer structure, in which the following are consecutively formed: an electrode on the rear surface (41), a photovoltaic layer (46) obtained by depositing a layer (42) of precursors and by annealing such as to convert the precursors into a semiconductor material, and another semiconductor layer (43) in order to create a pn junction with the photovoltaic layer (46); characterized in that the layer (42) is deposited in a localized manner, such as to leave free at least one area (410) of the electrode on the rear surface (41) placed between two adjacent cells, wherein the annealing step modifies said area (410) which has higher resistivity than the rest of the electrode on the rear surface (41), such as to provide electric insulation between two adjacent cells.

Abstract: A method for removing non-bonding compounds from absorber layers of a plurality of absorber substrates during a cleaning process comprises setting one or more conditions of a solution in a solvent tank used to clean the non-bonding compounds from the absorber layers of the absorber substrates. The method further comprises calculating thickness of boundary layers formed on the absorber layers based on hydrodynamics of the solution in the solvent tank during the cleaning process, and setting one or more of spacing between the absorber substrates and circulation speed of the solution in the solvent tank during the cleaning process. The method further comprises immersing and cleaning the absorber substrates in the solvent tank under one or more of the set conditions, spacing and circulation speed of the solution.

Abstract: The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a semiconductor substrate having a first type of dopant; a semiconductor layer having a second type of dopant different from the first type of dopant and disposed on the semiconductor substrate; and an image sensor formed in the semiconductor layer.

Abstract: A semiconductor optical device includes a substrate including first and second regions arranged in a first direction, a photodiode disposed on the first region, an optical waveguide disposed on the second region, and a buried layer disposed on a side surface of the photodiode. The side surface of the photodiode extends in the first direction. The photodiode has a first end surface intersecting with the first direction, and the optical waveguide is in direct contact with the first end surface. The buried layer is composed of a III-V compound semiconductor doped with a transition metal. The photodiode includes a stacked semiconductor layer including a first cladding layer, a light-absorbing layer and a second cladding layer stacked in that order on the substrate. The light-absorbing layer has a side surface having at least a portion recessed with respect to a side surface of the first cladding layer.

Abstract: The present invention provides a memory structure including a resistance-changing storage element, which enables a reset operation with a reset gate and in which cross-sectional areas of a resistance-changing film and a lower electrode in a current-flowing direction can be decreased.

Abstract: A semiconductor device and a method of manufacturing a semiconductor device are disclosed. The method includes forming a trench, in a vertical direction of a semiconductor substrate having a plurality of photoelectric converting elements arranged on the semiconductor device, at positions between the photoelectric converting elements that are next to each other, forming a first conductive-material layer in and above the trench by implanting a first conductive material into the trench after an oxide film is formed on an inner wall of the trench, forming a first conductor by removing the first conductive-material layer excluding a first conductive portion of the first conductive-material layer implanted into the trench, and forming an upper gate electrode above the first conductor, the upper gate electrode configured to be conductive with the first conductor. The semiconductor device includes a semiconductor substrate, an image sensor, a trench, a first conductor, and an upper gate electrode.

Abstract: A dye-sensitized solar cell that includes an electrode having a semiconductor nanoparticle layer dispersed on a transparent conductive substrate, a plurality of semiconductor nanofibers dispersed on the nanoparticle layer, a first light absorption material is attached to the plurality of semiconductor nanofibers in which the first light absorption material having a first light absorption bandwidth, and a second light absorption material deposited on the light absorption material of the plurality of semiconductor nanofibers, the second light absorption material having a second light absorption bandwidth complementary to the first light absorption bandwidth, a counter electrode includes a metal-coated transparent conductive substrate, and an electrolyte in contact with the near-infrared light absorption material and the counter electrode.

Abstract: A solid-state imaging device in which a pixel circuit formed on the first surface side of a semiconductor substrate is shared by a plurality of light reception regions and second surface side of the semiconductor substrate is the light incident side of the light reception regions. The second surface side regions of the light reception regions are arranged at approximately even intervals and the first surface side regions of the light reception regions e are arranged at uneven intervals. Respective second surface side regions and first surface side regions are joined in the semiconductor substrate so that the light reception regions extend from the second surface side to the first surface side of the semiconductor substrate.

Abstract: After oxidizing a sacrificial semiconductor layer composed of silicon germanium that is located over an insulator layer to form a germanium-enriched region located within a first end of the sacrificial semiconductor layer and having a greater germanium concentration than a remaining portion of the sacrificial semiconductor layer, the remaining portion of the sacrificial semiconductor layer is removed to provide a trench. Next, a semiconductor barrier layer is formed on a sidewall of the germanium-enriched region that is exposed by the trench. A III-V compound semiconductor layer is formed within the trench by a lateral epitaxial semiconductor regrowth process.

Abstract: Disclosed is a method for manufacturing a semiconductor device, including: forming a first material layer including holes exposing a part of an ion injection target layer on the ion injection target layer; forming gap filling layers having a smaller height than that of the holes inside the holes; forming a second material layer on the gap filling layers and the first material layer; forming ion injection mask patterns exposing the gap filling layer by removing the second material layer formed on the gap filling layer in the second material layer; exposing a part of the ion injection target layer through inner portions of the holes by removing the exposed gap filling layer; and performing an ion injection process on the exposed ion injection target layer.

Abstract: Provided is a semiconductor device manufacturing method including: (a) supplying a source gas containing a first element and chlorine to a substrate accommodated in a processing chamber to form an adsorption layer of the source gas on the substrate; (b) supplying a chlorine-containing gas having a composition different from that of the source gas to the substrate while supplying the sources gas before an adsorption of the source gas to the substrate is saturated to suppress the adsorption of the source gas to the substrate; (c) removing the source gas and the chlorine-containing gas remaining on the substrate; (d) supplying a modifying gas including a second element to the substrate to form a layer including the first element and the second element on the substrate by modifying the adsorption layer of the source gas; and (e) removing the modifying gas remaining on the substrate.

Abstract: Separation layers, usable in devices for converting radiation energy to electrical energy, allow at least some of the components of the devices to be separated from one another for disposal thereof. A separation layer may be interposed between and bonded to adjoining layers, and when acted upon by application of an external source, may be degraded to release the layers from one another. Once released, the layers may be disposed of more efficiently and economically, including proper disposal of hazardous waste, and recycling of materials which may be re-usable.

Abstract: A method for manufacturing a photovoltaic cell with a locally diffused rear side, comprising steps of: (a) providing a doped silicon substrate, the substrate comprising a front, sunward facing, surface and a rear surface; (b) forming a silicon dioxide layer on the front surface and the rear surface; (c) depositing a boron-containing doping paste on the rear surface in a pattern, the boron-containing paste comprising a boron compound and a solvent; (d) depositing a phosphorus-containing doping paste on the rear surface in a pattern, the phosphorus-containing doping paste comprising a phosphorus compound and a solvent; (e) heating the silicon substrate in an ambient to a first temperature and for a first time period in order to locally diffuse boron and phosphorus into the rear surface of the silicon substrate.

Abstract: A solar cell including a substrate 1, a nanopillar 11 having diameter D1 connected to the substrate 1, and a nanopillar 12 having diameter D2 connected to the substrate 1 is characterized in that D2 is greater than D1 in order to realize a solar cell having, as the surface structure, a nanopillar array structure with which it is possible to prevent reflection within the broad wavelength region of solar light. A nanopillar array structure 21 formed from two types of nanopillars having different diameters has a point of minimum reflectivity of a nanopillar array structure formed from the nanopillar 11 having diameter D1 and a point of minimum reflectivity of a nanopillar array structure formed from the nanopillar 12 having diameter D2 and therefore, is capable of preventing reflection within the broad wavelength region of solar light.

Abstract: Inverted metamorphic multijunction solar cells having a heterojunction middle subcell and a graded interlayer, and methods of making same, are disclosed herein. The present disclosure provides a method of manufacturing a solar cell using an MOCVD process, wherein the graded interlayer is composed of (InxGa1-x)y Al1-yAs, and is formed in the MOCVD reactor so that it is compositionally graded to lattice match the middle second subcell on one side and the lower third subcell on the other side, with the values for x and y computed and the composition of the graded interlayer determined so that as the layer is grown in the MOCVD reactor, the band gap of the graded interlayer remains constant at 1.5 eV throughout the thickness of the graded interlayer.

Abstract: A back side illumination photodiode includes a light-receiving back side surface of a semiconductor material substrate. An area of the light-receiving back side surface includes a recess. The recess is filled with a material having an optical index that is lower than an optical index of the semiconductor material substrate. Both the substrate and the filling material are transparent to an operating wavelength of the photodiode. The recess may be formed to have a ring shape.

Abstract: An imaging device includes a semiconductor substrate having a photosensitive element for accumulating charge in response to incident image light. The semiconductor substrate includes a light-receiving surface positioned to receive the image light. The imaging device also includes a negative charge layer and a charge sinking layer. The negative charge layer is disposed proximate to the light-receiving surface of the semiconductor substrate to induce holes in an accumulation zone in the semiconductor substrate along the light-receiving surface. The charge sinking layer is disposed proximate to the negative charge layer and is configured to conserve or increase an amount of negative charge in the negative charge layer. The negative charge layer is disposed between the semiconductor substrate and the charge sinking layer.

Abstract: There are disclosed herein various implementations of a method and system for ion implantation at high temperature surface equilibrium conditions. The method may include situating a III-Nitride semiconductor body in a surface equilibrium chamber, establishing a gas pressure greater than or approximately equal to a surface equilibrium pressure of the III-Nitride semiconductor body, and heating the III-Nitride semiconductor body to an elevated implantation temperature in the surface equilibrium chamber while substantially maintaining the gas pressure. The method also includes implanting the III-Nitride semiconductor body in the surface equilibrium at the elevated implantation temperature chamber while substantially maintaining the gas pressure, the implanting being performed using an ion implanter interfacing with the surface equilibrium chamber.

Abstract: In a method of manufacturing a solar cell includes forming a dopant layer by doping a dopant of a first conductive type and a counter dopant of a second conductive type opposite to the first conductive type to a surface of a semiconductor substrate. Here, a doping amount of the counter dopant is less than a doping amount of the dopant.

Abstract: An image sensor system has an input from a photosensor, receiving photogenerated electricity, and coupling said photogenerated electricity to a first photodiode to integrate the photogenerated electricity. The photodiode can be a pinned diode, configured to act integrate charge.

Abstract: A method for manufacturing a solar cell capable of significantly reducing the amount of wastewater generated during a wet-etching process and improving the efficiency of the solar cell. A method comprising: texturing to form an uneven structure on one semiconductor substrate surface by etching the semiconductor substrate surface with a texturing device; forming a temporary layer at an upper portion of the semiconductor substrate surface to surround a first byproduct layer formed at a predetermined region of the semiconductor substrate surface during the texturing; and doping the semiconductor substrate surface with a predetermined dopant using a doping device to form a first semiconductor layer and a second semiconductor layer disposed above the first semiconductor layer and having a different polarity than the first semiconductor layer. The first byproduct layer and the temporary layer are simultaneously removed.

Abstract: A process for producing copper selenide nanoparticles by effecting conversion of a nanoparticle precursor composition comprising copper and selenide ions to the material of the copper selenide nanoparticles in the presence of a selenol compound. Copper selenide-containing films and CIGS semiconductor films produced using copper selenide as a fluxing agent are also disclosed.

Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.

Abstract: The conductive adhesive film of the invention is a conductive adhesive film for electrical connection between photovoltaic cell surface electrodes and wiring members, which comprises an insulating adhesive 2 and conductive particles 1 and has a (t/r) value in the range of 0.75-17.5, where r (?m) is the mean particle size of the conductive particles 1 and t (?m) is the thickness of the conductive adhesive film, wherein the content of the conductive particles 1 is 1.7-15.6 vol % based on the total volume of the conductive adhesive film.

Abstract: Provided is a silicon-wafer-based germanium semiconductor photodetector configured to be able to provide properties of high gain, high sensitivity, and high speed, at a relatively low voltage. A germanium-based carrier multiplication layer (e.g., a single germanium layer or a germanium and silicon superlattice layer) may be provided on a silicon wafer, and a germanium charge layer may be provided thereon, a germanium absorption layer may be provided on the charge layer, and a polysilicon second contact layer may be provided on the absorption layer. The absorption layer may be configured to include germanium quantum dots or wires.

Abstract: A solid-state imaging device includes a pixel that has a photoelectric conversion section which converts incident light into an electric signal; a color filter which is formed corresponding to the pixel; a micro lens which focuses the incident light to the photoelectric conversion section via the color filter; and an in-layer lens which is formed between the color filter and the micro lens and has a refractive index smaller than that of the micro lens.

Abstract: A method for module-level processing of photovoltaic cells is provided. The method includes: bonding at least one crystalline silicon photovoltaic substrate to a carrier by means of an adhesive layer, thereby leaving part of the adhesive layer uncovered; after bonding, exposing the uncovered part of the adhesive layer and the at least one crystalline silicon photovoltaic substrate to a plasma; and removing a surface portion of the at least one crystalline photovoltaic substrate. The method may further include performing an annealing step of the adhesive before bonding the at least one photovoltaic substrate to the carrier, and performing an outgassing step of the adhesive after bonding the at least one photovoltaic substrate to the carrier. The method may further include module-level rear side processing of the at least one crystalline silicon photovoltaic substrate to make a photovoltaic module.

Abstract: Applying quantum dots to surface features of an electronic device to augment or replace reflective and transmissive features. Applying quantum dots can yield more efficient illumination of those features and can permit use of diverse internal light sources to cause those features to emit any color of visible light. An electronic device, keyboard for same and method of applying features to areas of the exterior surface of an electronic device are provided. Quantum dots are applied to an area of the exterior surface that is illuminated by the device's internal light source. The quantum dots absorb incident light then emit predetermined longer wavelength light. The interior light may be a UV light, high energy light emitting diode, or back light. The quantum dots can be applied to exterior surfaces, buttons or key on electronic devices, mobile devices, and keyboards for mobile devices.

Abstract: In some embodiments, Cu—In—Ga precursor films are deposited by co-sputtering from multiple targets. Specifically, the co-sputtering method is used to form layers that include In. The co-sputtering reduces the tendency for the In component to agglomerate and results in smoother, more uniform films. In some embodiments, the Ga concentration in one or more target(s) is between about 25 atomic % and about 66 atomic %. The deposition may be performed in a batch or in-line deposition system. If an in-line deposition system is used, the movement of the substrates through the system may be continuous or may follow a “stop and soak” method of substrate transport.

Abstract: A solid state imaging device including: a plurality of sensor sections formed in a semiconductor substrate in order to convert incident light into an electric signal; a peripheral circuit section formed in the semiconductor substrate so as to be positioned beside the sensor sections; and a layer having negative fixed electric charges that is formed on a light incidence side of the sensor sections in order to form a hole accumulation layer on light receiving surfaces of the sensor sections.

Abstract: Efficiency of silicon photovoltaic solar cells is increased by an annealing process for immobilizing oxygen formed in Czochralski-grown silicon. The annealing process includes a short anneal in a rapid thermal annealing chamber at a high temperature, for example, greater than 1150° C. in an oxygen-containing ambient. More preferably, the wafer is rapidly cooled to less than 950° C. without an intermediate temperature hold, at which temperature oxygen does not nucleate and/or precipitate. Subsequent processing to form a photovoltaic structure is typically performed at relatively low temperatures of less than 1000° C. or even 875° C.

Abstract: A method of preparing Cu(In,Ga)SSe2 Cu(In,Ga) (S,Se)2 (CIGSS) absorber layers uses coated semiconductor nanoparticle and nanowire networks. The nanoparticles and nanowires containing one or more elements from group IB and/or IIIA and/or VIA are prepared from metal salts such as metal chloride and acetate at room temperature without inert gas protection. A uniform and non-aggregation CIGS precursor layer is fabricated with the formation of nanoparticle and nanowire networks utilizing ultrasonic spaying technique. High quality CIGSS film is obtained by cleaning the residue salts and carbon agents at an increased temperature and selenizing the pretreated precursor layer.

Abstract: A method of producing at least one optoelectronic semiconductor chip includes providing at least one optoelectronic structure, including a growth support and a semiconductor layer sequence with an active region, the semiconductor layer sequence being deposited epitaxially on the growth support, providing a carrier, applying the at least one optoelectronic structure onto the carrier with its side remote from the growth support, coating the at least one optoelectronic structure with a protective material, the protective material covering the outer face, remote from the carrier, of the growth support and side faces of the growth support and of the semiconductor layer sequence, and detaching the growth support from the semiconductor layer sequence of the at least one optoelectronic structure.

Abstract: An optical system, such as an integrated monolithic optical bench, includes a three-dimensional curved optical element etched in a substrate such that the optical axis of the optical system lies within the substrate and is parallel to the plane of the substrate.

Abstract: A solar cell is discussed. The solar cell according to an embodiment includes a semiconductor substrate, a first conductive type region and a second conductive type region disposed on the same side of the semiconductor substrate, wherein at least one of the first and second conductive type regions includes a main region and a boundary region disposed at a peripheral portion of the main region, and the boundary region has at least one of a varying doping concentration and a varying doping depth.

Abstract: A method for fabricating a photovoltaic device includes depositing a p-type layer at a first temperature and depositing an intrinsic layer while gradually increasing a deposition temperature to a final temperature. The intrinsic layer deposition is completed at the final temperature. An n-type layer is formed on the intrinsic layer.

Abstract: Methods of forming a photovoltaic structures including nanoparticles are disclosed. The method includes electrospray deposition of nanoparticles. The nanoparticles can include TiO2 nanoparticles and quantum dots. In an example, the nanoparticles are formed on a flexible substrate. In various examples, the flexible substrate is light transparent. Photovoltaic structures and apparatus for forming photovoltaic structures are disclosed.

Abstract: A diffusing agent composition including a condensation product and an impurity diffusion component. The condensation product is a reaction product resulting from hydrolysis of an alkoxysilane. The impurity diffusion component is a monoester or diester of phosphoric acid, or a mixture thereof.

Abstract: A method for manufacturing an interdigitated back contact solar cell, comprising steps of: (a) providing a doped silicon substrate; (b) forming a first silicon dioxide layer on the front surface and the rear surface; (c) depositing a boron-containing doping paste on the first silicon dioxide layer of the rear surface in a first pattern; (d) heating the silicon substrate; (e) removing the first silicon dioxide layer; (f) forming a second silicon dioxide layer on the front surface and the rear surface; (g) depositing a phosphorus-containing doping paste on the second dioxide layer of the rear surface in a second pattern; (h) heating the silicon substrate; and (i) removing the second silicon dioxide layer from the silicon substrate, wherein the first pattern and the second pattern collectively form an interdigitated pattern.

Abstract: A BioMEMS microelectromechanical apparatus and for fabricating the same is disclosed. A substrate is provided with at least one signal conduit formed on the substrate. A sacrificial layer of sacrificial material may be deposited on the signal conduit and optionally patterned to remove sacrificial material from outside the packaging covered area. A bonding layer may be deposited on at least a portion of the signal conduit and on the sacrificial layer when included. The bonding layer may be planarized and patterned to form one or more cap bonding pads and define a packaging covered area. A cap may be bonded on the cap bonding pad to define a capped area and so that the signal conduit extends from outside the capped area to inside the capped area. Additionally, a test material such as a fluid may be provided within the capped area.

Abstract: A method (100; 100a; 100b; 100c) for manufacturing a solar cell from a semiconductor substrate (1) of a first conductivity type, the semiconductor substrate having a front surface (2) and a back surface (3). The method includes in a sequence: texturing (102) the front surface to create a textured front surface (2a); creating (103) by diffusion of a dopant of the first conductivity type a first conductivity-type doped layer (2c) in the textured front surface and a back surface field layer (4) of the first conductivity type in the back surface; removing (105; 104a) the first conductivity-type doped layer from the textured front surface by an etching process adapted for retaining texture of the textured front surface; creating (106) a layer of a second conductivity type (6) on the textured front surface by diffusion of a dopant of the second conductivity type into the textured front surface.

Abstract: The present invention provides methods for making pnictide compositions, particularly photoactive and/or semiconductive pnictides. In many embodiments, these compositions are in the form of thin films grown on a wide range of suitable substrates to be incorporated into a wide range of microelectronic devices, including photovoltaic devices, photodetectors, light emitting diodes, betavoltaic devices, thermoelectric devices, transistors, other optoelectronic devices, and the like. As an overview, the present invention prepares these compositions from suitable source compounds in which a vapor flux is derived from a source compound in a first processing zone, the vapor flux is treated in a second processing zone distinct from the first processing zone, and then the treated vapor flux, optionally in combination with one or more other ingredients, is used to grow pnictide films on a suitable substrate.

Abstract: A method for thermal processing of a silicon substrate wherein first a silicon substrate is heated to an idle load temperature in the range of approximately 700° to 900° C. The silicon substrate is then heated to a temperature in the range of approximately 975° to 1200° C. in less than approximately 20 minutes. After thermal processing, the silicon substrate is cooled to an idle unload temperature in the range of approximately 700° to 900° C. in less than approximately 20 minutes.

Abstract: Various embodiments may relate to a device for the surface treatment of a substrate, including a processing head, which is mounted rotatably about an axis of rotation, and which comprises multiple gas outlets, which are at least partially implemented on a radial outer edge of the processing head.

Abstract: To provide a resource-saving photoelectric conversion device with excellent photoelectric conversion characteristics. Thin part of a single crystal semiconductor substrate, typically a single crystal silicon substrate, is detached to structure a photoelectric conversion device using a thin single crystal semiconductor layer, which is the detached thin part of the single crystal semiconductor substrate. The thin part of the single crystal semiconductor substrate is detached by a method in which a substrate is irradiated with ions accelerated by voltage, or a method in which a substrate is irradiated with a laser beam which makes multiphoton absorption occur. A so-called tandem-type photoelectric conversion device is obtained by stacking a unit cell including a non-single-crystal semiconductor layer over the detached thin part of the single crystal semiconductor substrate.

Abstract: It is the object of the present invention to provide an alkali etching solution for solar cell manufacturing, which is capable of forming uniformly a fine hubbly structure throughout a whole wafer on the surface of a wafer having a silicon as a main component, and still more is applicable to various wafers; and a method for manufacturing a silicon-based substrate for solar cell manufacturing, using the etching solution.