Abstract: The purpose of the present invention is to obtain a finer texture for a silicon substrate having a textured surface and thereby obtain a thinner silicon substrate for a solar cell. The invention provides a silicon substrate that has a thickness of 50 [mu]m or less and substrate surface orientation (111), and that has a textured surface on which a texture has been formed. Such a silicon substrate is produced by a process comprising a step (A) for preparing a silicon substrate that preferably has a thickness of 50 [mu]m or less and substrate surface orientation (111), and a step (B) for texturing by blowing etching as comprising a fluorine-containing gas onto the surface of the prepared silicon substrate.

Abstract: Low bandgap, monolithic, multi-bandgap, optoelectronic devices (10), including PV converters, photodetectors, and LED's, have lattice-matched (LM), double-heterostructure (DH), low-bandgap GaInAs(P) subcells (22, 24) including those that are lattice-mismatched (LMM) to InP, grown on an InP substrate (26) by use of at least one graded lattice constant transition layer (20) of InAsP positioned somewhere between the InP substrate (26) and the LMM subcell(s) (22, 24). These devices are monofacial (10) or bifacial (80) and include monolithic, integrated, modules (MIMs) (190) with a plurality of voltage-matched subcell circuits (262, 264, 266, 270, 272) as well as other variations and embodiments.

Abstract: A method for manufacturing thin film solar cells, includes forming a light permeable first electrode layer in the back light surface of a glass substrate, and formed in the first electrode layer a plurality of first openings for exposing a part of the back light surface therefrom; forming a photoelectric conversion layer on the first electrode layer and the exposed back light surface, and forming a plurality of second openings in the photoelectric conversion layer for exposing a part of the first electrode layer therefrom; and forming a glistening second electrode layer having a plurality of third openings formed therein, wherein the second electrode layer comprises a conductive colloid comprised of non-diffractive fillings and polymeric base material.

Abstract: A method for manufacturing a layer arrangement in accordance with various embodiments may include: providing a first layer having a side; forming one or more nanoholes in the first layer that are open towards the side of the first layer; depositing a second layer over the side of the first layer.

Abstract: A digital X-ray detector includes a scintillator that is configured to absorb radiation emitted from an X-ray radiation source and to emit light photons in response to the absorbed radiation. The detector also includes a complementary metal-oxide-semiconductor (CMOS) light imager that is configured to absorb the light photons emitted by the scintillator. The CMOS light imager includes a first surface and a second surface. The first surface is disposed opposite the second surface. The scintillator contacts the first surface of the CMOS light imager. The CMOS light imager further includes a CMOS pixel array with an array of CMOS pixels. Each individual CMOS pixel includes at least two row select transistors.

Abstract: The present invention relates to an electronic proximity sensor having a decorative surface, characterized in that the decorative surface comprises a semiconductor layer, the thickness of which is between 10 nm and 100 nm. This coating imparts a desired metallic appearance to the proximity sensor, without the property thereof as a proximity sensor being lost.

Abstract: A reusable substrate and method for forming single crystal silicon solar cells are described. A method of forming a photovoltaic cell includes forming an intermediate layer on a monocrystalline silicon substrate, forming a monocrystalline silicon layer on the intermediate layer, and forming electrical features in the monocrystalline silicon layer. The method further includes forming openings in the monocrystalline silicon layer, and detaching the monocrystalline silicon layer from the substrate by selectively etching the intermediate layer through the openings.

Abstract: A center region of conductive material/s may be disposed or “sandwiched” between transition regions of relatively lower conductivity materials to provide substantially low defect density interfaces for the sandwiched material. The center region and surrounding transition regions may in turn be disposed or sandwiched between dielectric insulative material to form a sandwiched and transitioned device structure. The center region of such a sandwiched structure may be implemented, for example, as a device layer such as conductive microbolometer layer for a microbolometer detector structure.

Abstract: A thermal detector includes a thermal detecting element and a support member supporting the thermal detecting element and a wiring layer. The support member has an arm member connected to a mounting member with the first arm member having an arm base end section extending outwardly from the mounting member toward a first direction, the arm base section having a first width measured along a direction perpendicular to the first direction, and an arm body section having a proximal end portion extending from the arm base end section generally along an outer contour of the mounting member with the proximal end portion being spaced apart from an edge of the mounting member in the first direction. The proximal end portion of the arm body section has a second width measured along a direction perpendicular to a lengthwise direction of the arm body section that is narrower than the first width.

Abstract: A solid state imaging device including: a plurality of sensor sections formed in a semiconductor substrate in order to convert incident light into an electric signal; a peripheral circuit section formed in the semiconductor substrate so as to be positioned beside the sensor sections; and a layer having negative fixed electric charges that is formed on a light incidence side of the sensor sections in order to form a hole accumulation layer on light receiving surfaces of the sensor sections.

Abstract: Provided are a solar cell and a method of manufacturing the same. The method includes: preparing a bottom substrate including sequentially stacked first and second portions, each of the first and second portions including a plurality of grains, wherein the maximum grain size of the second portion is less than the minimum grains size of the first portion; exposing the first portion of the bottom substrate by removing the second portion of the bottom substrate; and forming a photovoltaic conversion layer on the first portion of the bottom substrate.

Abstract: This disclosure provides systems, methods and apparatus related to light absorbing structures. In one aspect, a light absorbing structure has a metal layer and a semiconductor layer in contact with the metal layer. Each layer has a thickness up to about 50 nm. The metal layer can include at least one of titanium (Ti), molybdenum (Mo), and aluminum (Al). The semiconductor layer can include a layer of amorphous silicon (a-Si). The light absorbing structure can be included in a display apparatus having a substrate supporting an array of display elements. The light absorbing structure can include a dielectric layer in contact with the metal layer and a thick metal layer in contact with the semiconductor layer. In another aspect, a light absorbing structure has a metal layer and an ITO layer in contact with the metal layer. The thickness of the ITO layer can be less than about 100 nm.

Abstract: Silicon based nanoparticle inks are described with very low metal contamination levels. In particular, metal contamination levels can be established in the parts-per-billion range. The inks of particular interest generally comprise a polymer to influence the ink rheology. Techniques are described that are suitable for purifying polymers soluble in polar solvents, such as alcohols, with respect metal contamination. Very low levels of metal contamination for cellulose polymers are described.

Abstract: A method for preparing an absorbing layer of a solar cell includes the following steps. An absorbing layer precursor containing at least one group XIV element is loaded on a substrate. A solid vapor source containing a group XIV element, the same as the group XIV element in the absorbing layer precursor is provided. The solid vapor source corresponds to the absorbing layer precursor. The solid vapor source and the absorbing layer precursor are kept apart by a distance. A heating process is performed so that the absorbing layer precursor forms an absorbing layer, the solid vapor source is vaporized and generates a gas containing the group XIV element, and the gas containing the group XIV element inhibits the effusion of the group XIV element of the absorbing layer precursor so that the proportion of the group XIV element in the formed absorbing layer is consistent.

Abstract: A semiconductor device includes a substrate having an upper surface that defines a sensing region. A fixed beam structure is supported at a first level above the sensing region. The fixed beam structure includes fixed beam supports that extend upwardly from the upper surface of the substrate to position the fixed beam structure at the first level above the sensing region. An absorber structure is supported above the fixed beam structure at a second level above the sensing region. The absorber structure includes a pillar support that extends upwardly from the fixed beam structure to position the absorber structure at the second level above the sensing region.

Abstract: The organic electroluminescent element (100) of the present invention comprises, on a substrate (1), electrodes (positive electrode (2) and negative electrode (8)) forming a pair and an organic functional layer (20) having at least an electron transport layer (6) and a light emitting layer (5). At least one of the electron transport layer (6) and the light emitting layer (5) contain semiconductor nanoparticles having a conduction band energy level of ?5.5-?1.5 ev.

Abstract: A grid for minimizing effects of ion divergence in plasma ion implant. The plasma grid is made of a flat plate having a plurality of holes, wherein the holes are arranged in a plurality of rows and a plurality of columns thereby forming beamlets of ions that diverge in one direction. A mask is used to form the implanted shapes on the wafer, wherein the holes in the mask are oriented orthogonally to the direction of beamlet divergence.

Abstract: The invention described herein provides for thin films and methods of making comprising inorganic semiconductor-nanocrystals dispersed in semiconducting-polymers in high loading amounts. The invention also describes photovoltaic devices incorporating the thin films.

Abstract: A solid-state imaging device includes a plurality of photoelectric conversion units configured to receive light and generate signal charge, the plurality of photoelectric conversion units being provided in such a manner as to correspond to a plurality of pixels in a pixel area of a semiconductor substrate; and pixel transistors configured to output the signal charge generated by the photoelectric conversion units as electrical signals. Each of the pixel transistors includes at least a transfer transistor that transfers the signal charge generated in the photoelectric conversion unit to a floating diffusion corresponding to a drain. A gate electrode of the transfer transistor is formed in such a manner as to extend with a gate insulating film in between from a channel formed area to a portion where the photoelectric conversion unit has been formed on the surface of the semiconductor substrate.

Abstract: A design structure embodied in a machine readable medium used in a design process includes a first dielectric layer disposed on an intermediary layer, a first conductive pad portion and a first interconnect portion disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer, a first capping layer disposed on the first interconnect portion and a portion of the first conductive pad portion, a second capping layer disposed on the first capping layer and a portion of the second dielectric layer, an n-type doped silicon layer disposed on the second capping layer and the first conductive pad portion, an intrinsic silicon layer disposed on the n-type doped silicon layer, and a p-type doped silicon layer disposed on the intrinsic silicon layer.

Abstract: Techniques for fabricating nanowire/microwire-based solar cells are provided. In one, a method for fabricating a solar cell is provided. The method includes the following steps. A doped substrate is provided. A monolayer of spheres is deposited onto the substrate. The spheres include nanospheres, microspheres or a combination thereof. The spheres are trimmed to introduce space between individual spheres in the monolayer. The trimmed spheres are used as a mask to pattern wires in the substrate. The wires include nanowires, microwires or a combination thereof. A doped emitter layer is formed on the patterned wires. A top contact electrode is deposited over the emitter layer. A bottom contact electrode is deposited on a side of the substrate opposite the wires.

Abstract: A machine, manufacture, article, process, and product produced thereby, as well as necessary intermediates, which in some cases, pertains to power sources, units thereof, etc. Illustratively, the machine can include a convertor, such as a photovoltaic cell, located to produce current that is not essentially steady direct current by repeatedly shadowing the photovoltaic convertor from exposure to radiation such that at least some of the radiation shadowed from the photovoltaic convertor either produces electricity or is reflected to an emitter which subsequently reemits radiation to the photovoltaic convertor or to another photovoltaic convertor.

Abstract: There is set forth herein a method for forming a suspension having nanoparticles. There is also set forth herein a method for making an interface including nanoparticles. A morphology of conductive nanoparticle interface is set forth herein.

Abstract: A structure and method for air cavity packaging, the structure comprises a carrier having plural die pads and leads, plural dies, plural wires, plural walls, and a lid. The dies are mounted on the die pads. The wires electrically connect the dies to the leads. The plural walls are disposed on the carrier and form plural cavities in a way that each cavity contains at least one die pad and plural leads, and each wall is provided with at least one air vent for exhausting air to the outside. The lid is attached on the plural walls via an adhesive agent to seal the plural air cavities, so that the plural connected air cavity packages are formed.

Abstract: A semiconductor device comprises a semiconductor substrate, and a multilayer wiring structure arranged on the semiconductor substrate, the multilayer wiring structure including a plurality of first electrically conductive lines, an insulating film covering the plurality of first electrically conductive lines, and a second electrically conductive line arranged on the insulating film so as to intersect the plurality of first electrically conductive lines, wherein the insulating film has gaps in at least some of a plurality of regions where the plurality of first electrically conductive lines and the second electrically conductive line intersect each other, and a width of the gap in a direction along the second electrically conductive line is not larger than a width of the first electrically conductive line.

Abstract: Systems and methods for separating components of a multilayer stack of electronic components. The multilayer stack includes an electronic assembly, a substrate, and a sacrificial anode portion that is located between the electronic assembly and the substrate and that operatively attaches the electronic assembly to the substrate. The systems and methods may include locating the multilayer stack within an electrically conductive fluid to form an electrochemical cell. The systems and methods further may include generating a potential difference between a cathode portion of the electronic assembly and the sacrificial anode portion such that the cathode portion forms a cathode of the electrochemical cell and the sacrificial anode portion forms an anode of the electrochemical cell.

Abstract: A coherent spin field effect transistor is provided by depositing a ferromagnetic base like cobalt on a substrate. A magnetic oxide layer is formed on the cobalt by annealing at temperatures on the order of 1000° K to provide a few monolayer thick layer. Where the gate is cobalt, the resulting magnetic oxide is Co3O4(111). Other magnetic materials and oxides may be employed. A few ML field of graphene is deposited on the cobalt (III) oxide by molecular beam epitaxy, and a source and drain are deposited of base material. The resulting device is scalable, provides high on/off rates, is stable and operable at room temperature and easily fabricated with existing technology.

Abstract: A method of forming an optoelectronic device. The method includes providing a deposition surface and contacting the deposition surface with a ligand exchange chemical and contacting the deposition surface with a quantum dot (QD) colloid. This initial process is repeated over one or more cycles to form an initial QD film on the deposition surface. The method further includes subsequently contacting the QD film with a secondary treatment chemical and optionally contacting the surface with additional QDs to form an enhanced QD layer exhibiting multiple exciton generation (MEG) upon absorption of high energy photons by the QD active layer. Devices having an enhanced QD active layer as described above are also disclosed.

Abstract: A solid-state image pickup device including: a photoelectric conversion section configured to convert incident light into a signal charge; a transfer transistor configured to read the signal charge from the photoelectric conversion section and transfer the signal charge; and an amplifying transistor configured to amplify the signal charge read by the transfer transistor, wherein a compressive stress film having a compressive stress is formed on the amplifying transistor.

Abstract: A photonic sensor, comprising: a platform, a temperature sensor on the platform; and a structure formed on or as part of the platform.

Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.

Abstract: New photovoltaic device configurations utilize combinations of n-copper indium selenide (n-CIS) absorber and p-type semiconducting organic/polymeric or inorganic materials to maximize the efficiency of solar energy conversion into electric power. Fabrication methods to produce various device configurations, based on n-CIS thin films, nanoparticles, organic or polymeric materials deposited on flexible or rigid substrates are described, that simplify process steps and hence the costs for high volume solar cell manufacturing.

Abstract: According to the present invention there is provided a photovoltaic element, comprising a photovoltaic laminate; a structural substrate; wherein the photovoltaic element further comprises a plurality of hairs which are arranged to improve adhesion between said photovoltaic laminate and said structural substrate. There is also provided an intermediate product which is used in the manufacture of such a photovoltaic element and a method of manufacturing such a photovoltaic element.

Abstract: The challenge for the present invention is to provide a film-forming method and for forming a passivation film which can sufficiently inhibit the loss of carriers due to their recombination; and a method for manufacturing a solar cell element with the use of the method or the device. The film-forming device comprises a mounting portion 22 for mounting a film-forming object, a high frequency power source 25, and a shower plate 23 which is provided to face the film-forming object S mounted on the mounting portion 22, which introduces a film-forming gas, and to which the high frequency power source is connected and a high frequency voltage is applied. A low frequency power source 26 for applying a low frequency voltage is connected to the shower plate or the mounting portion mounting a substrate. The film-forming method is performed using the film-forming device, and the film-forming method is carried out in forming a passivation film.

Abstract: A monolithic, multi-bandgap, tandem solar photovoltaic converter has at least one, and preferably at least two, subcells grown lattice-matched on a substrate with a bandgap in medium to high energy portions of the solar spectrum and at least one subcell grown lattice-mismatched to the substrate with a bandgap in the low energy portion of the solar spectrum, for example, about 1 eV.

Abstract: Embodiments of the invention relate to substrates comprising a base wafer, an insulating layer and a top semiconductor layer, wherein the insulating layer comprises at least a zone wherein a density of charges is in absolute value higher than 1010 charges/cm2. The invention also relates to processes for making such substrates.

Abstract: A method includes a first bonding step of bonding a first main surface of a first solar cell and one side portion of a first wiring member to each other in such a way that the first main surface of the first solar cell and the one side portion are heated and pressed against each other by heated first and second tools in a state where the first main surface of the first solar cell and the one side portion face each other with the resin adhesive interposed therebetween. The first bonding step is performed with the first tool disposed in such a way that, in an extending direction of the first wiring member, both end portions of the first tool are located outside both ends of a portion of the first wiring member, the portion facing the first solar cell with the resin adhesive interposed therebetween.

Abstract: A minute electrode, a photoelectric conversion device including the minute electrode, and manufacturing methods thereof are provided. A plurality of parallel groove portions and a region sandwiched between the groove portions are formed in a substrate, and a conductive resin is supplied to the groove portions and the region and is fixed, whereby the groove portions are filled with the conductive resin and the region is covered with the conductive resin. The supplied conductive resin is not expanded outward, and the electrode with a designed width can be formed. Part of the electrode is formed over the region sandwiched between the groove portions, thus, the area of a cross section in the short axis direction can be large, and a low resistance in the long axis direction can be obtained.

Abstract: A method and device is disclosed for reducing noise in CMOS image sensors. An improved CMOS image sensor includes a light sensing structure surrounded by a support feature section. An active section of the light sensing structure is covered by no more than optically transparent materials. A light blocking portion includes an opaque layer or a black light filter layer in conjunction with an opaque layer, covering the support feature section. The light blocking portion may also cover a peripheral portion of the light sensing structure. The method for forming the CMOS image sensors includes using film patterning and etching processes to selectively form the opaque layer and the black light filter layer where the light blocking portion is desired, but not over the active section. The method also provides for forming microlenses over the photosensors in the active section.

Abstract: A method for forming a back-side illuminated image sensor from a semiconductor substrate, including the steps of: a) forming, from the front surface of the substrate, areas of same conductivity type as the substrate but of higher doping level, extending deep under the front surface, these areas being bordered with insulating regions orthogonal to the front surface; b) thinning the substrate from the rear surface to the vicinity of these areas and all the way to the insulating regions; c) partially hollowing out the insulating regions on the rear to surface side; and d) performing a laser surface anneal of the rear surface of the substrate.

Abstract: In the photoelectric conversion device having a pair of electrodes and a light receiving layer sandwiched between the pair of electrodes and including at least a photoelectric conversion layer, at least a part of the light receiving layer includes a fullerene or a fullerene derivative deposited using a vapor deposition material of a plurality of particles or a compact formed of the particles consisting primarily of the fullerene or fullerene derivative with an average particle size expressed as D50% of 50 to 300 ?m.

Abstract: A method for manufacturing a solid-state imaging device including: forming photo sensor portions in a silicon substrate; forming a wiring portion above said silicon substrate; bonding another substrate onto said wiring portion; removing said substrate in response to performing the bonding of the another substrate onto the wiring portion; and sequentially forming an anti-reflective coating on the silicon substrate, a color filter on the anti-reflective coating, and an on-chip lens.

Abstract: A method of forming of a semiconductor structure has isolation structures. A substrate having a first region and a second region is provided. The first region and the second region are implanted with neutral dopants to form a first etching stop feature and a second stop feature in the first region and the second region, respectively. The first etching stop feature has a depth D1 and the second etching stop feature has a depth D2. D1 is less than D2. The substrate in the first region and the second region are etched to form a first trench and a second trench respectively. The first trench and the second trench land on the first etching stop feature and the second etching stop feature, respectively.

Abstract: A paste composition for a solar cell electrode includes including an organic vehicle, a conductive powder, and a glass frit, the glass frit including TeO2, and a transition metal oxide component, the transitional metal oxide component including one or more of a transition metal oxide having a melting point of about 1300° C. or more.

Abstract: The purpose of the present invention is to improve the throughput of a dye adsorption process in which a dye is adsorbed in a porous semiconductor layer on a substrate and to improve dye use efficiency. In a dye adsorption device of the present invention, a dye solution drop-coating unit 12 performs a first process (dye solution drop-coating process) on an unprocessed substrate G carried in the dye adsorption device 10, in which a dye solution is dropped and coated on a porous semiconductor layer on the substrate G. A solvent evaporating/removing unit 14 performs a second process (solvent removing process) in which a solvent is evaporated and removed from the dye solution coated on the semiconductor layer on the substrate G. A rinsing unit 16 performs a third process (rinsing process) in which unnecessary or extra dye attached to the surface of the semiconductor layer n the substrate G is rinsed and removed.

Abstract: A solid-state imaging element includes a photodiode formed in an upper portion of a semiconductor substrate to perform a photoelectric conversion, a silicon dioxide film formed on the substrate to cover the photodiode, and a silicon nitride film formed on the silicon dioxide film. The silicon nitride film has a thinner portion smaller in thickness than at least an end portion of the silicon nitride film entirely or partly over the photodiode.

Abstract: Radiation detector. The detector includes an ionic junction having an ionically bonded wide band gap material having a first region dominated by positively charged ionic defects in intimate contact with a second region dominated by negatively charged ionic defects forming depleted regions on both sides of the junction resulting in a built-in electric field. The detector also includes an ionic junction having a first ionically bonded wide band gap material dominated by positively charged ionic defects in intimate contact with a second ionically bonded wide band gap material dominated by negatively charged ionic defects forming depleted regions on both sides of the junction resulting in a built-in electric field. Circuit means are provided to establish a voltage across the junction so that radiation impinging upon the junction will cause a current to flow in the circuit.

Abstract: A solar cell includes a substrate having an N-region and a P-region, a first anti-reflective layer disposed on the substrate, a metallic contact disposed on the first anti-reflective layer, a second anti-reflective layer disposed on the first anti-reflective layer and the metallic contact, and a region partially defined by the first anti-reflective layer and the second anti-reflective layer having diffused metallic contact material operative to form a conductive path to the substrate through the first anti-reflective layer, the metallic contact, and the second anti-reflective layer.

Abstract: The method includes: steps of forming an n-type diffusion layer having an n-type impurity diffused thereon at a first surface side of a p-type silicon substrate; forming a reflection prevention film on the n-type diffusion layer; forming a back-surface passivation film made of an SiONH film on a second surface of the silicon substrate; forming a paste material containing silver in a front-surface electrode shape on the reflection prevention film; forming a front surface electrode that is contacted to the n-type diffusion layer by sintering the silicon substrate; forming a paste material containing a metal in a back-surface electrode shape on the back-surface passivation film; and forming a back surface electrode by melting a metal in the paste material by irradiating laser light onto a forming position of the back surface electrode and by solidifying the molten metal.

Abstract: Provided is a transparent graphene film which is prepared by maintaining the primary reduced state of a graphene oxide thin film via chemical reduction, reducing the graphene oxide thin film with chemical vapor deposition, and doping nitrogen, thereby enhancing the conductivity and enabling the control of work function and a manufacturing method thereof. According to the present disclosure, a flexible, transparent, electrical conductivity-enhanced, and work function controllable graphene film can be large area processed and produced in large quantities so that can be applied in real industrial processes by forming a graphene oxide thin film on a substrate, performing the primary chemical reduction using a reducing agent, and performing further the secondary thermal reduction and nitrogen doping by injecting hydrogen and ammonia gas through chemical vapor deposition equipment.