Responsive To Electromagnetic Radiation Patents (Class 438/57)
  • Patent number: 8871552
    Abstract: Although Cl (chlorine) is no longer supplied in the course of a first process in which a detecting layer formed by a polycrystalline film or a polycrystalline lamination film by vapor deposition or sublimation is formed, an additional source (e.g., HCl of Cl-containing gas) other than a source is supplied at the start or in the course of the first process. Thus, the detecting layer as the polycrystalline film or the polycrystalline lamination film of CdTe, ZnTe, or CdZnTe can be doped with Cl uniformly in a thickness direction from the start until the end of the first process in film formation. As a result, uniform crystal particles and uniform detection characteristics can be achieved.
    Type: Grant
    Filed: February 9, 2011
    Date of Patent: October 28, 2014
    Assignees: Shimadzu Corporation, Institute of National Colleges of Technology, Japan
    Inventors: Satoshi Tokuda, Koichi Tanabe, Toshinori Yoshimuta, Hiroyuki Kishihara, Masatomo Kaino, Akina Yoshimatsu, Toshiyuki Sato, Shoji Kuwabara
  • Patent number: 8871619
    Abstract: Solar cells and other semiconductor devices are fabricated more efficiently and for less cost using an implanted doping fabrication system. A system for implanting a semiconductor substrate includes an ion source (such as a single-species delivery module), an accelerator to generate from the ion source an ion beam having an energy of no more than 150 kV, and a beam director to expose the substrate to the beam. In one embodiment, the ion source is single-species delivery module that includes a single-gas delivery element and a single-ion source. Alternatively, the ion source is a plasma source used to generate a plasma beam. The system is used to fabricate solar cells having lightly doped photo-receptive regions and more highly doped grid lines. This structure reduces the formation of “dead layers” and improves the contact resistance, thereby increasing the efficiency of a solar cell.
    Type: Grant
    Filed: June 11, 2009
    Date of Patent: October 28, 2014
    Assignee: Intevac, Inc.
    Inventors: Babak Adibi, Edward S. Murrer
  • Patent number: 8872159
    Abstract: Ultraviolet or Extreme Ultraviolet and/or visible detector apparatus and fabrication processes are presented, in which the detector includes a thin graphene electrode structure disposed over a semiconductor surface to provide establish a potential in the semiconductor material surface and to collect photogenerated carriers, with a first contact providing a top side or bottom side connection for the semiconductor structure and a second contact for connection to the graphene layer.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: October 28, 2014
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Travis Anderson, Karl D. Hobart
  • Publication number: 20140312446
    Abstract: A semiconducting structure configured to receive electromagnetic radiation and transform the received electromagnetic radiation into an electric signal, the semiconductor structure including a semiconducting support within a first surface defining a longitudinal plane, a first zone with a first type of conductivity formed in the support with a second zone with a second type of conductivity that is opposite of the first type of conductivity to form a semiconducting junction. A mechanism limiting lateral current includes a third zone formed in the support in lateral contact with the second zone, the third zone having the second type of conductivity for which majority carriers are electrons. The third zone has a sufficient concentration of majority carriers to have an increase in an apparent gap due to a Moss-Burstein effect.
    Type: Application
    Filed: November 27, 2012
    Publication date: October 23, 2014
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Olivier Gravrand, Gerard Destefanis
  • Publication number: 20140311567
    Abstract: A solar cell includes a semiconductor substrate, a tunneling layer on one surface of the semiconductor substrate, a first conductive type area on the tunneling layer, a second conductive type area on the tunneling layer such that the second conductive type area is separated from the first conductive type area, and a barrier area interposed between the first conductive type area and the second conductive type area such that the barrier area separates the first conductive type area from the second conductive type area.
    Type: Application
    Filed: April 22, 2014
    Publication date: October 23, 2014
    Applicant: LG Electronics Inc.
    Inventors: Minho Choi, Hyunjung Park, Junghoon Choi
  • Patent number: 8865503
    Abstract: A method for forming doped regions in a solar cell includes preparing a first and second surface of a substrate, forming a first doped region doped with a first dopant in a part of the first surface, forming a silicon oxide layer on the first surface, the silicon oxide layer including a first silicon oxide layer on the first doped region and having a first thickness, and a second silicon oxide layer on a portion of the first surface not doped by the first dopant and having a second thickness that is less than the first thickness, implanting a second dopant from outside the first surface into the first silicon oxide layer and the second silicon oxide layer, and forming a second doped region adjacent the first doped region by performing heat treatment on the first silicon oxide layer, the second silicon oxide layer, and the substrate.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: October 21, 2014
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Won-Gyun Kim, Hee-June Kwak, Sang-Jin Park, Sang-Won Seo, Young-Jin Kim
  • Patent number: 8865504
    Abstract: A method for patterning an article, the article comprising a first layer of a first material, a first major surface of the first layer being in intimate contact with some or all of a first major surface of a second layer of a second different material the method comprising providing a first thread carrying a first species to remove at least a portion of the first layer, and providing a second thread aligned with and adjacent the first thread and contacting the first and second threads with the first layer to remove at least part of the first layer.
    Type: Grant
    Filed: April 7, 2011
    Date of Patent: October 21, 2014
    Assignee: Cambridge Enterprise Limited
    Inventor: Michael Niggemann
  • Patent number: 8865502
    Abstract: The present disclosure provides a method of forming a back side surface field of a solar cell without utilizing screen printing. The method includes first forming a p-type dopant layer directly on the back side surface of the semiconductor substrate that includes a p/n junction utilizing an electrodeposition method. The p/n junction is defined as the interface that is formed between an n-type semiconductor portion of the substrate and an underlying p-type semiconductor portion of the substrate. The plated structure is then annealed to from a P++ back side surface field layer directly on the back side surface of the semiconductor substrate. Optionally, a metallic film can be electrodeposited on an exposed surface of the P++ back side surface layer.
    Type: Grant
    Filed: June 10, 2010
    Date of Patent: October 21, 2014
    Assignee: International Business Machines Corporation
    Inventors: Kathryn C. Fisher, Nicholas C. M. Fuller, Satyavolu S. Papa Rao, Xiaoyan Shao, Jeffrey Hedrick
  • Publication number: 20140306111
    Abstract: The present disclosure relates to a multi-layered low temperature co-fired ceramic (LTCC) system on package (SoP) for a millimeter wave optical receiver comprising a top layer, a plurality of first intermediate layers, a plurality of second intermediate layers, and a bottom layer. The top layer further comprises a matching network, passive components, and a signal line disposed on a substrate material, the plurality of first intermediate layers further comprises active amplification components, via holes and a plurality of inner grounding planes that are respectively disposed on a first plurality of LTCC substrates, the plurality of second intermediate layers further comprises a plurality of grounding planes that are respectively disposed on a second plurality of LTCC substrates; and the bottom layer further comprises a grounding plane that is disposed on the bottom surface of the second plurality of LTCC substrates. A method of fabricating the multi-layered LTCC SoP is also described.
    Type: Application
    Filed: April 7, 2014
    Publication date: October 16, 2014
    Applicant: Telekom Malaysia Berhad
    Inventors: Sabrina Mohd Shapee, Mohd Zulfadli Mohamed Yusoff, Azmi Ibrahim, Rosidah Alias, Muhammad Redzuan Saad, Zulkifli Ambak
  • Publication number: 20140308775
    Abstract: A photovoltaic power device includes a P-type silicon substrate, a low-resistance N-type diffusion layer diffused with an N-type impurity in a first concentration formed at a light-incidence surface side, grid electrodes formed on the low-resistance N-type diffusion layer, a P+ layer formed on a back surface, and a back surface electrode formed on the P+ layer. The photovoltaic power device has concave portions provided at a predetermined interval to reach the silicon substrate from an upper surface of the low-resistance N-type diffusion layer, and an upper surface of a region between adjacent concave portions includes the low-resistance N-type diffusion layer. A high-resistance N-type diffusion layer diffused with an N-type impurity in a second concentration, which is lower than the first concentration, is formed in a range of a predetermined depth from a formation surface of the concave portions.
    Type: Application
    Filed: June 25, 2014
    Publication date: October 16, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takashi Ishihara, Kunihiko Nishimura
  • Patent number: 8859889
    Abstract: A solar cell element is disclosed. The solar cell element comprises a semiconductor substrate, a first electrode, a second electrode, a first wiring member and a second wiring member. The semiconductor substrate with a first surface and a second surface comprises a plurality of through-holes. The first electrode comprises a plurality of conduction portions and at least one first output extracting portion. The second electrode has a resistivity of less than 2.5×10-8 ?m (ohm-meter). The first wiring member comprises a first end face in a long direction thereof. The second wiring member comprises a second end face in a long direction thereof facing the first end face.
    Type: Grant
    Filed: April 20, 2011
    Date of Patent: October 14, 2014
    Assignee: KYOCERA Corporation
    Inventor: Koutarou Umeda
  • Patent number: 8861909
    Abstract: A silicon photonic photodetector structure, a method for fabricating the silicon photonic photodetector structure and a method for operating a silicon photonic photodetector device that results from the photonic photodetector structure each use a strip waveguide optically coupled with a polysilicon material photodetector layer that may be contiguous with a semiconductor material slab to which is located and formed a pair of electrical contacts separated by the polysilicon material photodetector layer. Within the foregoing silicon photonic photodetector structure and related methods the polysilicon material photodetector layer includes defect states suitable for absorbing an optical signal from the strip waveguide and generating an electrical output signal using at least one of the electrical contacts when the optical signal includes a photon energy less than a band gap energy of a polysilicon material from which is comprised the polysilicon material photodetector layer.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: October 14, 2014
    Assignee: Cornell University
    Inventors: Michal Lipson, Kyle Preston
  • Patent number: 8859319
    Abstract: Methods of forming photo detectors are provided. The method includes providing a semiconductor layer on a substrate, forming a trench in the semiconductor layer, forming a first single crystalline layer and a second single crystalline layer using a selective single crystalline growth process in the trench, and patterning the first and second single crystalline layers and the semiconductor layer to form a first single crystalline pattern, a second single crystalline pattern and an optical waveguide.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: October 14, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sang Hoon Kim, Gyungock Kim, In Gyoo Kim, JiHo Joo, Ki Seok Jang
  • Patent number: 8859324
    Abstract: Embodiments of the present invention are directed to a process for making solar cells. Particularly, embodiments of the invention provide simultaneously co-firing (e.g., thermally processing) metal layers disposed both on a first and a second surface of a solar cell substrate to complete the metallization process in one step. By doing so, both the metal layers formed on the first and the second surfaces of the solar cell substrate are co-fired (e.g., simultaneously thermally processed), thereby eliminating manufacturing complexity, cycle time and cost to produce the solar cell device. Embodiments of the invention may also provide a method and solar cell structure that requires a reduced amount of a metallization paste on a rear surface of the substrate to form a rear surface contact structure and, thus, reduce the cost of the formed solar cell device.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: October 14, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Michael P. Stewart, Prabhat Kumar, Kapila P. Wijekoon, Lin Zhang, Hari K. Ponnekanti
  • Patent number: 8859321
    Abstract: Fabrication of a tandem photovoltaic device includes forming a bottom cell having an N-type layer, a P-type layer and a bottom intrinsic layer therebetween. A top cell is formed relative to the bottom cell. The top cell has an N-type layer, a P-type layer and a top intrinsic layer therebetween. The top intrinsic layer is formed of an undoped material deposited at a temperature that is different from the bottom intrinsic layer such that band gap energies for the top intrinsic layer and the bottom intrinsic layer are progressively lower for each cell.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: October 14, 2014
    Assignee: International Business Machines Corporation
    Inventors: Ahmed Abou-Kandil, Keith E. Fogel, Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana
  • Publication number: 20140302629
    Abstract: A manufacturing method includes a step of forming an impurity diffusion layer by diffusing an impurity element in a surface of a silicon-based substrate; and an etching step of removing the impurity diffusion layer in at least a portion of a first-surface side of the silicon-based substrate, wherein the etching step includes an etching-fluid supplying step of, on the first-surface side, supplying an etching fluid that flows to an outer edge portion of the silicon-based substrate from a supply position, and an air supplying step of, on a second-surface side, which is opposite to the first-surface side, of the silicon-based substrate, supplying air in a same direction as the etching fluid in accordance with supply of the etching fluid at the etching-fluid supplying step.
    Type: Application
    Filed: February 1, 2012
    Publication date: October 9, 2014
    Applicant: Mitsubish Electric Corporation
    Inventor: Satoshi Hamamoto
  • Patent number: 8851748
    Abstract: The thermal detector includes a substrate, a thermal detector element including a light absorbing film, a support member supporting the thermal detector element and supported on the substrate so that a cavity is present between the member and the substrate, and at least one auxiliary support post of convex shape protruding from either the substrate or the support member towards the other. The height of the at least one auxiliary support post is shorter than the maximum height from the substrate to the support member.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: October 7, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Takafumi Noda
  • Patent number: 8853521
    Abstract: The present disclosure presents a partially-transparent (see-through) three-dimensional thin film solar cell (3-D TFSC) substrate. The substrate includes a plurality of unit cells. Each unit cell structure has the shape of a truncated pyramid, and its parameters may be varied to allow a desired portion of sunlight to pass through.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: October 7, 2014
    Assignee: Solexel, Inc.
    Inventors: Mehrdad Moslehi, David Xuan-Qi Wang
  • Patent number: 8852983
    Abstract: A method for fabrication of capacitive environment sensors is provided in which the sensor elements are integrated in a CMOS structure with electronics through the use of complementary metal oxide semiconductor (CMOS) fabrication methods. Also provided are environment sensors fabricated, for example, by the method, and a measurement system using the environment sensors fabricated by the method. The described method includes etching away one of the metal layers in a CMOS chip to create a cavity. This cavity is then filled with an environment-sensitive dielectric material to form a sensing capacitor between plates formed by the metal adhesion layers or an array of contacts from other metal layers of the CMOS structure. This approach provides improved sensing capabilities in a system that is easily manufactured.
    Type: Grant
    Filed: May 17, 2013
    Date of Patent: October 7, 2014
    Assignee: Carnegie Mellon University
    Inventors: Gary Keith Fedder, Nathan Scott Lazarus
  • Patent number: 8852987
    Abstract: A method of manufacturing an image pickup device includes a step of forming a filling member such that the filling member covers a light guiding part and a peripheral part provided in a film. The light guiding part is positioned on an image pickup region of the image pickup device and has openings that correspond to respective photoelectric conversion portions. The peripheral part is positioned on a peripheral region of the image pickup device. The filling member fills in the openings. The method includes a step of processing the filling member. The method includes a step of forming light guiding members, which is performed after the step of processing filling member has been performed, by a polishing process performed on the filling member so that the light guiding part is exposed. The light guiding members are part of the filling member and disposed in the openings.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: October 7, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yusuke Tsukagoshi, Tadashi Sawayama, Akihiro Kawano, Sho Suzuki, Takehito Okabe, Masatsugu Itahashi
  • Publication number: 20140295607
    Abstract: Methods of forming contacts for solar cells are described. In one embodiment, a method includes forming a silicon layer above a substrate, forming and patterning a solid-state p-type dopant source on the silicon layer, forming an n-type dopant source layer over exposed regions of the silicon layer and over a plurality of regions of the solid-state p-type dopant source, and heating the substrate to provide a plurality of n-type doped silicon regions among a plurality of p-type doped silicon regions.
    Type: Application
    Filed: June 11, 2014
    Publication date: October 2, 2014
    Inventor: Jane Manning
  • Publication number: 20140295608
    Abstract: Methods of forming emitters for back-contact solar cells are described. In one embodiment, a method includes forming a first solid-state dopant source above a substrate. The first solid-state dopant source includes a plurality of regions separated by gaps. Regions of a second solid-state dopant source are formed above the substrate by printing.
    Type: Application
    Filed: June 11, 2014
    Publication date: October 2, 2014
    Inventors: Bo Li, Peter J. Cousins, David D. Smith
  • Publication number: 20140290738
    Abstract: The present invention is a method comprising depositing a metal oxide layer as part of the production of an optoelectrically active device and exposing the metal oxide layer to a reactive agent to form a relatively hydrophobic surface. The invention also includes device so made, preferably a photovoltaic device, which shows improved stability as compared to devices not subject to the treatment.
    Type: Application
    Filed: December 7, 2012
    Publication date: October 2, 2014
    Applicant: Dow Global Technologies LLC
    Inventors: Andrzej M. Malek, Todd R. Bryden, Peter C Lebaron
  • Publication number: 20140291704
    Abstract: An infra-red (IR) device comprising a dielectric membrane formed on a silicon substrate comprising an etched portion; and at least one patterned layer formed within or on the dielectric membrane for controlling IR emission or IR absorption of the IR device, wherein the at least one patterned layer comprises laterally spaced structures.
    Type: Application
    Filed: June 10, 2014
    Publication date: October 2, 2014
    Inventors: Syed Zeeshan ALI, Florin UDREA, Julian GARDNER, Richard Henry HOOPER, Andrea DE LUCA, Mohamed Foysol CHOWDHURY, Ilie POENARU
  • Patent number: 8846437
    Abstract: Embodiments of the invention provide a method of forming a doped gallium arsenide based (GaAs) layer from a solution based precursor. The doped gallium arsenide based (GaAs) layer formed from the solution based precursor may assist solar cell devices to improve light absorption and conversion efficiency. In one embodiment, a method of forming a solar cell device includes forming a first layer with a first type of dopants doped therein over a surface of a substrate, forming a GaAs based layer on the first layer, and forming a second layer with a second type of dopants doped therein on the GaAs based layer.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: September 30, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Kaushal K. Singh, Robert Jan Visser, Srikant Rao, Bhaskar Kumar, Claire J. Carmalt, Ranga Rao Arnepalli, Omkaram Nalamasu, Gaurav Saraf, Sanjayan Sathasivam, Christopher Stuart Blackman
  • Patent number: 8846431
    Abstract: A solar cell is formed on an n-type semiconductor substrate having a p+ emitter layer by forming spaced-apart contact/protection structures on the emitter layer, depositing a blanket dielectric passivation layer over the substrate's upper surface, utilizing laser ablation to form contact openings through the dielectric layer that expose corresponding contact/protection structures, and then forming metal gridlines on the upper surface of the dielectric layer that are electrically connected to the contact structures by way of metal via structures extending through associated contact openings. The contact/protection structures serve both as protection against substrate damage during the contact opening formation process (i.e., to prevent damage of the p+ emitter layer caused by the required high energy laser pulses), and also serve as optional silicide sources that facilitate optimal contact between the metal gridlines and the p+ emitter layer.
    Type: Grant
    Filed: May 6, 2014
    Date of Patent: September 30, 2014
    Assignee: Palo Alto Research Center Incorporated
    Inventor: Baomin Xu
  • Publication number: 20140283899
    Abstract: A frameless solar module having a substrate and a cover layer between which a layer structure for forming solar cells is located is described. At least one module carrier for reinforcing and/or supporting mounting of the solar module is fastened to a substrate surface facing away from the layer structure, the module carrier having at least one adhesive surface, which is adhered to the substrate surface by an adhesive layer made of a cured adhesive. The adhesive layer has one or a plurality of spacers which are designed to keep the adhesive surface at a specifiable minimum distance from the substrate surface when the adhesive of the adhesive layer is not cured. The spacers have different dimensions for maintaining the distance between the adhesive surface of the module carrier and the substrate surface.
    Type: Application
    Filed: November 21, 2012
    Publication date: September 25, 2014
    Inventors: Robert Gass, Dieter Kleyer
  • Publication number: 20140284670
    Abstract: A solid-state imaging device includes a semiconductor substrate configured to include a solid-state imaging element that is provided with a photoelectric conversion region, and a scribe line region that is provided along a periphery of the solid-state imaging element, a wiring layer that is formed to be layered on the semiconductor substrate, a support substrate that is formed to be layered on the wiring layer, and a groove that is provided between a blade region in the scribe line region and the solid-state imaging element, in the semiconductor substrate and penetrates through the semiconductor substrate.
    Type: Application
    Filed: June 2, 2014
    Publication date: September 25, 2014
    Inventor: Hiroyuki Kawashima
  • Publication number: 20140284744
    Abstract: A semiconductor device includes a first substrate having an attaching surface on which first electrodes and a first insulating film are exposed, an insulating thin film that covers the attaching surface of the first substrate, and a second substrate which has an attaching surface on which second electrodes and a second insulating film are exposed and is attached to the first substrate in a state in which the attaching surface of the second substrate and the attaching surface of the first substrate are attached together sandwiching the insulating thin film therebetween, and the first electrodes and the second electrodes deform and break a part of the insulating thin film so as to be directly electrically connected to each other.
    Type: Application
    Filed: March 12, 2014
    Publication date: September 25, 2014
    Applicant: Sony Corporation
    Inventors: Nobutoshi Fujii, Yoshiya Hagimoto, Kenichi Aoyagi, Yoshihisa Kagawa
  • Publication number: 20140283902
    Abstract: One embodiment of the present invention provides a back junction solar cell. The solar cell includes a base layer, a quantum-tunneling-barrier (QTB) layer situated below the base layer facing away from incident light, an emitter layer situated below the QTB layer, a front surface field (FSF) layer situated above the base layer, a front-side electrode situated above the FSF layer, and a back-side electrode situated below the emitter layer.
    Type: Application
    Filed: May 6, 2014
    Publication date: September 25, 2014
    Applicant: Silevo, Inc.
    Inventors: Jiunn Benjamin Heng, Jianming Fu, Zheng Xu, Zhigang Xie
  • Patent number: 8841157
    Abstract: A thin film photovoltaic device includes a substrate and a first conductive layer coupled to the substrate. The first conductive layer includes at least one first groove extending through a first portion of the first conductive layer to a portion of the substrate. The device also includes at least one semiconductor layer coupled to a remaining portion of the first conductive layer and the portion of the substrate. The at least one semiconductor layer includes a plurality of non-overlapping vias, each via extending through a portion of the at least one semiconductor layer to a portion of the first conductive layer. The device further includes a second conductive layer coupled to a remaining portion of the at least one semiconductor layer and portions of the first conductive layer. The second conductive layer includes at least one second groove extending through a portion of the second conductive layer to a portion of the at least one semiconductor layer.
    Type: Grant
    Filed: January 4, 2012
    Date of Patent: September 23, 2014
    Assignee: Esi-Pyrophotonics Lasers Inc
    Inventor: Matthew Rekow
  • Patent number: 8841541
    Abstract: In a solar battery including: a photoelectric conversion layer that converts light into electricity; and a reflecting electrode layer that is provided on an opposite side of a light incident side in the photoelectric conversion layer and reflects light passed through the photoelectric conversion layer to the photoelectric conversion layer side, to realize a reflecting electrode layer having excellent adhesion and thermal corrosion resistance, stable electrical characteristics and satisfactory light reflection characteristics and to obtain a solar battery having high reliability, excellent electrical characteristics and optical characteristics, the reflecting electrode layer includes, on the photoelectric conversion layer side, a metal layer containing silver as a main component and containing nitrogen.
    Type: Grant
    Filed: September 4, 2009
    Date of Patent: September 23, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takumi Nakahata, Kazunori Inoue, Yusuke Yamagata
  • Publication number: 20140264711
    Abstract: Light sensors are described that include a trench structure integrated therein. In an implementation, the light sensor includes a substrate having a dopant material of a first conductivity type and multiple trenches disposed therein. The light sensor also includes a diffusion region formed proximate to the multiple trenches. The diffusion region includes a dopant material of a second conductivity type. A depletion region is created at the interface of the dopant material of the first conductivity type and the dopant material of the second conductivity type. The depletion region is configured to attract charge carriers to the depletion region, at least substantially a majority of the charge carriers generated due to light incident upon the substrate.
    Type: Application
    Filed: March 10, 2014
    Publication date: September 18, 2014
    Applicant: Maxim Integrated Products, Inc.
    Inventors: Nicole D. Kerness, Christopher F. Edwards, Khanh Tran, Joy T. Jones, Pirooz Parvarandeh
  • Publication number: 20140273327
    Abstract: A solid state imaging device includes: a substrate; a photoelectric conversion unit that is formed on the substrate to generate and accumulate signal charges according to light quantity of incident light; a vertical transmission gate electrode that is formed to be embedded in a groove portion formed in a depth direction from one side face of the substrate according to a depth of the photoelectric conversion unit; and an overflow path that is formed on a bottom portion of the transmission gate to overflow the signal charges accumulated in the photoelectric conversion unit.
    Type: Application
    Filed: June 2, 2014
    Publication date: September 18, 2014
    Applicant: Sony Corporation
    Inventor: Ryosuke Nakamura
  • Publication number: 20140273326
    Abstract: Methods for protecting a texturized region and a lightly doped diffusion region of a solar cell to improve solar cell lifetime and efficiency are disclosed. In an embodiment, an example method includes providing a solar cell having a front side which faces the sun during normal operation and a back side opposite the front side, a silicon substrate and where the silicon substrate includes a texturized region and a lightly doped diffusion region. The method includes placing the solar cell on a receiving medium with the front side of the solar cell placed on an upper surface of the receiving medium, where the upper surface of the receiving medium prevents damage to the to the lightly doped diffusion region and damage to the texturized region on the front side of the solar cell during a contact printing process or transferring. In an embodiment, the lightly doped diffusion region has a doping concentration below 1×1019 cm?3 and the receiving medium includes a material having a moh's hardness in the range of 5-10.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: SunPower Corporation
    Inventors: Staffan Westerberg, Florito Dennis Tingchuy Vicente, Michael Cudzinovic
  • Publication number: 20140261648
    Abstract: A metamaterial of an array of photovoltaic bristles may enable each photovoltaic bristle to have a high probability of photon absorption. The high probability of photon absorption may lead to increased efficiency and more power generation from an array of photovoltaic bristles. A completed photovoltaic device may benefit from further total efficiency gains by implementing a corrugated structure in the metamaterial and/or an assembled solar panel of metamaterials. Various methods to manufacture these metamaterial devices may include utilize stamping methods, photolithographic techniques, etching techniques, deposition techniques, as well as the creation of vias to form arrays of photovoltaic bristles for the metamaterial photovoltaic devices.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: Q1 Nanosystems Corporation
    Inventors: Robert SMITH, Mark R. Schroeder, Larry Bawden, John Fisher
  • Publication number: 20140273328
    Abstract: A semiconductor device is fabricated by performing the steps of: (a) implanting dopant ions into a semiconductor base member, which is made of single-crystal Si, to define at least one of an n-type region and a p-type region in the semiconductor base member; (b) conducting a first heat treatment on the semiconductor base member, in which the n-type or p-type region has been defined, at a temperature rise/fall rate of 40° C./sec or more and with the highest temperature to reach set within the range of 1000° C. to 1200° C.; and (c) conducting a second heat treatment on the semiconductor base member, which has gone through the first heat treatment, at a lower temperature rise/fall rate than in the first heat treatment.
    Type: Application
    Filed: May 16, 2013
    Publication date: September 18, 2014
    Inventors: Akihiko Sagara, Satoshi Shibata
  • Publication number: 20140261655
    Abstract: A solar cell with an absorber layer including three dimensional tubular projections and the method for forming the same, is provided. The three dimensional tubular projections are formed in various configurations and include surfaces facing in various directions and are adapted to absorb sunlight directed to the solar cell panel at various angles. The method for forming the absorber layer includes introducing impurities onto a layer over a solar cell substrate to form as nucleation sites and depositing an absorber layer to form a base layer portion and tubular projections at the nucleation sites. The solar cell is exposed to sunlight and the absorber layer including the three dimensional tubular projections, absorbs direct and reflected sunlight directed to the solar cell at various angles.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: WAFERTECH, LLC
    Inventors: Re-Long Chiu, Shu-Lan Ying
  • Patent number: 8835333
    Abstract: A heat treatment method of the present invention includes mounting a plurality of semiconductor wafers upright on a treatment boat in parallel to each other, inserting the treatment boat in a space above an injector located in a tube to be oriented to plane surfaces of the semiconductor wafers in parallel to an extending direction of the tube, and heating the tube while continuously supplying source gas into the tube through openings of the injector.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: September 16, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Narihito Ota, Kunihiko Nishimura
  • Patent number: 8835269
    Abstract: A method of manufacturing a solid-state image sensor having photoelectric conversion elements and one or more MOS transistors are formed on a semiconductor substrate is provided. The method includes forming a resist pattern having an opening and a shielding portion over the substrate; and implanting ions in the substrate through the opening. When the substrate is viewed from a direction, an isolation region that is positioned between accumulation regions adjacent to one another is exposed in the opening, and when viewed from a different direction, a channel region of the MOS transistors is exposed in the opening, and the isolation region is shielded by the shielding portion. Ions irradiated in the direction are implanted in the isolation region, and ions irradiated in the different direction are implanted in the channel region.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: September 16, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mahito Shinohara, Junji Iwata
  • Publication number: 20140256078
    Abstract: Methods, systems, and devices are described for slicing and shaping materials using magnetically guided chemical etching. In one aspect, a method includes forming a pattern on a substrate by a mask, depositing a catalytic etcher layer on the patterned substrate, a magnetic guide layer on the etcher layer, and a protection layer on the guide layer, etching the substrate by applying an etching solution to the substrate that chemically reacts with the etcher layer and etches material from the substrate at exposed regions not covered by the mask, steering the composite etching structure into the substrate during the etching by an applied magnetic field that creates a force on the guide layer to direct the etching, in which the steering defines the shape of the sliced regions of the etched substrate, and removing the etched material, the mask, and the composite etching structure to produce a sliced material structure.
    Type: Application
    Filed: October 12, 2012
    Publication date: September 11, 2014
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Sungho Jin, Young Oh, Chulmin Choi, Dae-Hoon Hong, Tae Kyoung Kim
  • Patent number: 8828789
    Abstract: It is the gist of the present invention to provide a photovoltaic device in which a single crystal semiconductor layer provided over a substrate having an insulating surface or an insulating substrate is used as a photoelectric conversion layer, and the single crystal semiconductor layer is provided with a so-called SOI structure where the single crystal semiconductor layer is bonded to the substrate with an insulating layer interposed therebetween. As the single crystal semiconductor layer having a function as a photoelectric conversion layer, a single crystal semiconductor layer obtained by separation and transfer of an outer layer portion of a single crystal semiconductor substrate is used.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: September 9, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Patent number: 8829342
    Abstract: A photovoltaic cell structure is disclosed that includes a buffer/passivation layer at a CdTe/Back contact interface. The buffer/passivation layer is formed from the same material that forms the n-type semiconductor active layer. In one embodiment, the buffer layer and the n-type semiconductor active layer are formed from cadmium sulfide (CdS). A method of forming a photovoltaic cell includes the step of forming the semiconductor active layers and the buffer/passivation layer within the same deposition chamber and using the same material source.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: September 9, 2014
    Assignee: The University of Toledo
    Inventors: Alvin D. Compaan, Victor V. Plotnikov
  • Patent number: 8829337
    Abstract: Novel structures of photovoltaic cells (also treated as solar cells) are provided. The cells are based on nanometer-scaled wires, tubes, and/or rods, which are made of electronic materials covering semiconductors, insulators or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells will have enormous applications in space, commercial, residential, and industrial applications.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: September 9, 2014
    Assignee: Banpil Photonics, Inc.
    Inventor: Achyut Kumar Dutta
  • Patent number: 8828775
    Abstract: An image sensor includes an epi-layer of a first conductivity type formed in a substrate, a photodiode formed in the epi-layer, and a first doping region of a second conductivity type formed under the photodiode to separate the first doping region from the photodiode.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: September 9, 2014
    Assignee: Intellectual Ventures II LLC
    Inventor: Youn-Sub Lim
  • Publication number: 20140246713
    Abstract: A semiconductor structure for suppressing hot clusters includes a substrate of a first dopant concentration, an epitaxial layer having a second dopant concentration smaller than the first dopant concentration and directly disposed on the substrate, a dopant gradient region disposed in the epitaxial layer and having a gradient decreasing from the substrate to the epitaxial layer, a shallow trench isolation disposed between a first element region and a second element region, and a shallow trench doping region surrounding the shallow trench isolation and near the dopant gradient region to suppress a hot cluster formed by the first element region to jeopardize the second element region.
    Type: Application
    Filed: March 3, 2014
    Publication date: September 4, 2014
    Applicant: Himax Imaging, Inc.
    Inventors: Yang Wu, Feixia Yu, Chung-Wei Chang
  • Publication number: 20140248733
    Abstract: The present invention provides a method of manufacturing a photoelectric conversion device for forming a semiconductor layer on a substrate by the plasma CVD method. The method includes a first plasma processing step in which a processing temperature reaches a first temperature; a second plasma processing step in which the processing temperature reaches a second temperature; a temperature regulating step of lowering the processing temperature to a third temperature lower than the first temperature and the second temperature after the first plasma processing step and before the second plasma processing step; and a temperature raising step of raising the processing temperature from the third temperature to the second temperature. The first plasma processing step, the temperature regulating step, the temperature raising step, and the second plasma processing step are carried out within the same reaction chamber.
    Type: Application
    Filed: September 27, 2012
    Publication date: September 4, 2014
    Inventors: Shinya Honda, Yoshiyuki Nasuno, Takashi Yamada, Kazuhito Nishimura
  • Patent number: 8822262
    Abstract: A laser contact process is employed to form contact holes to emitters of a solar cell. Doped silicon nanoparticles are formed over a substrate of the solar cell. The surface of individual or clusters of silicon nanoparticles is coated with a nanoparticle passivation film. Contact holes to emitters of the solar cell are formed by impinging a laser beam on the passivated silicon nanoparticles. For example, the laser contact process may be a laser ablation process. In that case, the emitters may be formed by diffusing dopants from the silicon nanoparticles prior to forming the contact holes to the emitters. As another example, the laser contact process may be a laser melting process whereby portions of the silicon nanoparticles are melted to form the emitters and contact holes to the emitters.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: September 2, 2014
    Assignee: SunPower Corporation
    Inventors: Paul Loscutoff, Steve Molesa, Taeseok Kim
  • Patent number: 8822813
    Abstract: An improved submicron gap thermophotovoltaic structure and method comprising an emitter substrate with a first surface for receiving heat energy and a second surface for emitting infrared radiation across an evacuated submicron gap to a juxtaposed first surface of an infrared radiation-transparent window substrate having a high refractive index. A second surface of the infrared radiation-transparent substrate opposite the first surface is affixed to a photovoltaic cell substrate by an infrared-transparent compliant adhesive layer. Relying on the high refractive index of the infrared radiation-transparent window substrate, the low refractive index of the submicron gap and Snell's law, the infrared radiation received by the first surface of the infrared radiation-transparent window substrate is focused onto a more perpendicular path to the surface of the photovoltaic cell substrate. This results in increased electrical power output and improved efficiency by the thermophotovoltaic structure.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: September 2, 2014
    Assignee: MTPV Power Corporation
    Inventors: Paul Greiff, Robert Dimatteo, Eric Brown, Christopher Leitz
  • Patent number: 8822255
    Abstract: A method of manufacturing a solar cell, which includes an edge deletion step using a laser beam, and a manufacturing apparatus which is used in such a method, the method and the apparatus being capable of preventing a shunt and cracks from being generated are provided. By radiating a first laser beam to a multilayer body, which includes a transparent electrode layer, a photoelectric conversion layer, and a back electrode layer sequentially formed on a transparent substrate, from a side of the transparent substrate, the photoelectric conversion layer and the back electrode layer in a first region are removed, and by radiating a second laser beam into the region such that the second laser beam is spaced from a peripheral rim of the region, the transparent electrode layer in a second region is removed.
    Type: Grant
    Filed: August 30, 2010
    Date of Patent: September 2, 2014
    Assignee: Ulvac, Inc.
    Inventors: Yoshiaki Yamamoto, Hitoshi Ikeda, Tomoki Ohnishi, Kouichi Tamagawa