Responsive To Electromagnetic Radiation Patents (Class 438/57)
  • Patent number: 8901024
    Abstract: Ozone treated carbon electrodes can provide increased catalytic activity, such as in a dye-sensitized solar cell (DSSC) or other electrochemical device or other device that could benefit from an increased catalytic activity, such as lithium ion or other batteries, hydrogen fuel cells, or electroanalytical instruments. Devices, methods of making, and methods of using are discussed.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: December 2, 2014
    Assignee: The Trustees of Columbia University in the City of New York
    Inventors: Jessika E. Trancik, James C. Hone
  • Patent number: 8900907
    Abstract: A method for removing the growth substrate of a circuit of electromagnetic radiation detection, especially in the infrared or visible range, said detection circuit including a layer of detection of said radiation made of Hg(1-x)CdxTe obtained by liquid or vapor phase epitaxy or by molecular beam epitaxy, said detection circuit being hybridized on a read circuit. The method includes submitting the growth substrate to a mechanical or chem.-mech. polishing step or to a chemical etch step to decrease its thickness, all the way to an interface area between the material of the detection circuit and the growth substrate; and submitting the interface thus obtained to an iodine treatment.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: December 2, 2014
    Assignees: Societe Francaise de Detecteurs Infrarouges-Sofradir, Centre National de la Recherche Scientifique
    Inventors: Christophe Pautet, Arnaud Etcheberry, Alexandre Causier, Isabelle Gerard
  • Patent number: 8901412
    Abstract: The disclosure relates to multiple quantum well (MQW) structures for intrinsic regions of monolithic photovoltaic junctions within solar cells which are substantially lattice matched to GaAs or Ge. The disclosed MQW structures incorporate quantum wells formed of quaternary InGaAsP, between barriers of InGaP.
    Type: Grant
    Filed: September 28, 2009
    Date of Patent: December 2, 2014
    Assignee: JDS Uniphase Corporation
    Inventor: John Roberts
  • Patent number: 8900906
    Abstract: In one embodiment, a method of forming a semiconductor device includes providing a substrate, forming a sacrificial layer above the substrate layer, forming a first trench in the sacrificial layer, forming a first sidewall layer with a thickness of less than about 50 nm on a first sidewall of the first trench using atomic layer deposition (ALD), and removing the sacrificial layer.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: December 2, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Gary Yama, Fabian Purkl, Matthieu Liger, Matthias Illing
  • Patent number: 8900908
    Abstract: The invention relates to a method for local high-doping and contacting of a semiconductor structure which is a solar cell or a precursor of a solar cell and has a silicon semiconductor substrate (1) of a base doping type. The high-doping and contacting is effected by producing a plurality of local high-doping regions of the base doping type in the semiconductor substrate (1) on a contacting side (1a) of the semiconductor substrate and applying a metal contacting layer (7) to the contacting side (1a) or, if applicable, one or more intermediate layers wholly or partially covering the contacting side (1a), to form electrically conductive connections between the metal contacting layer (7) and the semiconductor substrate (1) at the high doping regions.
    Type: Grant
    Filed: January 18, 2011
    Date of Patent: December 2, 2014
    Assignees: Fraunhofer-Gesellschaft zur Förderung der Angewandten Forschung E.V., Albert-Ludwigs-Universität Freiburg
    Inventors: Dominik Suwito, Jan Benick, Ulrich Jager
  • Patent number: 8901587
    Abstract: A display panel apparatus includes a substrate and an organic electro-luminescence unit that includes an array. The array is above the substrate and includes a red, a green, and a blue pixel. A glass layer is above the organic electro-luminescence unit. A resin layer is between the glass layer and the organic electro-luminescence unit. A surface of the resin layer that is on a side toward the organic electro-luminescence unit includes concaves. Each of the concaves is concaved toward the glass layer and corresponds to one of the pixels. Lens resins are each in one of the concaves and include a surface that is substantially coplanar with the surface of the resin layer. A refractive index of the lens resin in the concave that corresponds to the blue pixel is greater than a refractive index of the lens resin in the concave that corresponds to the red pixel.
    Type: Grant
    Filed: May 21, 2012
    Date of Patent: December 2, 2014
    Assignee: Panasonic Corporation
    Inventor: Takashi Ohta
  • Patent number: 8895839
    Abstract: Photovoltaic devices (e.g., solar cells) are disclosed that include at least three radiation absorbing layers, each capable of absorbing radiation over a different wavelength range of the solar radiation spectrum. Any two of these three wavelength ranges can be partially overlapping, or alternatively they can be distinct. The layers are disposed relative to one another so as to form two junctions, each of which includes a depletion region. In some cases, the radiation absorbing layers can collectively absorb radiation over a wavelength range that spans at least about 60%, or 70%, or 80%, and preferably 90% of the solar radiation wavelength spectrum. By way of example, in some embodiments, one layer can exhibit significant absorption of solar radiation (e.g., it can absorb at least one radiation wavelength at an absorptance greater than about 90%) at wavelengths less than about 0.7 microns while another layer can exhibit significant absorption of the solar radiation at wavelengths in a range of about 0.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: November 25, 2014
    Assignee: President And Fellows of Harvard College
    Inventors: Eric Mazur, Mark Winkler, Brian R. Tull
  • Patent number: 8895416
    Abstract: Systems and methods for semiconductor device PN junction fabrication are provided. In one embodiment, a method for fabricating an electrical device having a P-N junction comprises: depositing a layer of amorphous semiconductor material onto a crystalline semiconductor base, wherein the crystalline semiconductor base comprises a crystalline phase of a same semiconductor as the amorphous layer; and growing the layer of amorphous semiconductor material into a layer of crystalline semiconductor material that is epitaxially matched to the lattice structure of the crystalline semiconductor base by applying an optical energy that penetrates at least the amorphous semiconductor material.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: November 25, 2014
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: Bhushan Sopori, Anikara Rangappan
  • Patent number: 8895342
    Abstract: Inverted metamorphic multijunction solar cells having a heterojunction middle subcell and a graded interlayer, and methods of making same, are disclosed herein. The present disclosure provides a method of manufacturing a solar cell using an MOCVD process, wherein the graded interlayer is composed of (InxGa1-x)yAl1-yAs, and is formed in the MOCVD reactor so that it is compositionally graded to lattice match the middle second subcell on one side and the lower third subcell on the other side, with the values for x and y computed and the composition of the graded interlayer determined so that as the layer is grown in the MOCVD reactor, the band gap of the graded interlayer remains constant at 1.5 eV throughout the thickness of the graded interlayer.
    Type: Grant
    Filed: May 17, 2012
    Date of Patent: November 25, 2014
    Assignee: Emcore Solar Power, Inc.
    Inventors: Mark A. Stan, Arthur Cornfeld
  • Patent number: 8895346
    Abstract: A solid-state imaging device includes: a pixel section including, in a semiconductor substrate, plural photoelectric conversion sections that photoelectrically convert incident light to generate signal charges; metal wirings formed, on a first insulating film formed on the semiconductor substrate, above regions among the photoelectric conversion sections and above the periphery of the pixel section; a second insulating film formed on the first insulating film to cover the metal wirings; a first light shielding film formed on the second insulating film and having an opening above the pixel section; and a second light shielding film formed above the metal wirings above the pixel section and having thickness smaller than that of the first light shielding film.
    Type: Grant
    Filed: July 5, 2012
    Date of Patent: November 25, 2014
    Assignee: Sony Corporation
    Inventor: Masaaki Takizawa
  • Patent number: 8895350
    Abstract: A method for forming a nanostructure according to one embodiment includes creating a hole in an insulating layer positioned over an electrically conductive layer; and forming a nanocable in the hole such that the nanocable extends through the hole in the insulating layer and protrudes therefrom, the nanocable being in communication with the electrically conductive layer. Additional systems and methods are also presented.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: November 25, 2014
    Assignees: Q1 Nanosystems, Inc, The Regents of the University of California
    Inventors: Brian Argo, Ruxandra Vidu, Pieter Stroeve, John Argo, Saif Islam, Jie-Ren Ku, Michael Chen
  • Patent number: 8894887
    Abstract: Photovoltaic cells comprising an active layer comprising, as p-type material, conjugated polymers such as polythiophene and regioregular polythiophene, and as n-type material at least one fullerene derivative. The fullerene derivative can be C60, C70, or C84. The fullerene also can be functionalized with indene groups. Improved efficiency can be achieved.
    Type: Grant
    Filed: April 10, 2013
    Date of Patent: November 25, 2014
    Assignees: Solvay USA, Inc., Nano-C, Inc.
    Inventors: Darin W. Laird, Reza Stegamat, Henning Richter, Victor Vejins, Lawrence T. Scott, Thomas A. Lada, II
  • Publication number: 20140342489
    Abstract: A method of manufacturing a silicon-containing film includes a first step of drying cleaning a chamber with a fluorine-containing gas, a second step of loading a substrate into the chamber, a third step of purging the chamber with a silane-based gas, with the substrate being provided in the chamber, and a fourth step of forming the silicon-containing film on the substrate after the third step.
    Type: Application
    Filed: December 21, 2012
    Publication date: November 20, 2014
    Inventors: Yoshiyuki Nasuno, Atsushi Tomyo
  • Patent number: 8890275
    Abstract: The invention discloses an optoelectronic device and method of fabricating the same. The optoelectronic device according to the invention includes a semiconductor structure combination, a first surface passivation layer formed on an upper surface of the semiconductor structure combination, and a second surface passivation layer formed on the first surface passivation layer. The semiconductor structure combination includes at least one P-N junction. In particular, the interfacial state density of the first surface passivation layer is lower than that of the second surface passivation layer, and the fixed oxide charge density of the second surface passivation layer is higher than that of the first surface passivation layer.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: November 18, 2014
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Miin-Jang Chen, Hsin-Jui Chen, Wen-Ching Hsu
  • Patent number: 8890271
    Abstract: Various embodiments for etching of silicon nitride (SixNy) lightpipes, waveguides and pillars, fabricating photodiode elements, and integration of the silicon nitride elements with photodiode elements are described. The results show that the quantum efficiency of the photodetectors (PDs) can be increased using vertical silicon nitride vertical waveguides.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: November 18, 2014
    Assignees: Zena Technologies, Inc., President and Fellows of Harvard College
    Inventors: Turgut Tut, Peter Duane, Young-June Yu, Winnie N. Ye, Munib Wober, Kenneth B. Crozier
  • Patent number: 8889455
    Abstract: An embodiment relates to a method of manufacturing a device comprising a substrate having a front side and a back-side, a nanowire disposed on the back-side and an image sensing circuit disposed on the front side, wherein the nanowire is configured to be both a channel to transmit wavelengths up to a selective wavelength and an active element to detect the wavelengths up to the selective wavelength transmitted through the nanowire.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: November 18, 2014
    Assignee: Zena Technologies, Inc.
    Inventors: Peter Duane, Young-June Yu, Munib Wober
  • Patent number: 8890128
    Abstract: The present invention provides an organic display device, comprising: an organic solar module for obtaining solar energy and converting the obtained solar energy into electric power, and an ultraviolet organic light emitting module driven to emit ultraviolet light by the electric power obtained from the organic solar module. The present invention can fully use solar energy and carry out ultraviolet display by combining the ultraviolet organic light emitting module with the organic solar module.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: November 18, 2014
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventors: Yawei Liu, Yuan-Chun Wu
  • Publication number: 20140335641
    Abstract: A method for fabricating a sensor includes: forming, on a base substrate, a pattern of a source electrode and a drain electrode, a pattern of a data line, a pattern of a receiving electrode, a pattern of a photodiode, and a pattern of a transparent electrode disposed by using a first patterning process; forming a pattern of an ohmic layer by using a second patterning process; forming a pattern of an active layer by using a third patterning process; forming a pattern of a gate insulating layer by using a fourth patterning process, wherein the gate insulating layer has a via hole above the transparent electrode; and forming a pattern of a gate electrode, a pattern of a gate line, and a pattern of a bias line connected to the transparent electrode via the via hole above the transparent electrode by using a fifth patterning process
    Type: Application
    Filed: November 16, 2012
    Publication date: November 13, 2014
    Inventors: Shaoying Xu, Zhenyu Xie, Xu Chen
  • Patent number: 8883539
    Abstract: The invention relates to a solar cell (1) comprising an emitter layer (11) at a front side (10) and a base layer (12) at the rear side (20). The solar collects first charge carriers at the front side (10) and second charge carriers at the rear side (20). The solar cell (1) further comprises at least one collecting point (14?) provided at the rear side (20) and a corresponding electrical conducting path to guide the first charge carriers from the front side (10) to the at least one collecting point (14?). An insulating layer (40) is provided between at least part of the electrical conducting path and the base layer (12) to provide electrical insulation between the electrical conductive path and the base layer (12).
    Type: Grant
    Filed: May 10, 2011
    Date of Patent: November 11, 2014
    Assignee: Stichting Energieonderzoek Centrum Nederland
    Inventors: Ingrid Gerdina Romijn, Jan Hendrik Bultman, Agnes Andrea Mewe, Arthur Wouter Weeber, Machteld Willemijn Petronel Elisabeth Lamers
  • Patent number: 8883540
    Abstract: A method for manufacturing a photovoltaic module formed on a corrugated-sheet building material includes: shaping a base board in a manner that the base board thus shaped takes on a corrugated-sheet shape and therefore not only has thereon alternating grooves and ridges but also a processing surface defined between a said groove and an adjacent said ridge; forming a photovoltaic module on the processing surface of the base board by stacking a bottom adhesive film layer, a photovoltaic layer, a top adhesive film layer, and a condensing film layer on the processing surface in bottom-to-top order; rolling the photovoltaic module and the base board against each other at 130˜180° C. to effectuate engagement therebetween; and performing lamination within hermetically sealed space at 140˜170° C. and 2˜10 kg/cm2 for 5˜10 minutes. A back plate layer is disposed beneath the bottom adhesive film layer and connected to the base board through another adhesive film layer.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: November 11, 2014
    Inventor: Yaue-Sheng Chang
  • Patent number: 8883537
    Abstract: A circuit layer is formed on a surface of a substrate and includes a transistor. A photoelectric conversion element includes a photoelectric conversion layer of a chalcopyrite-type semiconductor provided between a first electrode and a second electrode. A supply layer is formed between the circuit layer and the photoelectric conversion layer and contains an Ia group element. Diffusion of the Ia group element to the photoelectric conversion layer improves the photoelectric conversion efficiency. A protective layer is formed between the supply layer and the circuit layer and prevents the diffusion of the Ia group element to the circuit layer.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: November 11, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Manabu Kudo
  • Patent number: 8883538
    Abstract: A high power density photo-electronic and photo-voltaic material comprising a bio-inorganic nanophotoelectronic material with a photosynthetic reaction center protein encapsulated inside a multi-wall carbon nanotube or nanotube array. The array can be on an electrode. The photosynthetic reaction center protein can be immobilized on the electrode surface and the protein molecules can have the same orientation. A method of making a high power density photo-electronic and photo-voltaic material comprising the steps of immobilizing a bio-inorganic nanophotoelectronic material with a photosynthetic reaction center protein inside a carbon nanotube, wherein the immobilizing is by passive diffusion, wherein the immobilizing can include using an organic linker.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: November 11, 2014
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Nikolai Lebedev, Scott A Trammell, Stanislav Tsoi, Mark E Twigg, Joel M Schnur
  • Publication number: 20140329352
    Abstract: The present structure and method for fabrication thereof provides a photovoltaic cell structure for converting light energy into electrical energy. According to one embodiment, a pillared photovoltaic cell structure comprises an array of pillars that are situated closely to each other to take advantage of both the wave-like properties and the particle-like properties of light to enhance the energy conversion efficiency of the photovoltaic cell. According to one embodiment, a pillared photovoltaic cell structure incorporating self-aligned P/P+ junctions enable holes generated near the top surface of the cell structure to be captured by the self-aligned P/P+ junctions.
    Type: Application
    Filed: July 16, 2014
    Publication date: November 6, 2014
    Inventor: Kyu Hyun Choi
  • Publication number: 20140326893
    Abstract: A radiation imager including: a detector block including at least one detector configured to emit an optical signal from incident radiation to be imaged; a reading block that converts the optical signal into an electrical signal, including a plurality of photodetectors; a plurality of resin portions between the detector block and the photodetectors, in contact with the detector block and in contact with the photodetectors, the resin portions being separated by air, the resin portions including at least a part with cross-section increasing from the detector block to the reading block.
    Type: Application
    Filed: December 14, 2012
    Publication date: November 6, 2014
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Eric Gros D'Aillon, Luc Andre, Vincent Reboud
  • Patent number: 8878053
    Abstract: A bipolar solar cell includes a backside junction formed by an N-type silicon substrate and a P-type polysilicon emitter formed on the backside of the solar cell. An antireflection layer may be formed on a textured front surface of the silicon substrate. A negative polarity metal contact on the front side of the solar cell makes an electrical connection to the substrate, while a positive polarity metal contact on the backside of the solar cell makes an electrical connection to the polysilicon emitter. An external electrical circuit may be connected to the negative and positive metal contacts to be powered by the solar cell. The positive polarity metal contact may form an infrared reflecting layer with an underlying dielectric layer for increased solar radiation collection.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: November 4, 2014
    Assignee: SunPower Corporation
    Inventor: Peter John Cousins
  • Patent number: 8877539
    Abstract: A method for producing of at least one photovoltaic cell includes successively the anisotropic etching of a surface of a crystalline silicon substrate and the isotropic etching treatment of said surface. The isotropic etching treatment includes at least two successive operations respectively consisting in forming a silicon oxide thin film with a controlled average thickness, ranging between 10 nm and 500 nm and in removing said thin film thus-formed. The operation consisting in forming a silicon oxide thin film on the face of the substrate is carried out by a thermally activated dry oxidation. Such a method makes it possible to improve the surface quality of the surface of the substrate once said surface is etched in an anisotropic way.
    Type: Grant
    Filed: January 26, 2011
    Date of Patent: November 4, 2014
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Hubert Moriceau, Pierre Mur, Pierre-Jean Ribeyron
  • Patent number: 8877658
    Abstract: Methods for performing directed self-assembly (DSA) of block copolymer (BCP) material on a substrate are disclosed. The BCP is disposed over a patterned neutral layer made from a random copolymer. The BCP is annealed with a laser to induce the directed self-assembly. The scan type may include single scan, multiple scan, or multiple scan with overlap. A variety of power settings and dwell times may be used within a single wafer to achieve multiple heating conditions within a single wafer.
    Type: Grant
    Filed: October 17, 2012
    Date of Patent: November 4, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventor: Kenji Yoshimoto
  • Publication number: 20140318627
    Abstract: A method of manufacturing a polymer composite film for an active layer of a photovoltaic cell according to an embodiment of this invention includes providing a quantity of a solution of a polymer matrix material, mixing a quantity of a guest material with the quantity of the solution of polymer matrix material to form a blend of active material, and controlling a growth rate of the polymer composite film to control an amount of self-organization of polymer chains in the polymer matrix material. A polymer composite film for an active layer of a photovoltaic cell is produced according to this method.
    Type: Application
    Filed: April 29, 2014
    Publication date: October 30, 2014
    Applicant: The Regents of the University of California
    Inventors: Yang Yang, Gang Li
  • Patent number: 8872159
    Abstract: Ultraviolet or Extreme Ultraviolet and/or visible detector apparatus and fabrication processes are presented, in which the detector includes a thin graphene electrode structure disposed over a semiconductor surface to provide establish a potential in the semiconductor material surface and to collect photogenerated carriers, with a first contact providing a top side or bottom side connection for the semiconductor structure and a second contact for connection to the graphene layer.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: October 28, 2014
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Travis Anderson, Karl D. Hobart
  • Patent number: 8871608
    Abstract: A method for fabricating a backside-illuminated sensor includes providing a thin film semiconductor lamina having a first conductivity, and forming a doped region having a second conductivity within the lamina and at a front surface of the lamina. The lamina may be provided as a free-standing lamina, or may be provided as a semiconductor donor body from which the lamina is cleaved. An electrical connection is formed to the doped region. A temporary carrier is contacted to the back surface of the semiconductor and later removed. A backside-illuminated sensor is fabricated from the semiconductor lamina, in which the thickness of the semiconductor lamina remains substantially unchanged during the fabrication process.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: October 28, 2014
    Assignee: GTAT Corporation
    Inventors: Venkatesan Murali, Arvind Chari, Gopal Prabhu, Christopher J. Petti
  • Patent number: 8871628
    Abstract: An electrode structure comprises a semiconductor junction comprising an n-type semiconductor layer and a p-type semiconductor layer; a hole exnihilation layer on the p-type semiconductor layer; and a transparent electrode layer on the hole exnihilation layer. The electrode structure further comprises a conductive layer between the hole exnihilation layer and the transparent electrode layer. In the electrode structure, one or more of the hole exnihilation layer, the conductive layer and the transparent electrode layer may be formed by an atomic layer deposition. In the electrode structure, a transparent electrode formed of a degenerated n-type oxide semiconductor does not come in direct contact with a p-type semiconductor, and thus, annihilation or recombination of holes generated in the p-type semiconductor can be reduced, which increases the carrier generation efficiency.
    Type: Grant
    Filed: January 19, 2010
    Date of Patent: October 28, 2014
    Assignee: Veeco ALD Inc.
    Inventor: Sang In Lee
  • Patent number: 8871619
    Abstract: Solar cells and other semiconductor devices are fabricated more efficiently and for less cost using an implanted doping fabrication system. A system for implanting a semiconductor substrate includes an ion source (such as a single-species delivery module), an accelerator to generate from the ion source an ion beam having an energy of no more than 150 kV, and a beam director to expose the substrate to the beam. In one embodiment, the ion source is single-species delivery module that includes a single-gas delivery element and a single-ion source. Alternatively, the ion source is a plasma source used to generate a plasma beam. The system is used to fabricate solar cells having lightly doped photo-receptive regions and more highly doped grid lines. This structure reduces the formation of “dead layers” and improves the contact resistance, thereby increasing the efficiency of a solar cell.
    Type: Grant
    Filed: June 11, 2009
    Date of Patent: October 28, 2014
    Assignee: Intevac, Inc.
    Inventors: Babak Adibi, Edward S. Murrer
  • Patent number: 8871552
    Abstract: Although Cl (chlorine) is no longer supplied in the course of a first process in which a detecting layer formed by a polycrystalline film or a polycrystalline lamination film by vapor deposition or sublimation is formed, an additional source (e.g., HCl of Cl-containing gas) other than a source is supplied at the start or in the course of the first process. Thus, the detecting layer as the polycrystalline film or the polycrystalline lamination film of CdTe, ZnTe, or CdZnTe can be doped with Cl uniformly in a thickness direction from the start until the end of the first process in film formation. As a result, uniform crystal particles and uniform detection characteristics can be achieved.
    Type: Grant
    Filed: February 9, 2011
    Date of Patent: October 28, 2014
    Assignees: Shimadzu Corporation, Institute of National Colleges of Technology, Japan
    Inventors: Satoshi Tokuda, Koichi Tanabe, Toshinori Yoshimuta, Hiroyuki Kishihara, Masatomo Kaino, Akina Yoshimatsu, Toshiyuki Sato, Shoji Kuwabara
  • Publication number: 20140312446
    Abstract: A semiconducting structure configured to receive electromagnetic radiation and transform the received electromagnetic radiation into an electric signal, the semiconductor structure including a semiconducting support within a first surface defining a longitudinal plane, a first zone with a first type of conductivity formed in the support with a second zone with a second type of conductivity that is opposite of the first type of conductivity to form a semiconducting junction. A mechanism limiting lateral current includes a third zone formed in the support in lateral contact with the second zone, the third zone having the second type of conductivity for which majority carriers are electrons. The third zone has a sufficient concentration of majority carriers to have an increase in an apparent gap due to a Moss-Burstein effect.
    Type: Application
    Filed: November 27, 2012
    Publication date: October 23, 2014
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Olivier Gravrand, Gerard Destefanis
  • Publication number: 20140311567
    Abstract: A solar cell includes a semiconductor substrate, a tunneling layer on one surface of the semiconductor substrate, a first conductive type area on the tunneling layer, a second conductive type area on the tunneling layer such that the second conductive type area is separated from the first conductive type area, and a barrier area interposed between the first conductive type area and the second conductive type area such that the barrier area separates the first conductive type area from the second conductive type area.
    Type: Application
    Filed: April 22, 2014
    Publication date: October 23, 2014
    Applicant: LG Electronics Inc.
    Inventors: Minho Choi, Hyunjung Park, Junghoon Choi
  • Patent number: 8865503
    Abstract: A method for forming doped regions in a solar cell includes preparing a first and second surface of a substrate, forming a first doped region doped with a first dopant in a part of the first surface, forming a silicon oxide layer on the first surface, the silicon oxide layer including a first silicon oxide layer on the first doped region and having a first thickness, and a second silicon oxide layer on a portion of the first surface not doped by the first dopant and having a second thickness that is less than the first thickness, implanting a second dopant from outside the first surface into the first silicon oxide layer and the second silicon oxide layer, and forming a second doped region adjacent the first doped region by performing heat treatment on the first silicon oxide layer, the second silicon oxide layer, and the substrate.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: October 21, 2014
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Won-Gyun Kim, Hee-June Kwak, Sang-Jin Park, Sang-Won Seo, Young-Jin Kim
  • Patent number: 8865504
    Abstract: A method for patterning an article, the article comprising a first layer of a first material, a first major surface of the first layer being in intimate contact with some or all of a first major surface of a second layer of a second different material the method comprising providing a first thread carrying a first species to remove at least a portion of the first layer, and providing a second thread aligned with and adjacent the first thread and contacting the first and second threads with the first layer to remove at least part of the first layer.
    Type: Grant
    Filed: April 7, 2011
    Date of Patent: October 21, 2014
    Assignee: Cambridge Enterprise Limited
    Inventor: Michael Niggemann
  • Patent number: 8865502
    Abstract: The present disclosure provides a method of forming a back side surface field of a solar cell without utilizing screen printing. The method includes first forming a p-type dopant layer directly on the back side surface of the semiconductor substrate that includes a p/n junction utilizing an electrodeposition method. The p/n junction is defined as the interface that is formed between an n-type semiconductor portion of the substrate and an underlying p-type semiconductor portion of the substrate. The plated structure is then annealed to from a P++ back side surface field layer directly on the back side surface of the semiconductor substrate. Optionally, a metallic film can be electrodeposited on an exposed surface of the P++ back side surface layer.
    Type: Grant
    Filed: June 10, 2010
    Date of Patent: October 21, 2014
    Assignee: International Business Machines Corporation
    Inventors: Kathryn C. Fisher, Nicholas C. M. Fuller, Satyavolu S. Papa Rao, Xiaoyan Shao, Jeffrey Hedrick
  • Publication number: 20140306111
    Abstract: The present disclosure relates to a multi-layered low temperature co-fired ceramic (LTCC) system on package (SoP) for a millimeter wave optical receiver comprising a top layer, a plurality of first intermediate layers, a plurality of second intermediate layers, and a bottom layer. The top layer further comprises a matching network, passive components, and a signal line disposed on a substrate material, the plurality of first intermediate layers further comprises active amplification components, via holes and a plurality of inner grounding planes that are respectively disposed on a first plurality of LTCC substrates, the plurality of second intermediate layers further comprises a plurality of grounding planes that are respectively disposed on a second plurality of LTCC substrates; and the bottom layer further comprises a grounding plane that is disposed on the bottom surface of the second plurality of LTCC substrates. A method of fabricating the multi-layered LTCC SoP is also described.
    Type: Application
    Filed: April 7, 2014
    Publication date: October 16, 2014
    Applicant: Telekom Malaysia Berhad
    Inventors: Sabrina Mohd Shapee, Mohd Zulfadli Mohamed Yusoff, Azmi Ibrahim, Rosidah Alias, Muhammad Redzuan Saad, Zulkifli Ambak
  • Publication number: 20140308775
    Abstract: A photovoltaic power device includes a P-type silicon substrate, a low-resistance N-type diffusion layer diffused with an N-type impurity in a first concentration formed at a light-incidence surface side, grid electrodes formed on the low-resistance N-type diffusion layer, a P+ layer formed on a back surface, and a back surface electrode formed on the P+ layer. The photovoltaic power device has concave portions provided at a predetermined interval to reach the silicon substrate from an upper surface of the low-resistance N-type diffusion layer, and an upper surface of a region between adjacent concave portions includes the low-resistance N-type diffusion layer. A high-resistance N-type diffusion layer diffused with an N-type impurity in a second concentration, which is lower than the first concentration, is formed in a range of a predetermined depth from a formation surface of the concave portions.
    Type: Application
    Filed: June 25, 2014
    Publication date: October 16, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takashi Ishihara, Kunihiko Nishimura
  • Patent number: 8861909
    Abstract: A silicon photonic photodetector structure, a method for fabricating the silicon photonic photodetector structure and a method for operating a silicon photonic photodetector device that results from the photonic photodetector structure each use a strip waveguide optically coupled with a polysilicon material photodetector layer that may be contiguous with a semiconductor material slab to which is located and formed a pair of electrical contacts separated by the polysilicon material photodetector layer. Within the foregoing silicon photonic photodetector structure and related methods the polysilicon material photodetector layer includes defect states suitable for absorbing an optical signal from the strip waveguide and generating an electrical output signal using at least one of the electrical contacts when the optical signal includes a photon energy less than a band gap energy of a polysilicon material from which is comprised the polysilicon material photodetector layer.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: October 14, 2014
    Assignee: Cornell University
    Inventors: Michal Lipson, Kyle Preston
  • Patent number: 8859889
    Abstract: A solar cell element is disclosed. The solar cell element comprises a semiconductor substrate, a first electrode, a second electrode, a first wiring member and a second wiring member. The semiconductor substrate with a first surface and a second surface comprises a plurality of through-holes. The first electrode comprises a plurality of conduction portions and at least one first output extracting portion. The second electrode has a resistivity of less than 2.5×10-8 ?m (ohm-meter). The first wiring member comprises a first end face in a long direction thereof. The second wiring member comprises a second end face in a long direction thereof facing the first end face.
    Type: Grant
    Filed: April 20, 2011
    Date of Patent: October 14, 2014
    Assignee: KYOCERA Corporation
    Inventor: Koutarou Umeda
  • Patent number: 8859319
    Abstract: Methods of forming photo detectors are provided. The method includes providing a semiconductor layer on a substrate, forming a trench in the semiconductor layer, forming a first single crystalline layer and a second single crystalline layer using a selective single crystalline growth process in the trench, and patterning the first and second single crystalline layers and the semiconductor layer to form a first single crystalline pattern, a second single crystalline pattern and an optical waveguide.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: October 14, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sang Hoon Kim, Gyungock Kim, In Gyoo Kim, JiHo Joo, Ki Seok Jang
  • Patent number: 8859321
    Abstract: Fabrication of a tandem photovoltaic device includes forming a bottom cell having an N-type layer, a P-type layer and a bottom intrinsic layer therebetween. A top cell is formed relative to the bottom cell. The top cell has an N-type layer, a P-type layer and a top intrinsic layer therebetween. The top intrinsic layer is formed of an undoped material deposited at a temperature that is different from the bottom intrinsic layer such that band gap energies for the top intrinsic layer and the bottom intrinsic layer are progressively lower for each cell.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: October 14, 2014
    Assignee: International Business Machines Corporation
    Inventors: Ahmed Abou-Kandil, Keith E. Fogel, Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana
  • Patent number: 8859324
    Abstract: Embodiments of the present invention are directed to a process for making solar cells. Particularly, embodiments of the invention provide simultaneously co-firing (e.g., thermally processing) metal layers disposed both on a first and a second surface of a solar cell substrate to complete the metallization process in one step. By doing so, both the metal layers formed on the first and the second surfaces of the solar cell substrate are co-fired (e.g., simultaneously thermally processed), thereby eliminating manufacturing complexity, cycle time and cost to produce the solar cell device. Embodiments of the invention may also provide a method and solar cell structure that requires a reduced amount of a metallization paste on a rear surface of the substrate to form a rear surface contact structure and, thus, reduce the cost of the formed solar cell device.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: October 14, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Michael P. Stewart, Prabhat Kumar, Kapila P. Wijekoon, Lin Zhang, Hari K. Ponnekanti
  • Publication number: 20140302629
    Abstract: A manufacturing method includes a step of forming an impurity diffusion layer by diffusing an impurity element in a surface of a silicon-based substrate; and an etching step of removing the impurity diffusion layer in at least a portion of a first-surface side of the silicon-based substrate, wherein the etching step includes an etching-fluid supplying step of, on the first-surface side, supplying an etching fluid that flows to an outer edge portion of the silicon-based substrate from a supply position, and an air supplying step of, on a second-surface side, which is opposite to the first-surface side, of the silicon-based substrate, supplying air in a same direction as the etching fluid in accordance with supply of the etching fluid at the etching-fluid supplying step.
    Type: Application
    Filed: February 1, 2012
    Publication date: October 9, 2014
    Applicant: Mitsubish Electric Corporation
    Inventor: Satoshi Hamamoto
  • Patent number: 8853521
    Abstract: The present disclosure presents a partially-transparent (see-through) three-dimensional thin film solar cell (3-D TFSC) substrate. The substrate includes a plurality of unit cells. Each unit cell structure has the shape of a truncated pyramid, and its parameters may be varied to allow a desired portion of sunlight to pass through.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: October 7, 2014
    Assignee: Solexel, Inc.
    Inventors: Mehrdad Moslehi, David Xuan-Qi Wang
  • Patent number: 8851748
    Abstract: The thermal detector includes a substrate, a thermal detector element including a light absorbing film, a support member supporting the thermal detector element and supported on the substrate so that a cavity is present between the member and the substrate, and at least one auxiliary support post of convex shape protruding from either the substrate or the support member towards the other. The height of the at least one auxiliary support post is shorter than the maximum height from the substrate to the support member.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: October 7, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Takafumi Noda
  • Patent number: 8852983
    Abstract: A method for fabrication of capacitive environment sensors is provided in which the sensor elements are integrated in a CMOS structure with electronics through the use of complementary metal oxide semiconductor (CMOS) fabrication methods. Also provided are environment sensors fabricated, for example, by the method, and a measurement system using the environment sensors fabricated by the method. The described method includes etching away one of the metal layers in a CMOS chip to create a cavity. This cavity is then filled with an environment-sensitive dielectric material to form a sensing capacitor between plates formed by the metal adhesion layers or an array of contacts from other metal layers of the CMOS structure. This approach provides improved sensing capabilities in a system that is easily manufactured.
    Type: Grant
    Filed: May 17, 2013
    Date of Patent: October 7, 2014
    Assignee: Carnegie Mellon University
    Inventors: Gary Keith Fedder, Nathan Scott Lazarus
  • Patent number: 8852987
    Abstract: A method of manufacturing an image pickup device includes a step of forming a filling member such that the filling member covers a light guiding part and a peripheral part provided in a film. The light guiding part is positioned on an image pickup region of the image pickup device and has openings that correspond to respective photoelectric conversion portions. The peripheral part is positioned on a peripheral region of the image pickup device. The filling member fills in the openings. The method includes a step of processing the filling member. The method includes a step of forming light guiding members, which is performed after the step of processing filling member has been performed, by a polishing process performed on the filling member so that the light guiding part is exposed. The light guiding members are part of the filling member and disposed in the openings.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: October 7, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yusuke Tsukagoshi, Tadashi Sawayama, Akihiro Kawano, Sho Suzuki, Takehito Okabe, Masatsugu Itahashi