Abstract: In a stream data processing method in which part of stream data is defined as a processing target and the time control information which indicates the advance of the time is inserted into the stream data, time information of the received stream data is stored in a next ignition time holding area as an ignition time. A processing module for generating the time control information at a time different from the time of reception of the stream data is extracted out of a query that indicates how the stream data is to be processed. Based on the extracted processing module and the time information indicating the time of the reception of the stream data, the ignition time is calculated and stored in the next ignition time holding area. The time generation module inserts the time control information at the ignition time held in the next ignition time holding area.

Abstract: Illustrated is a system and method for identifying a memory page that is accessible via a common physical address, the common physical address simultaneously accessed by a hypervisor remapping the physical address to a machine address, and the physical address used as part of a DMA operation generated by an I/O device that is programmed by a VM. It also includes transmitting data associated with the memory page as part of a memory disaggregation regime, the memory disaggregation regime to include an allocation of an additional memory page, on a remote memory device, to which the data will be written. It further includes updating a P2M translation table associated with the hypervisor, and an IOMMU translation table associated with the I/O device, to reflect a mapping from the physical address to a machine address associated with the remote memory device and used to identify the additional memory page.

Abstract: Disclosed is a method of adjusting a reception threshold value in data reception. The method comprises: generating a transmission signal on the basis of a clock regenerated from a reception signal, determining a worst phase at which a bit error rate becomes maximum by changing a phase of the transmission signal, and adjusting a reception threshold value in the state of the worst phase. The worst phase is determined by detecting the bit error rate by shifting the phase of the transmission signal by a predetermined interval while fixing the reception threshold value to a predetermined value.

Abstract: The present invention is a submarine mast antenna controller for controlling a plurality of functions performed by an antenna mast of a submarine. The submarine mast antenna controller is a solid state electronic control unit on a single card that monitors various submarine mast antenna system sensors and motors, and controls electromechanical devices associated with the sensors and improves functionality over the former ACU system by consolidating control interfaces and indicators in one computer terminal via a VXI interface.

Abstract: An apparatus, method, and program accesses a USB memory in accordance with a request from a PC on a network using a USB host interface, a USB device interface, a network interface, a network manager which inputs, via the network interface, a file access command which requests access to a memory card connected to the USB host interface, a memory manager which inputs the file access command generated inside an apparatus, a file access controller which performs exclusive access control between the file access commands input by the network and memory managers, a SCSI analyzer which converts the file access command selected by the file access controller into a SCSI command, and a memory card access controller which performs exclusive access control between the SCSI command generated by the conversion, and a SCSI command input via the USB device interface and requests access to the memory card.

Abstract: In one embodiment, a receiver on a credit-based flow-controlled interface is configured to free one or more data credits early when a data payload is received that incurs fewer unused data credits within a buffer memory that is allocated at a coarser granularity than the data credits. In another embodiment, header credits and data credits are dynamically adjusted based on actual packet data payload sizes.

Abstract: An apparatus and method for connectivity in networks configured for non-disruptive disconnection of one or more peripheral devices are disclosed. The apparatus includes a first logical layer associated with a first peripheral device, the first peripheral device arranged in a network configured for non-disruptive disconnection of at least one peripheral device, at least a second logical layer associated with at least a second peripheral device, the at least a second peripheral device arranged in the network configured for non-disruptive disconnection of at least one peripheral device, at least one power source associated with the first logical layer and the at least a second logical layer, and a first electrically conductive link coupled to the first logical layer, the at least a second logical layer, and the at least one power source associated with the first logical layer and the at least a second logical layer.

Abstract: MW of an FCMDB sequentially registers device configuration information of MDRs 1 and 2 in the FCMDB. The MW registers the device configuration information of the MDR 2 in the FCMDB, including a process policy indicating that “at a class lower than or equal to a Server class, an unknown component is added to last of device configuration integration information”, which is provided by the MDR 2 as a process policy in a case where the device configuration information of the MDR 2 is read. An MW 2 reconstructs the device configuration information of the MDR 2, according to order information of metadata of the device configuration information of the MDR 2 and a predetermined process policy indicating that “at a class not higher than a Server class, an unknown component is added to last of device configuration integration information”, as a process policy to reconstruct the device configuration information.

Abstract: For image processing, user's setting of an item is received, and the item set by the user is recorded with information on situation of the setting of the item as setting log data. A parameter on reuse value is calculated based on one or more setting log data in the recorded setting log data, and operation information including the one or more setting log information is stored related with the parameter. When it is decided that the parameter satisfies a reference value, and the one or more setting log data having the parameter is presented.

Abstract: Methods, systems, and apparatus, including medium-encoded computer program products, for abstracting data acquisition and management. One or more aspects of the subject matter described in this specification can be embodied in one or more methods including: providing a cross-platform application program interface for a software application that runs in an application execution environment running on a computing platform; receiving a request, through the cross-platform application program interface, from the software application for access to a real-time sensor device; and in response to the request, identifying which of multiple predetermined sensor devices is currently available, the identified sensor device being configured to provide real-time data, determining an interval based on information associated with the software application, and providing data derived from the identified sensor device to the software application in accordance with the interval.

Abstract: In one embodiment, an apparatus comprises a first interface circuit, a direct memory access (DMA) controller coupled to the first interface circuit, and a host coupled to the DMA controller. The first interface circuit is configured to communicate on an interface according to a protocol. The host comprises at least one address space mapped, at least in part, to a plurality of memory locations in a memory system of the host. The DMA controller is configured to perform DMA transfers between the first interface circuit and the address space, and the DMA controller is further configured to perform DMA transfers between a first plurality of the plurality of memory locations and a second plurality of the plurality of memory locations.

Abstract: A method, computer program product, and distributed data processing system that enables host software or firmware to allocate virtual resources to one or more system images from a single physical I/O adapter, such as a PCI, PCI-X, or PCI-E adapter, is provided. Adapter resource groups are assigned to respective system images. An adapter resource group is exclusively available to the system image to which the adapter resource group assignment was made. Assignment of adapter resource groups may be made per a relative resource assignment or an absolute resource assignment. In another embodiment, adapter resource groups are assigned to system images on a first come, first served basis.

Abstract: There is provided video switching circuitry for use in a KVM switch and similar devices. Video signal switching circuitry can supply video signals from a one of a plurality of video sources connected to the circuit to a display device connected to the circuit. The high data signalling rate signals are converted into a greater number of lower data signalling rate signals for switching by a bus architecture. Also provided are video display systems in which analogue and digital video signals are switched synchronously to allow them to be displayed on common or separate display devices. Also described is a high-resolution monitor digital video data switching device.

Abstract: A remote connection system capable of generating a wake-up command and method thereof include a remote connector with a power supply input receiver capable of being connected to a power source and further capable of receiving a power supply for the purpose of powering the remote connector. The remote connector further includes a plurality of input ports allowing the coupling of a connector thereto and providing for the transmission of information thereacross. The remote connector further includes a wireless receiver capable of wirelessly receiving a wireless command and a transmitter capable of generating the wake-up command in response to the wireless command. The remote connector further includes a remote device capable of receiving a user input command, generating the wireless command and thereupon wirelessly transmitting the command to the wireless receiver of the remote connector.

Abstract: A method for communication between an initiator system and a storage cluster. The method comprises receiving an initial I/O request from the initiator system to a first storage system; providing a referral response from the first storage system to the initiator system, the referral response providing information for directing the initiator system to a second storage system; notifying the second storage system regarding the referral response via a prefetch notice, the prefetch notice including an operation type and address information for accessing requested data; when the initial I/O request is a read request, prefetching at least a portion of the requested data stored in the second storage system in to a cache; receiving a second I/O request from the initiator system to the second storage system; and providing to the initiator system the portion of the prefetched data from the cache of the second storage system.

Abstract: A system and method for distributing enclosure services information is provided. A plurality of storage systems that are operatively interconnected with one or more intermediate networking devices and/or disk shelves are modified to include a target device driver module that is adapted to receive and process target commands from other storage systems to enable the sharing and retrieval of SES information from a storage shelf's master storage system.

Abstract: A memory controller is unaware of device types of a plurality of memory devices in a serial interconnection configuration. Possible device types include, e.g., random access memories (DRAM, SRAM, MRAM) and NAND-, NOR- and AND-type Flash memories. Each device has device type information on its device type. Each device is capable of performing a “+1” to an input search number. First, the memory controller sends a specific device type (“don't care”) and an initial search number. Each device performs the “+1” calculation. The last device provides the memory controller with an Nד+1” search number from which the memory controller can recognize the total number of devices in the serial interconnection configuration. Thereafter, the memory controller sends a pre-determined device number for device type matching.

Abstract: This disclosure relates to decreasing the required buffer memory capacity while reducing the impact of an arithmetic error in error diffusion processing. A quantization circuit (4) quantizes input image data and outputs an output code. The quantization error generated in the quantization circuit (4) is calculated by an inverse quantization circuit (5) and subtracter (6). The calculated quantization error is stored in a buffer (8). Since the buffer (8) only needs to have a size capable of storing the quantization error, the size can be made smaller than before. A diffusion filter (9) diffuses the quantization error using a quantization error or the like, which is stored in the buffer (8). A latch (3) and bit connector (1) can usefully reduce the impact of an arithmetic error in error diffusion processing on the next input image data.

Abstract: A safety device is set forth having at least one safety control and having a plurality of outputs for the safe activation of connected actuators and having inputs for the reception of signals of connected sensors as well as having a serial communications device, in particular a bus which connects the safety control to the outputs and to the inputs, to receive and/or to transmit data packets. In this respect, in addition to the serial communication at least one bypass line is provided which connects the safety control or an input to at least one output to be able to transmit a deactivation signal independently of the serial communication to an actuator connected to the output.

Abstract: An access controller controls access to control target resources by a program. The access controller includes a function access detection unit and a resource access control unit. The function access detection unit detects loading of a control target function from the program and generates identification information to specify an access request issued from the detected control target function. The resource access control unit obtains a request of accessing the control target resources from the program and determines permission of the access request based on the identification information.

Abstract: A method for transmitting data of a plurality of data types between a digital processor and a hardware arithmetic-logic unit with at least one associated table memory, first involves preselecting a base address in the table memory that (base address) is dependent on the data type of the data to be transmitted. This is followed by a read and/or write access to the table memory by taking the preselected base address as a starting point for computing the address used for the read/write access in the table memory for each access operation according to an arithmetic computation rule.

Abstract: A method of processing signals includes: sampling multiple signals, where each sampled signal includes multiple signal values and corresponding time values; partitioning the sampled signals into multiple partitions, where each partition includes signal values and corresponding time values for signals having identical time values within a partition time interval and where at least one additional partition is formed when two sampled signals diverge from identical time values; and saving signal values and time values from partitions in buffers corresponding to the partitions, where the buffers represent allocations of memory for saving partition values.

Abstract: A non-volatile storage device has first and second controllers that provide external access to non-volatile memory using different protocols. In response to a request from the first controller, the second controller retrieves parameters from the non-volatile memory and provides the retrieved parameters to the first controller. In one embodiment, the device parameters are USB descriptors, which may include a vendor ID, a product ID, a product string, and/or a serial number. The first controller may be a Universal Serial Bus (USB) card reader controller. Examples of the second controller include a Secure Digital (SD) controller, a CompactFlash (CF) controller, a MemoryStick controller, or a different type of controller that is able to provide external access to the non-volatile memory. The first controller provides the device parameters to a host during enumeration of the non-volatile storage device. The device parameters may be used to establish settings for the first controller.

Abstract: A customization program for use in customizing a baseboard management controller used for monitoring operation of various computer system components is disclosed. A user interacts with the customization program to customize the baseboard management controller based on a configuration of components specified for the baseboard of the computer system. The customization program provides a user interface having a repository of icons and a design page. The icons represent various components that may be connected, directly or indirectly, to the baseboard. The design page is used for constructing a model representing the specified configuration of components. As a user drags icons onto the design page, the model is updated to reflect selection of the components corresponding to these icons. Further, the customization program creates a configuration file that identifies and describes each of the selected components.

Abstract: A technique for monitoring computers connected to a hardware switch. The switch is used to selectively connect a single set of peripheral units to the central unit of a selected one of the computers. In the proposed solution, status information of each non-selected computer is transmitted from the corresponding central unit to the switch. For this purpose, it is preferably exploited a corresponding bi-directional input port—such as of the USE type. The switch routes the status information of the different non-selected computers to the central unit of the selected computer. The central unit of the selected computer aggregates the status information with its output information, and then transmits this aggregated information to the switch for its display on a monitor. For example, the output information is shown in a main area of the screen, while the status information is shown in a reserved strip on top of it.

Abstract: A transparent PCI-based multi-host switch. A switch is configured with multiple north facing ports to couple the switch to multiple hosts. The multi-host switch can be included in a variety of switch configurations, including configurations having one multi-host switch, configurations having multiple multi-host switches, and configurations including one or more multi-host switches and one or more single host switches. The switch is designed to include controls to accurately route a packet through the switch.

Abstract: A peripheral device, connected to a computer, has either a first or second interface. The first interface communicates over a differential data connection and the second interface communicates over a clock conductor and a single ended data connection. The peripheral device has first and second communication conductors that are either connected to the differential data connection when the computer includes the first interface or to the single ended data connection and the clock conductor when the computer includes the second interface. The peripheral device has an interface detection component that detects which of the first and second interfaces the peripheral device is connected to. The peripheral device also has a controller that communicates according to a protocol corresponding to the detected interface.

Abstract: An object-based storage system comprising a host system capable of executing applications for and with an object-based storage device (OSD). Exemplary configurations include a call interface, a physical layer interface, an object-based storage solid-state device (OSD-SSD), and are further characterized by the presence of a storage processor capable of processing object-based storage device algorithms interleaved with processing of physical storage device management. Embodiments include a storage controller capable of executing recognition, classification and tagging of application files, especially including image, music, and other media. Also disclosed are methods for initializing and configuring an OSD-SSD device.

Abstract: A method, system, and computer program product for sharing adapter resources among multiple operating system instances. The present invention provides a mechanism for dynamically allocating virtualized I/O adapter resources. The present invention separates the operation of adapter resource allocation from adapter resource management. Protection attributes within the adapter resource context are used to allow the adapter to enforce access control over the adapter resources. The hypervisor allocates an available adapter resource to a given partition. The adapter is notified of the allocation, and the adapter updates its internal structure to reflect the allocation. The hypervisor may revoke ownership of and reassign adapter resources to another OS instance. In this manner, the allocation described above allows for the simple reassignment of resources from one partition to another.

Abstract: A number of items of data from a data source (12) can be processed and supplied to a data destination (16, 17). The data can include image data, text data, numeric data or other types of data, or a combination of these types of data. The processing of the data is controlled by a project definition (14, 71, 101), which includes a plurality of modules selected from a variety of available modules (Tables 1-4). The modules have input and output ports which are interrelated by binding information. Where a project definition is complex and/or is assigned to process a large data set, capability is provided to launch multiple instances of the same project definition, each of which processes a respective portion of the data. Further, capability is provided to launch multiple instances of the same or different project definitions on each of one or more computers, in order to efficiently execute project definitions in a centralized processing facility.

Abstract: An embodiment of the present invention includes a communication system configured to conform to SATA or SAS standards and causing communication between one or more hosts and a SATA device. The communication system includes a communication device adapted to generate debug information incorporated through one or more links using an analyzer to identify problems associated with the communication system.

Abstract: A mechanism is provided for performing collective operations. In hardware of a parent processor in a first processor book, a number of other processors are determined in a same or different processor book of the data processing system that is needed to execute the collective operation, thereby establishing a plurality of processors comprising the parent processor and the other processors. In hardware of the parent processor, the plurality of processors are logically arranged as a plurality of nodes in a hierarchical structure. The collective operation is transmitted to the plurality of processors based on the hierarchical structure. In hardware of the parent processor, results are received from the execution of the collective operation from the other processors, a final result is generated of the collective operation based on the received results, and the final result is output.

Abstract: A system and method for communicating with one or more software-controlled devices.

Abstract: A method for providing a secure firmware operating environment includes detecting the presence of a new component, for example, a peripheral device. Next, a determination is made as to whether the peripheral device includes an option read-only memory. Next, a determination is made as to whether the option read-only memory is authorized to be executed on the corresponding device. If the option read-only memory is authorized, the code contained within the option read-only memory is executed. By only allowing execution of peripheral devices or components including authorized option read-only memories, security related breaches are substantially reduced or eliminated; thereby, enhancing device integrity.

Abstract: An apparatus and method for economical testing of dies in a multichip module. Internal I/O pins on a die are logically connected to external I/O pins of the multichip module through the use of a silicon interposer on which the dies are attached. Multiplexers on the interposer can select between the external pins of the multichip module and the internal pins of the dies. The silicon interposer can be economically manufactured using manufacturing technology having relatively a large feature size, such as is found in a relatively mature IC fabrication plant. Further, use of the present invention allows multichip modules to be tested for faults without the necessity of redesigning test circuitry or adding additional pins to the package.

Abstract: Apparatus and method of tracing descriptor in a host controller are provided. The host controller for controlling a device includes a first bus interface coupled to a system bus, a processor which determines whether data received from a system memory through the first bus interface are descriptor data, and a descriptor tracer which receives and stores descriptor data transmitted to the processor. Therefore, the host controller provides rapid and various functional checking and debugging.

Abstract: A modular computer system formed by connecting a processing module having a processor mounted thereon and a plurality of I/O modules in a stacked form via connectors, where differing ones of the plurality of I/O modules being differing types of I/O modules from one another, which operate with mutually differing types of bus-layout configurations. In accordance with the association of I/O modules with identification information, for each differing type of I/O module stacked via the connectors, said processing module selects from differing preset bus-layout configurations and device drivers from a memory, to dynamically reconfigure the reconfigurable generic bus for accessing the differing type of I/O module.

Abstract: A method, computer program product, and distributed data processing system that allows a system image within a multiple system image virtual server to directly expose a portion, or all, of its associated system memory to a shared PCI adapter without having to go through a trusted component, such as a Hypervisor. Specifically, the present invention is directed to a mechanism for sharing conventional PCI I/O adapters, PCI-X I/O Adapters, PCI-Express I/O Adapters, and, in general, any I/O adapter that uses a memory mapped I/O interface for communications.

Abstract: An asynchronous logic family of circuits which communicate on delay-insensitive flow-controlled channels with 4-phase handshakes and 1 of N encoding, compute output data directly from input data using domino logic, and use the state-holding ability of the domino logic to implement pipelining without additional latches.

Abstract: A method for facilitating input/output (I/O) communication for a processing operation is provided. An interrogate command is obtained by an I/O communications adapter. The interrogate command queries for status information of the processing operation to be provided in an interrogate response. A fixed number of resources and a time allocated to the interrogate command is throttled by pre-allocating the fixed number of resources needed for the interrogate command, and maintaining a timestamp for a interrogate message. The interrogate message is forwarded from the I/O communications adapter to a control unit. If the interrogate response is not received by the I/O communications adapter within a limited timeout period as measured by the timestamp, or if the interrogate message is received while the fixed number of pre-allocated resources are in use, the I/O communications adapter returns a busy response indicating the control unit is busy to prevent overrunning the control unit.

Abstract: In one embodiment, an apparatus includes a driver and a receiver. The driver has an output, wherein the output of the driver has an associated output termination. In addition, the receiver has an input, wherein the input of the receiver has an associated input termination. An interface between the output of the driver and the input of the receiver operates according to a set of one or more timing parameters, wherein the input termination, the output termination, and the set of timing parameters correspond to a bandwidth for data transfer or frequency for data transfer across the interface between the output of the driver and the input of the receiver.

Abstract: In one embodiment, a computer system, comprises at least one host node, at least one input/output node coupled to the host node, at least one multi-function device coupled to the input/output node via a switch, and a middle manager processor comprising logic to block an enumeration process in a host node for the multi-function devices behind the switch hierarchy, initiate an enumeration process for the multi-function devices in a manager processor separate from the host node, store a routing table for the switch hierarchy in a memory module coupled to the manager processor, and allocate, in the manager processor, endpoint device resources to the host node.

Abstract: Device, system, and method of accessing storage. For example, a server includes: a Solid-State Drive (SSD) to store data; a memory mapper to map at least a portion of a storage space of the SSD into a memory space of the server; and a network adapter to receive a Small Computer System Interface (SCSI) read command incoming from a client device, to map one or more parameters of the SCSI read command into an area of the memory space of the server from which data is requested to be read by the client device, said area corresponding to a storage area of the SSD, and to issue a Remote Direct Memory Access (RDMA) write command to copy data directly to the client device from said area of the memory space corresponding to the SSD.

Abstract: There is provided a control program which allows a computer to execute a setting processing method having: an obtainment step of respectively obtaining conflict rules showing rules for avoiding conflict of setting values which are used in a plurality of print processes that are used in a first expanding function program to expand a function of a print processing related program and a second expanding function program to expand the function of the print processing related program; and a discrimination step of discriminating the presence or absence of conflict between setting values of print settings which are used in the first expanding function program and the second expanding function program by using the conflict rules obtained in the obtainment step.

Abstract: A data backup system is provided for backing up data files from a data source and for securing those data files against accidental modification or deletion. The system comprises storage and a data protection component that includes an application programming interface defining a command set. The system can also comprise a backup application that is configured to use the commands of the command set. The data protection component allows applications that use the commands of the command set, such as the backup application, to access the storage of the system. The data protection component prevents operating systems and applications that do not use the commands of the command set from accessing the storage. The data protection function of the data protection component can optionally be disabled to allow open access to the storage.

Abstract: Circuits, methods, and apparatus that allow a DisplayPort compatible host device to control data transactions over an I2C bus when communicating with a legacy monitor. One example includes an adapter having a compatibility register that may have a number of locations, where at least some of the locations correspond to I2C bus speeds. Values stored at these locations can indicate whether the adapter is compatible or incompatible with the corresponding I2C bus speed. Another example includes an adapter having a speed register that may have a number of locations, where at least some of the locations correspond to I2C bus speeds. A defined value written to one of these locations dictates the corresponding I2C bus speed.

Abstract: In a first aspect, a first method is provided for servicing commands. The first method includes the steps of (1) receiving a first command for servicing in a memory controller including a plurality of memory ports, wherein the first command is of a first priority; (2) receiving a second command for servicing in the memory controller, wherein the second command is of a second priority that is higher than the first priority; (3) determining whether the first and second commands will be serviced through the same memory port; and (4) if the first and second commands will not be serviced through the same memory port, servicing the first and second commands during the same time period. Numerous other aspects are provided.

Abstract: Techniques for simulating universal serial bus (USB) video devices are described. In one example, a document containing a USB video device descriptor set is loaded by a device simulator application. The document is parsed and the descriptor set is extracted. The descriptor set is then used to define a simulated USB video device. A device simulation framework simulates a USB device attachment to a computing device and video data is streamed from the simulated USB video device to the computing device. A video driver associated with the computing device processes the video data as if the data originated from USB video device hardware. Multiple different USB video devices may be simulated and different collections and configurations of video data can be utilized.

Abstract: A system for managing a circular buffer memory includes a number of data writers, a number of data readers, a circular buffer memory; and logic configured to form a number of counters, form a number of temporary variables from the counters, and allow the data writers and the data readers to simultaneously access locations in the circular buffer memory determined by the temporary variables.

Abstract: An apparatus includes a processor and a storage medium. The processor is operable to collect device data associated with the apparatus and transmit at least some of the device data to a tag.