Light Patents (Class 257/431)
  • Patent number: 9726709
    Abstract: A semiconductor chip is provided with first and second electrode pads, a first current detector, and a third electrode pad. The first and second electrode pads are both to be wire-bonded to a first lead terminal. The first current detector is connected between the first and second electrode pads. The third electrode pad is wire-bonded to a second lead terminal. A first closed circuit is configured by the first lead terminal, the first electrode pad, the first current detector, and the second electrode pad. An induced current flows through the first closed circuit when a current generating an induced electromotive force is applied to the third electrode pad. The first current detector is configured to output different values depending on whether the induced current exceeds a threshold value or not.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: August 8, 2017
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Taro Kajiyama, Kazushi Yamanaka
  • Patent number: 9722004
    Abstract: A package structure includes a substrate and a package plate. A frame is formed of a seal glue arranged between the substrate and the package plate. An underfill is positioned inboard of the frame. The package plate has a spreading surface, and at least one groove is formed in a spreading path of the frame on the spreading surface of the package plate.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: August 1, 2017
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
    Inventors: Lindou Chen, Kai Shi
  • Patent number: 9701574
    Abstract: Glass-ceramics exhibiting a Vickers indentation crack initiation threshold of at least 15 kgf are disclosed. These glass-ceramics may be ion exchangeable or ion exchanged. The glass-ceramics include a crystalline and amorphous phases generated by subjecting a thin precursor glass article to ceramming cycle having an average cooling rate in the range from about 10° C./minute to about 25° C./minute. In one or more embodiments, the crystalline phase may comprise at least 20 wt % of the glass-ceramics. The glass-ceramics may include ?-spodumene ss as the predominant crystalline phase and may exhibit an opacity ?about 85% over the wavelength range of 400-700 nm for an about 0.8 mm thickness and colors an observer angle of 10° and a CIE illuminant F02 determined with specular reflectance included of a* between ?3 and +3, b* between ?6 and +6, and L* between 88 and 97.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: July 11, 2017
    Assignee: CORNING INCORPORATED
    Inventors: Lionel Joel Mary Beunet, Marie Jacqueline Monique Comte, Allan Mark Fredholm, Qiang Fu, Anne Paris, Sophie Peschiera, Charlene Marie Smith
  • Patent number: 9693469
    Abstract: An electronic module subassembly including a substrate. The substrate includes a bottom laminate, a middle laminate coupled to the bottom laminate, and a top laminate coupled to the middle laminate. The middle laminate has a plurality of web areas, each web area defining at least one hole. The defines a planar top surface and a plurality of open areas corresponding to and aligned with the plurality of web areas. First components have a first thickness. At least one first component is in each of the open areas. Second components have a second thickness relatively larger than the first thickness. At least one second component is in each of the open areas. The second components extend into the respective at least one hole of the web areas. Encapsulant fills in the open areas and the web areas.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: June 27, 2017
    Assignee: The Charles Stark Draper Laboratory, Inc.
    Inventors: Gary B. Tepolt, John Merullo, Jeffrey C. Thompson, Berj Nercessian
  • Patent number: 9659992
    Abstract: Embodiments related to a method of manufacturing of an imager and an imager device are shown and depicted.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: May 23, 2017
    Assignee: Infineon Technologies AG
    Inventors: Dirk Meinhold, Emanuele Bruno Bodini, Felix Braun, Hermann Gruber, Uwe Hoeckele, Dirk Offenberg, Klemens Pruegl, Ines Uhlig
  • Patent number: 9646911
    Abstract: A composite substrate configured for epitaxial growth of a semiconductor layer thereon is provided. The composite substrate includes multiple substrate layers formed of different materials having different thermal expansion coefficients. The thermal expansion coefficient of the material of the semiconductor layer can be between the thermal coefficients of the substrate layer materials. The composite substrate can have a composite thermal expansion coefficient configured to reduce an amount of tensile stress within the semiconductor layer at room temperature and/or an operating temperature for a device fabricated using the heterostructure.
    Type: Grant
    Filed: April 10, 2015
    Date of Patent: May 9, 2017
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Michael Shur, Maxim S. Shatalov, Alexander Dobrinsky, Remigijus Gaska
  • Patent number: 9620541
    Abstract: Provided is a solid-state image pickup apparatus including a crosstalk suppression mechanism included in each pixel arranged in a pixel array, the crosstalk suppression mechanism of a part of the pixels differing from that of other pixels in an effective area of the pixel array.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: April 11, 2017
    Assignee: SONY CORPORATION
    Inventor: Kyosuke Ito
  • Patent number: 9620691
    Abstract: Embodiments provide a light emitting device package including a first lead frame including a first contact area and a first exposed area, a second lead frame spaced apart from the first lead frame, the second lead frame including a second contact area and a second exposed area, a bottom portion located between the first contact area and the first exposed area, between the second contact area and the second exposed area, and between the first contact area and the second contact area, a light emitting device electrically connected to the first and second contact areas, and a package body having a cavity configured to expose the first and second contact areas, the first and second exposed areas, and the bottom portion, wherein the bottom portion has a thermal expansion coefficient greater than a thermal expansion coefficient of the first and second lead frames.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: April 11, 2017
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Sung Joo Oh, Keal Doo Moon, Gyu Hyeong Bak
  • Patent number: 9575266
    Abstract: An opto-electronic assembly is provided comprising a substrate (generally of silicon or glass) for supporting a plurality of interconnected optical and electrical components. A layer of sealing material is disposed to outline a defined peripheral area of the substrate. A molded glass lid is disposed over and bonded to the substrate, where the molded glass lid is configured to create a footprint that matches the defined peripheral area of the substrate. The bottom surface of the molded glass lid includes a layer of bonding material that contacts the substrate's layer of sealing material upon contact, creating a bonded assembly. In one form, a wafer level assembly process is proposed where multiple opto-electronic assemblies are disposed on a silicon wafer and multiple glass lids are molded in a single sheet of glass that is thereafter bonded to the silicon wafer.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: February 21, 2017
    Assignee: Cisco Technology, Inc.
    Inventors: Kishor Desai, Ravinder Kachru, Vipulkumar Patel, Bipin Dama, Kalpendu Shastri, Soham Pathak
  • Patent number: 9564494
    Abstract: A heteroepitaxially grown structure includes a substrate and a mask including a high aspect ratio trench formed on the substrate. A cavity is formed in the substrate having a shape with one or more surfaces and including a resistive neck region at an opening to the trench. A heteroepitaxially grown material is formed on the substrate and includes a first region in or near the cavity and a second region outside the first region wherein the second region contains fewer defects than the first region.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: February 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Cheng-Wei Cheng, David L. Rath, Devendra K. Sadana, Kuen-Ting Shiu, Brent A. Wacaser
  • Patent number: 9559030
    Abstract: An electronic component has a circuit board with a main surface, a chip having a sensor facing the main surface, bump electrodes disposed between the main surface and the chip so as to be placed inside of the edges of the chip in a plan view of the main surface, a dam provided between the main surface and the chip so as to extend at least from the edges of the chip to outer positions of the bump electrodes in a plan view of the main surface, and an under-fill material provided at least in a clearance between the dam and the chip. Between the main surface and the sensor, a space is formed in a region enclosed by the bump electrodes in a plan view of the main surface. The under-fill material is disposed outside of the space in a plan view of the main surface.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: January 31, 2017
    Assignee: ALPS ELECTRIC CO., LTD.
    Inventors: Hideki Gocho, Shuji Yanagi, Masaya Yamatani, Hisayuki Yazawa
  • Patent number: 9525000
    Abstract: A solid-state imaging device includes: multiple micro lenses, which are disposed in each of a first direction and a second direction orthogonal to the first direction, focus the incident light into the light-receiving surface; with the multiple micro lenses of which the planar shape is a shape including a portion divided by a side extending in the first direction and a side extending in the second direction being disposed arrayed mutually adjacent to each of the first direction and the second direction; and with the multiple micro lenses being formed so that the depth of a groove between micro lenses arrayed in a third direction is deeper than the depth of a groove between micro lenses arrayed in the first direction, and also the curvature of the lens surface in the third direction is higher than the curvature of the lens surface in the first direction.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: December 20, 2016
    Assignee: SONY CORPORATION
    Inventors: Akiko Ogino, Yoichi Otsuka
  • Patent number: 9520383
    Abstract: Disclosed is a light emitting device package and a lighting system. The light emitting device package includes a body, a first lead frame on the body, a plurality of light emitting diodes on the first lead frame, and a molding member on the light emitting diodes. The distance between the light emitting diodes includes a distance equal to or less than a length of a first side of a first light emitting diode of the light emitting diodes.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: December 13, 2016
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Kyong Jun Kim
  • Patent number: 9515227
    Abstract: A light emitting device (10) comprises a body (12) of a semiconductor material having a first face (14) and at least one other face (16). At least one pn-junction (18) in the body is located towards the first face and is configured to be driven via contacts on the body into a light emitting mode. The other face (16) of the body is configured to transmit from the body light emitted by the at least one pn-junction (18) in the near infrared part of the spectrum and having wavelengths longer than 1 ?m.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: December 6, 2016
    Assignee: INSIAVA (PTY) LIMITED
    Inventors: Monuko Du Plessis, Alfons Willi Bogalecki
  • Patent number: 9513212
    Abstract: A photoconductive antenna that generates a terahertz wave by irradiation with a light pulse, includes: a carrier generation layer that has carriers formed therein by irradiation with the light pulse, and is constituted by a semi-insulating substrate; an insulating layer, located on the carrier generation layer, which is capable of transmitting the light pulse; and a first electrode and a second electrode, located above the carrier generation layer, which apply a voltage to the carrier generation layer, wherein the insulating layer is provided on a region which is irradiated with the light pulse between the first electrode and the second electrode in a plan view.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: December 6, 2016
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Satoshi Takenaka
  • Patent number: 9497440
    Abstract: An imager includes an emitter, an array of pixel elements, and driver logic. The emitter releases bursts of light pulses with pauses between bursts. Each element of the array has a finger gate biasable to attract charge to the surface, a reading node to collect the charge, and a transfer gate to admit such charge to the reading node and to deter such charge from being absorbed into the finger gate. The driver logic biases the finger gates with the modulated light pulses such that the finger gates of adjacent first and second elements cycle with unequal phase into and out of a charge-attracting state. To reduce the effects of ambient light on the imager, the driver logic is configured to bias the transfer gates so that the charge is admitted to the reading node only during the bursts and is prevented from reaching the reading node during the pauses.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: November 15, 2016
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Cyrus Bamji, Tamer Elkhatib, Swati Mehta, Zhanping Xu
  • Patent number: 9478599
    Abstract: An integrated circuit device includes an integrated circuit substrate having an at least two piece package thereon. The package has a sealed cavity therein and a patterned metal inductor in the cavity. The inductor has at least a first terminal electrically coupled to a portion of the integrated circuit substrate by an electrically conductive via, which extends at least partially through the package. The package, which may include a material selected from a group consisting of glass and ceramics, includes a base and a cap sealed to the base. The metal inductor includes a metal layer patterned on at least one of the cap and base of the package. The base may also include first and second electrically conductive vias therein, which are electrically connected to first and second terminals of the inductor.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: October 25, 2016
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventors: Robert A. Gubser, Ajay Kumar Ghai, Viresh Piyush Patel
  • Patent number: 9480171
    Abstract: A printing circuit board includes: an insulator having an upper surface, a lower surface and an opening formed in the lower surface, and a trace having an upper surface, a lower surface and a side edge and received in said insulator. The upper surface of said trace is exposed out of the insulator and a portion of the lower surface of said trace is exposed by said opening for external connection.
    Type: Grant
    Filed: May 12, 2014
    Date of Patent: October 25, 2016
    Inventor: Chung-Pao Wang
  • Patent number: 9450114
    Abstract: A solid-state imaging device which includes, a photoelectric conversion film provided on a second surface side which is the opposite side to a first surface on which a wiring layer of a semiconductor substrate is formed, performs photoelectric conversion with respect to light in a predetermined wavelength region, and transmits light in other wavelength regions; and a photoelectric conversion layer which is provided in the semiconductor substrate, and performs the photoelectric conversion with respect to light in other wavelength regions which has transmitted the photoelectric conversion film, in which input light is incident from the second surface side with respect to the photoelectric conversion film and the photoelectric conversion layer.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: September 20, 2016
    Assignee: Sony Corporation
    Inventor: Tetsuji Yamaguchi
  • Patent number: 9450014
    Abstract: A die includes a first plurality of edges, and a semiconductor substrate in the die. The semiconductor substrate includes a first portion including a second plurality of edges misaligned with respective ones of the first plurality of edges. The semiconductor substrate further includes a second portion extending from one of the second plurality of edges to one of the first plurality of edges of the die. The second portion includes a first end connected to the one of the second plurality of edges, and a second end having an edge aligned to the one of the first plurality of edges of the die.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: September 20, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: I-I Cheng, Chih-Mu Huang, Pin Chia Su, Chi-Cherng Jeng, Volume Chien, Chih-Kang Chao
  • Patent number: 9443996
    Abstract: An integrated circuit device in which an array of photodiodes are formed at the surface of a semiconductor substrate. A dielectric structure comprising multiple layers of dielectric is formed over the photodiodes. An array of color filters is formed over the photodiodes and within the dielectric structure. An interface between two layers of the dielectric structure is aligned with the bases of the color filters. The interface provides an etch stops that allows the depths of the trenches in which the color filters are formed to be well controlled.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: September 13, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yin Chieh Huang, Kuo-Cheng Lee, Chi-Cherng Jeng
  • Patent number: 9437756
    Abstract: A solar cell structure includes P-type and N-type doped regions. A dielectric spacer is formed on a surface of the solar cell structure. A metal layer is formed on the dielectric spacer and on the surface of the solar cell structure that is exposed by the dielectric spacer. A metal foil is placed on the metal layer. A laser beam is used to weld the metal foil to the metal layer. A laser beam is also used to pattern the metal foil. The laser beam ablates portions of the metal foil and the metal layer that are over the dielectric spacer. The laser ablation of the metal foil cuts the metal foil into separate P-type and N-type metal fingers.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: September 6, 2016
    Assignee: SunPower Corporation
    Inventor: Thomas Pass
  • Patent number: 9417344
    Abstract: Wirebond protection is provided for imaging tiles in which the imaging sensor and PCB are mounted side-by-side on a tile carrier for use in X or Gamma Ray indirect imaging detectors without use of a “glob top” encapsulant. A glass cap comprising a bead of adhesive material and a lid is formed to provide an enclosed open-air cavity around the wire bonds. As such, any expansion of the bead material does not produce mechanical stress on the wire bonds.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: August 16, 2016
    Assignee: Teledyne Dalsa, Inc.
    Inventor: Anton Petrus Maria van Arendonk
  • Patent number: 9401381
    Abstract: A portion on the light exit end surface side of a fiber optic plate includes a first portion and a second portion. The first portion corresponds to a peripheral portion of a semiconductor photodetecting element. The second portion corresponds to a thin portion of the semiconductor photodetecting element and projects more toward the semiconductor photodetecting element than the first portion. A height of a step made between the first portion and the second portion of the fiber optic plate is lower than a height of a step made between the thin portion and the peripheral portion of the semiconductor photodetecting element. The semiconductor photodetecting element and the fiber optic plate are fixed by a resin, in a state in which the first portion and the peripheral portion are in contact and in which the second portion and the thin portion are separated.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: July 26, 2016
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Hiroya Kobayashi, Masaharu Muramatsu
  • Patent number: 9385155
    Abstract: A light receiving region includes a plurality of light detecting sections 10. The light detecting sections 10 has a second contact electrode 4A. The second contact electrode 4A is arranged at a position overlapping a first contact electrode 3A, so as to contact the first contact electrode. Further, a resistive layer 4B is continued to the second contact electrode 4A.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: July 5, 2016
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Koei Yamamoto, Terumasa Nagano, Kazuhisa Yamamura, Kenichi Sato, Ryutaro Tsuchiya
  • Patent number: 9379196
    Abstract: In one aspect, a method of forming a trench in a semiconductor material includes forming a first dielectric layer on a semiconductor substrate. The first dielectric layer includes first openings. An epitaxial layer is grown on the semiconductor substrate by an epitaxial lateral overgrowth process. The first openings are filled by the epitaxial layer and the epitaxial layer is grown onto adjacent portions of the first dielectric layer so that part of the first dielectric layer is uncovered by the epitaxial layer and a gap forms between opposing sidewalls of the epitaxial layer over the part of the first dielectric layer that is uncovered by the epitaxial layer. The gap defines a first trench in the epitaxial layer that extends to the first dielectric layer.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: June 28, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Ravi Joshi, Johannes Baumgartl, Martin Poelzl, Matthias Kuenle, Juergen Steinbrenner, Andreas Haghofer, Christoph Gruber, Georg Ehrentraut
  • Patent number: 9377887
    Abstract: Provided is a method of manufacturing a flexible display device, comprising: forming a concavo-convex area comprising a first concavo-convex pattern on one surface of a carrier substrate; forming a flexible substrate on the one surface of the carrier substrate; forming a display element configured to display an image on the flexible substrate; and separating the flexible substrate from the carrier substrate.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: June 28, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventor: Sung-Ku Kang
  • Patent number: 9368545
    Abstract: A device includes a plurality of isolation spacers, and a plurality of bottom electrodes, wherein adjacent ones of the plurality of bottom electrodes are insulated from each other by respective ones of the plurality of isolation spacers. A plurality of photoelectrical conversion regions overlaps the plurality of bottom electrodes, wherein adjacent ones of the plurality of photoelectrical conversion regions are insulated from each other by respective ones of the plurality of isolation spacers. A top electrode overlies the plurality of photoelectrical conversion regions and the plurality of isolation spacers.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: June 14, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Shin Chu, Cheng-Tao Lin, Meng-Hsun Wan, Szu-Ying Chen, Jen-Cheng Liu, Dun-Nian Yaung
  • Patent number: 9368536
    Abstract: A solid state imaging device having a light sensing section that performs photoelectric conversion of incident light includes: an insulating layer formed on a light receiving surface of the light sensing section; a layer having negative electric charges formed on the insulating layer; and a hole accumulation layer formed on the light receiving surface of the light sensing section.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: June 14, 2016
    Assignee: Sony Corporation
    Inventors: Itaru Oshiyama, Takashi Ando, Susumu Hiyama, Tetsuji Yamaguchi, Yuko Ohgishi, Harumi Ikeda
  • Patent number: 9337226
    Abstract: An image pickup element includes: a semiconductor substrate including a photoelectric conversion section for each pixel; a pixel separation groove provided in the semiconductor substrate; and a fixed charge film provided on a light-receiving surface side of the semiconductor substrate, wherein the fixed charge film includes a first insulating film and a second insulating film, the first insulating film being provided contiguously from the light-receiving surface to a wall surface and a bottom surface of the pixel separation groove, and the second insulating film being provided on a part of the first insulating film, the part corresponding to at least the light-receiving surface.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: May 10, 2016
    Assignee: Sony Corporation
    Inventors: Shuji Manda, Susumu Hiyama, Yasuyuki Shiga
  • Patent number: 9263482
    Abstract: A solid-state imaging apparatus having a plurality of pixels, comprising: a substrate; a wiring layer formed on the substrate and including an insulating film and a plurality of wires; a plurality of lower electrodes formed on the wiring layer in one-to-one correspondence with the plurality of pixels; a photoelectric conversion film formed covering the plurality of lower electrodes; a light-transmissive upper electrode formed on the photoelectric conversion film; and a shield electrode extending through a gap between each pair of adjacent lower electrodes among the plurality of lower electrodes, the shield electrode having a fixed potential and being electrically insulated from the plurality of lower electrodes.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: February 16, 2016
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Hiroyuki Doi, Mitsuo Yasuhira, Ryohei Miyagawa, Yoshiyuki Ohmori
  • Patent number: 9263420
    Abstract: Embodiments of methods for forming a device include performing an oxidation inhibiting treatment to exposed ends of first and second device-to-edge conductors, and forming a package surface conductor to electrically couple the exposed ends of the first and second device-to-edge conductors. Performing the oxidation inhibiting treatment may include applying an organic solderability protectant coating to the exposed ends, or plating the exposed ends with a conductive plating material. The method may further include applying a conformal protective coating over the package surface conductor. An embodiment of a device formed using such a method includes a package body, the first and second device-to-edge conductors, the package surface conductor on a surface of the package body and extending between the first and second device-to-edge conductors, and the conformal protective coating over the package surface conductor.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: February 16, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Michael B. Vincent, Scott M. Hayes
  • Patent number: 9240512
    Abstract: Provided is an image sensor including a semiconductor substrate having a trench and having a first conductivity type, a photoelectric conversion layer formed in the semiconductor substrate below the trench to have a second conductivity type, first and second transfer gate electrodes provided in the trench covered with a gate insulating layer, a first charge-detection layer formed in the semiconductor substrate adjacent to the first transfer gate electrode, and a second charge-detection layer formed in the semiconductor substrate adjacent to the second transfer gate electrode.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: January 19, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sungchul Kim, Hyoungsoo Ko, Wonjoo Kim, Jung Bin Yun, Kwang-Min Lee
  • Patent number: 9229566
    Abstract: Provided is a method of manufacturing a flexible display device, comprising: forming a concavo-convex area comprising a first concavo-convex pattern on one surface of a carrier substrate; forming a flexible substrate on the one surface of the carrier substrate; forming a display element configured to display an image on the flexible substrate; and separating the flexible substrate from the carrier substrate.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: January 5, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventor: Sung-Ku Kang
  • Patent number: 9202992
    Abstract: A semiconductor light emitting device includes a semiconductor layer, a p-side and an n-side interconnect portions, a fluorescent substance layer and a transparent layer. The semiconductor layer has a first major surface, a second major surface, and a first side surface, the semiconductor layer including a light emitting layer. The p-side and n-side interconnect portions are electrically connected to the semiconductor layer. The fluorescent substance layer is provided on the first major surface side. The transparent layer is provided between the semiconductor layer and the fluorescent substance layer, and has a second side surface. The device further includes an insulating film covering the first side surface and the second side surface, and a reflecting member covering the first side surface and the second side surface via the insulating film.
    Type: Grant
    Filed: July 23, 2014
    Date of Patent: December 1, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Tomizawa, Akihiro Kojima, Miyoko Shimada, Yosuke Akimoto, Hideto Furuyama, Yoshiaki Sugizaki
  • Patent number: 9202840
    Abstract: Photodetecting device comprising: a semiconductor layer doped according to a first type of conductivity; two first semiconductor portions doped according to a second type of conductivity opposed to the first type of conductivity, distinct and separated from one another, and arranged in the semiconductor layer next to one another; a second semiconductor portion doped according to the first type of conductivity with a level of doping greater than that of the semiconductor layer and delimiting, with the semiconductor layer, the first portions by forming p-n junctions, wherein a part of the semiconductor layer separates the first portions such that the depletion zones between the first portions form a potential barrier of which the level is less than the potential of the second portion and of the semiconductor layer.
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: December 1, 2015
    Assignee: Commissariat a l'energie atomique et aux energies alternatives
    Inventors: Pierre Gidon, Norbert Moussy
  • Patent number: 9171914
    Abstract: A semiconductor device having small leakage current and high breakdown voltage during reverse blocking, small on-state resistance and large output current at forward conduction, short reverse recovery time at shutoff, and high peak surge current value is provided. An n-type layer is made of a group-III nitride, and a p-type layer is made of a group-IV semiconductor material having a smaller band gap than the group-III nitride. The energy level at the top of the valence band of the n-type layer is lower than the energy level at the top of the valence band of the p-type layer, so that a P-N junction semiconductor device satisfying the above requirements is obtained. Further, a combined structure of P-N junction and Schottky junction by additionally providing an anode electrode to be in Schottky contact with the n-type layer also achieves the effect of decreasing voltage at the rising edge of current resulting from the Schottky junction.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: October 27, 2015
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Yoshitaka Kuraoka
  • Patent number: 9153490
    Abstract: A solid-state imaging device has a sensor substrate having a pixel region on which photoelectric converters are arrayed; a driving circuit provided on a front face side that is opposite from a light receiving face as to the photoelectric converters on the sensor substrate; an insulation layer, provided on the light receiving face, and having a stepped construction wherein the film thickness of the pixel region is thinner than the film thickness in a periphery region provided on the outside of the pixel region; a wiring provided to the periphery region on the light receiving face side; and on-chip lenses provided to positions corresponding to the photoelectric converters on the insulation layer.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: October 6, 2015
    Assignee: SONY CORPORATION
    Inventors: Ikue Mitsuhashi, Kentaro Akiyama, Koji Kikuchi
  • Patent number: 9143236
    Abstract: The present invention is an apparatus and method that identifies and localizes fiber breaks or faults automatically, utilizing a fiber optic data transceiver that has ?OTDR functionality. The transceiver of the present invention is a single wavelength bi-directional transceiver that during normal operation sends and receives optical data streams in the same wavelength window using any protocol and reports the distance to the fault or multiple faults nearly instantaneously when the transfer of data is disrupted, without the need to have fiber lines dedicated for this purpose or physically connect and reconnect each fiber line to check for faults and eliminates the need to map out the distance to the remote transceiver.
    Type: Grant
    Filed: August 7, 2012
    Date of Patent: September 22, 2015
    Assignee: Optical Zonu Corporation
    Inventors: Meir Bartur, Jim Stephenson, Farzad Ghadooshahy
  • Patent number: 9134542
    Abstract: A light source device which can prevent deterioration of a polarization rotation element and an adhesive for bonding the polarization rotation element is to be provided. A light source device includes a polarization separation element obtaining first polarization and second polarization by separation and a polarization rotation element converting a polarization component aligned in a second polarization direction into a polarization component aligned in a first polarization direction.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: September 15, 2015
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Hiroaki Yanai
  • Patent number: 9129876
    Abstract: An image sensor including a microlens, a substrate, a first dielectric layer, a second dielectric layer and a color filter is provided. The microlens receives light; the substrate includes a light sensing element in a light sensing area for receiving light incident to the microlens. The first dielectric layer and the second dielectric layer are stacked on the substrate from bottom to top, wherein the second dielectric layer has a recess on the first dielectric layer and in an optical path between the microlens and the light sensing element. The color filter is disposed in the recess. Moreover, the present invention also provides an image sensing process for forming said image sensor.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: September 8, 2015
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventor: Chun-Hong Peng
  • Patent number: 9121949
    Abstract: The subject matter of the invention is a method and an electronic circuit for reading the signals generated by one or more pixelated sensors in a gamma radiation detection system, which makes it possible to substantially reduce the number of electronic channels to be digitized. The electronic circuit in the invention is analog and can also be coupled to other similar circuits in order to acquire the signals from larger sensors.
    Type: Grant
    Filed: October 26, 2010
    Date of Patent: September 1, 2015
    Assignee: Oncovision, General Equipment for Medical Imaging, S.A.
    Inventors: Christoph Werner Lerche, Vicente Herrero Bosch, Angel Sebastiá Cortés, José María Benlloch Baviera, Filomeno Sánchez Martínez
  • Patent number: 9123609
    Abstract: A solid-state imaging device includes: a photoelectric conversion device; a wire grid polarizer provided on the photoelectric conversion device; and a conductive film electrically connecting conductive layers provided in the photoelectric conversion device to the wire grid polarizer.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: September 1, 2015
    Assignee: SONY CORPORATION
    Inventor: Keiki Fukuda
  • Patent number: 9123843
    Abstract: A semiconductor device includes a semiconductor layer laminate in which a plurality of semiconductor layers are laminated, the semiconductor layer laminate including a light receiving layer, the light receiving layer being grown by a metal-organic vapor phase epitaxy method, the light receiving layer having a cutoff wavelength of more than or equal to 3 ?m and less than or equal to 8 ?m, the semiconductor device having a dark current density of less than or equal to 1×10?1 A/cm2 when a reverse bias voltage of 60 mV is applied at a temperature of ?140° C. Thereby, a semiconductor device which can receive light in a mid-infrared range and has a low dark current is provided.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: September 1, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Kyono, Katsushi Akita, Kaoru Shibata, Koji Nishizuka, Kei Fujii
  • Patent number: 9117723
    Abstract: An image sensor includes a high concentration well region in contact with a device isolation layer extending along a periphery of a photoelectric converting part, which can improve dark current properties of the image sensor. The image sensor also includes a low concentration well region in contact with a sidewall of the device isolation layer overlapped with a transfer gate, which can improve image lag properties of the image sensor. Related fabrication methods are also discussed.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: August 25, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jungchak Ahn, Yitae Kim
  • Patent number: 9054247
    Abstract: Single-photon detectors, arrays of single-photon detectors, methods of using the single-photon detectors and methods of fabricating the single-photon detectors are provided. The single-photon detectors combine the efficiency of a large absorbing volume with the sensitivity of nanometer-scale carrier injectors, called “nanoinjectors”. The photon detectors are able to achieve single-photon counting with extremely high quantum efficiency, low dark count rates, and high bandwidths.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: June 9, 2015
    Assignee: Northwestern University
    Inventors: Hooman Mohseni, Omer G. Memis
  • Patent number: 9053994
    Abstract: A device for image sensing includes a photoelectric conversion unit and at least one transistor. The photoelectric conversion unit is configured to convert incident electromagnetic radiation into an electric signal. The at least one transistor includes a first gate electrode and a second gate electrode above the first gate electrode. The first gate electrode and the second gate electrode do not overlap each other within a non-overlapping region.
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: June 9, 2015
    Assignee: SONY CORPORATION
    Inventors: Yasuhiro Yamada, Makoto Takatoku
  • Patent number: 9048156
    Abstract: According to one embodiment, a semiconductor image pickup device includes a pixel area and a non-pixel area. The device includes a first photoelectric conversion element formed in the pixel area, a first transistor formed in the pixel area and connected to the first photoelectric conversion element, a second photoelectric conversion element formed in the non-pixel area, a second transistor formed in the non-pixel area and connected to the second photoelectric conversion element, a metal wire formed at least in the non-pixel area, a first cap layer formed on the metal wire to prevent diffusion of metal contained in the metal wire, and a dummy via wire formed in the non-pixel area and penetrating the first cap layer.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: June 2, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hidetoshi Koike
  • Patent number: 9040982
    Abstract: An electrical device with light-responsive layers is disclosed. One or more electrically conducting stripes, each insulated from each other, are deposited on a smooth surface of a substrate. Then metal oxide layers, separated by a composite diffusion layer, are deposited. On top of the topmost metal oxide layer another set of elongated conductive strips are disposed in contact with the topmost metal oxide layer such that junctions are formed wherever the top and bottom conducting stripes cross. The resulting device is light responsive only when a certain sign of bias voltage is applied and may be used as a photodetector. An advantage that may be realized in the practice of some disclosed embodiments of the device is that this device may be formed without the use of conventional patterning, thereby significantly reducing manufacturing difficulty.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: May 26, 2015
    Assignee: Research Foundation of the City University of New York
    Inventor: Fred J. Cadieu
  • Patent number: 9041136
    Abstract: According to one aspect, there is provided an avalanche photodiode comprising a first semiconductor layer that absorbs photons of a first wavelength range and having a first energy bandgap; a second semiconductor layer that absorbs photons of a second wavelength range and having a second energy bandgap, the second energy bandgap being different from the first energy bandgap; and a control layer between the first semiconductor layer and the second semiconductor layer, the control layer having a third energy bandgap engineered to suppress carriers created from dark current.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: May 26, 2015
    Assignee: Agency for Science, Technology and Research
    Inventor: Ching Kean Chia