Light Patents (Class 257/431)
  • Patent number: 8766390
    Abstract: An apparatus includes a flip-chip semiconductor substrate, a light detection element configured to be formed over the flip-chip semiconductor substrate and to have a laminate structure including a first semiconductor layer of a first-conductive-type, a light-absorption layer formed over the first semiconductor layer, and a second semiconductor layer of a second-conductive-type formed over the light-absorption layer, an inductor configured to be connected to the light detection element over the flip-chip semiconductor substrate, an output electrode for bump connection configured to output a current generated by the light detection element through the inductor, a bias electrode for bump connection configured to apply a bias voltage to the light detection element through a bias electrode, and a line configured to cause a metal line of the inductor and the light detection element to be connected to the output electrode or the bias electrode.
    Type: Grant
    Filed: April 4, 2012
    Date of Patent: July 1, 2014
    Assignee: Fujitsu Limited
    Inventor: Tetsuya Miyatake
  • Patent number: 8766280
    Abstract: This substrate (11) for a device (50) that collects or emits radiation comprises a transparent polymer layer (1) and a barrier layer (2) on at least one face (1A) of the polymer layer. The barrier layer (2) consists of an antireflection multilayer of at least two thin transparent layers (21, 22, 23, 24) having both alternately lower and higher refractive indices and alternately lower and higher densities, wherein each thin layer (21, 22, 23, 24) of the constituent multilayer of the barrier layer (2) is an oxide, nitride or oxynitride layer.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: July 1, 2014
    Assignee: Saint-Gobain Performance Plastics Corporation
    Inventors: Claire Thoumazet, Emmanuel Valentin, Stephanie Roche
  • Publication number: 20140176570
    Abstract: This disclosure provides systems, methods and apparatus related to light absorbing structures. In one aspect, a light absorbing structure has a metal layer and a semiconductor layer in contact with the metal layer. Each layer has a thickness up to about 50 nm. The metal layer can include at least one of titanium (Ti), molybdenum (Mo), and aluminum (Al). The semiconductor layer can include a layer of amorphous silicon (a-Si). The light absorbing structure can be included in a display apparatus having a substrate supporting an array of display elements. The light absorbing structure can include a dielectric layer in contact with the metal layer and a thick metal layer in contact with the semiconductor layer. In another aspect, a light absorbing structure has a metal layer and an ITO layer in contact with the metal layer. The thickness of the ITO layer can be less than about 100 nm.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 26, 2014
    Applicant: Pixtronix, Inc.
    Inventor: Jianru Shi
  • Publication number: 20140175510
    Abstract: Provided is a germanium photodetector having a germanium epitaxial layer formed without using a buffer layer and a method of fabricating the same. In the method, an amorphous germanium layer is formed on a substrate. The amorphous germanium layer is heated up to a high temperature to form a crystallized germanium layer. A germanium epitaxial layer is formed on the crystallized germanium layer.
    Type: Application
    Filed: March 1, 2014
    Publication date: June 26, 2014
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Dongwoo SUH, Sang Hoon KIM, Gyungock KIM, JiHo JOO
  • Publication number: 20140175585
    Abstract: A method for manufacturing a light-receiving device includes the steps of forming a stacked semiconductor layer including a non-doped light-receiving layer, the light-receiving layer having an n-type conductivity; forming a selective growth mask made of an insulating film on the stacked semiconductor layer, the selective growth mask having a pattern including a plurality of openings; selectively growing a selective growth layer doped with a p-type impurity on a portion of the stacked semiconductor layer using the selective growth mask; and forming a p-n junction in a region of the light-receiving layer by diffusing the p-type impurity doped in the selective growth layer into the light-receiving layer during growing the selective growth layer. Each of the regions including the p-n junctions corresponds to one of the selective growth layers. The p-n junction in one of the regions is formed separately from the p-n junctions in the other regions.
    Type: Application
    Filed: December 20, 2013
    Publication date: June 26, 2014
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Yasuhiro IGUCHI
  • Publication number: 20140175285
    Abstract: A semiconductor device includes a substrate having an electrode structure. An absorber structure is suspended over the electrode structure and spaced a first distance apart from the first electrode structure. The absorber structure includes i) suspension structures extending upwardly from the substrate and being electrically connected to readout conductors, and ii) a pillar structure extending downwardly from the absorber structure toward the first electrode structure. The pillar structure has a contact portion located a second distance apart from the first electrode structure, the second distance being less than the first distance. The absorber structure is configured to flex toward the substrate under a test condition. The second distance is selected such that the contact portion of the pillar structure is positioned in contact with the first electrode structure when the absorber structure is flexed in response to the test condition.
    Type: Application
    Filed: December 17, 2013
    Publication date: June 26, 2014
    Applicant: Robert Bosch GmbH
    Inventors: Gary Yama, Fabian Purkl, Ando Lars Feyh
  • Patent number: 8759737
    Abstract: According to one embodiment, a solid-state imaging device includes a pixel outputting a photoelectrically converted signal, an ADC circuit disposed in an edge portion of a pixel area to convert an analog signal of the pixel into a digital signal on the basis of a result of comparison between a signal level output from the pixel and a ramp wave which is a reference, and a multi-ramp-wave generating circuit generating a plurality of ramp waves with different amplitudes and combining the plurality of ramp waves to obtain the ramp wave.
    Type: Grant
    Filed: July 5, 2011
    Date of Patent: June 24, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshitaka Egawa
  • Patent number: 8759928
    Abstract: A system and method for reducing cross-talk in complementary metal oxide semiconductor back side illuminated image sensors is provided. An embodiment comprises forming a grid around the pixel regions on an opposite side of the substrate than metallization layers. The grid may be formed of a material such as tungsten with a (110)-rich crystalline orientation. This orientation helps prevents defects that can occur during patterning of the grid.
    Type: Grant
    Filed: April 4, 2012
    Date of Patent: June 24, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Chieh Chang, Jian-Shin Tsai, Chih-Chang Huang, Ing-Ju Lee, Chi-Cheng Hung, Jun-Nan Nian, Chih-Chung Chang
  • Patent number: 8759936
    Abstract: Integrated circuit devices include thermal image sensors that utilize quantum dots therein to provide negative resistance characteristics to at least portions of the sensors. The thermal image sensor may include a sensing unit configured to absorb radiation incident on a first surface thereof and first and second electrodes electrically coupled to the sensing unit. The sensing unit includes a plurality of quantum dots therein, which may extend between the first and second electrodes. These quantum dots may be configured to impart a negative resistance characteristic to the sensing unit. In particular, the sensing unit may include a sensing layer having first and second opposing ends, which are electrically coupled to the first and second electrodes, respectively, and the plurality of quantum dots may be distributed within the sensing layer.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: June 24, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Choong Rae Cho
  • Patent number: 8754494
    Abstract: According to one embodiment, a solid-state image sensing device includes a semiconductor substrate on which a plurality of pixels are arranged, a transparent substrate including a first through via provided in an opening formed in advance to extend through, an adhesive including a second through via connected to the first through via and configured to bond the semiconductor substrate and the transparent substrate while exposing the pixels, and an imaging lens unit arranged on the transparent substrate.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: June 17, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsuko Kawasaki, Kenichiro Hagiwara, Hirokazu Sekine
  • Publication number: 20140159180
    Abstract: According to embodiments of the present invention, a semiconductor resistor structure is provided. The semiconductor resistor structure includes a substrate, a first region of a first conductivity type in the substrate, a second region of the first conductivity type in the substrate, the first region and the second region arranged one over the other, and an intermediate region of a second conductivity type in between the first region and the second region, wherein at least one gap is defined through the intermediate region and overlapping with the first region and the second region. According to further embodiments of the present invention, a semiconductor photomultiplier device is also provided.
    Type: Application
    Filed: December 6, 2013
    Publication date: June 12, 2014
    Inventors: Fei Sun, Ning Duan, Patrick Guo-Qiang Lo
  • Publication number: 20140159060
    Abstract: A patterned substrate includes a substrate body and a plurality of solid patterns. The solid patterns are set on the substrate body, and at least partial pitches between the solid patterns are different.
    Type: Application
    Filed: December 12, 2013
    Publication date: June 12, 2014
    Applicant: LUCEMITEK CO., LTD.
    Inventors: Cheng-Yu CHIU, Chun-Yi LEE, Chun-Hung CHEN, Chih-An CHEN, Wei-Lun WANG
  • Publication number: 20140158991
    Abstract: The disclosure relates generally to sealed electronic devices. More particularly, the invention relates to electronic devices employing organic devices having a seal. Packages having organic electronic devices are presented, and a number of sealing mechanisms are provided for hermetically sealing the package to protect the organic electronic device from environmental elements.
    Type: Application
    Filed: December 6, 2012
    Publication date: June 12, 2014
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Jie Jerry LIU, Kevin Henry JANORA, Xiaolei SHI, Rian ZHAO, Jeffrey Michael YOUMANS, Srinivas Pravad SISTA
  • Publication number: 20140159181
    Abstract: A graphene-nanoparticle structure includes a substrate, a graphene layer disposed on the substrate and a nanoparticle layer disposed on the graphene layer. The graphene-nanoparticle structure may be formed by alternately laminating the graphene layer and the nanoparticle layer and may play the role of a multifunctional film capable of realizing various functions according to the number of laminated layers and the selected material of the nanoparticles.
    Type: Application
    Filed: December 11, 2013
    Publication date: June 12, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-min KIM, Dae-Jun KANG, Seung-nam CHA, Muhammad Imran SHAKIR, Young-jun PARK
  • Patent number: 8748877
    Abstract: The invention provides a material for forming a passivation film for a semiconductor substrate. The material includes a polymer compound having an anionic group or a cationic group.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: June 10, 2014
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Akihiro Orita, Masato Yoshida, Takeshi Nojiri, Yoichi Machii, Mitsunori Iwamuro, Shuichiro Adachi, Tetsuya Sato, Toru Tanaka
  • Patent number: 8749008
    Abstract: A solid-state imaging device in which a pixel circuit formed on the first surface side of a semiconductor substrate is shared by a plurality of light reception regions and second surface side of the semiconductor substrate is the light incident side of the light reception regions. The second surface side regions of the light reception regions are arranged at approximately even intervals and the first surface side regions of the light reception regions e are arranged at uneven intervals. Respective second surface side regions and first surface side regions are joined in the semiconductor substrate so that the light reception regions extend from the second surface side to the first surface side of the semiconductor substrate.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: June 10, 2014
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 8749675
    Abstract: A solid state image pickup device which can prevent color mixture by using a layout of a capacitor region provided separately from a floating diffusion region and a camera using such a device are provided. A photodiode region is a rectangular region including a photodiode. A capacitor region includes a carrier holding unit and is arranged on one side of the rectangle of the photodiode region as a region having a side longer than the one side. In a MOS unit region, an output unit region including an output unit having a side longer than the other side which crosses the one side of the rectangle of the photodiode region is arranged on the other side. A gate region and the FD region are arranged between the photodiode region and the capacitor region.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: June 10, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toru Koizumi, Akira Okita, Masanori Ogura, Shin Kikuchi, Tetsuya Itano
  • Patent number: 8749006
    Abstract: An improved image sensor, e.g., CCD, CID, CMOS. The image sensor includes a substrate, e.g., silicon wafer. The sensor also includes a plurality of photo diode regions, where each of the photo diode regions is spatially disposed on the substrate. The sensor has an interlayer dielectric layer overlying the plurality of photo diode regions and a shielding layer formed overlying the interlayer dielectric layer. A silicon dioxide bearing material is overlying the shielding layer. A plurality of lens structures are formed on the silicon dioxide bearing material. The sensor also has a color filter layer overlying the lens structures and a plurality of second lens structures overlying the color filter layer according to a preferred embodiment.
    Type: Grant
    Filed: December 7, 2007
    Date of Patent: June 10, 2014
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Herb Huang, Mieno Fumitake
  • Publication number: 20140151832
    Abstract: A semiconductor device includes a semiconductor substrate, a light receiving element region, a peripheral region, a boundary region, a plurality of signal lines, and a conductive layer. In light receiving element region, light receiving elements for performing photoelectric conversion are formed. Peripheral region is formed outside light receiving element region for performing input/output of an electric signal from/to the outside of the semiconductor substrate. Boundary region is formed between light receiving element region and peripheral region. The plurality of signal lines are arranged in boundary region for performing input/output of electric signals between light receiving element region and peripheral region. Conductive layer is arranged in a layer different from each of the plurality of signal lines. A relative position of conductive layer as seen from each of the plurality of signal lines is all identical, and conductive layer is all arranged in an identical layer.
    Type: Application
    Filed: November 28, 2013
    Publication date: June 5, 2014
    Applicant: Renesas Electronics Corporation
    Inventors: Tsukasa Saiki, Shido Tanaka
  • Patent number: 8742522
    Abstract: A method of making a semiconductor radiation detector wherein the metal layers which serve as the cathode and anode electrodes are recessed from the designated prospective dice lines which define the total upper and lower surface areas for each detector such that the dicing blade will not directly engage the metal during dicing and therefore prevent metal from intruding upon (smearing) the vertical side walls of the detector substrate.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: June 3, 2014
    Assignee: eV Products, Inc.
    Inventors: Handong Li, Michael Prokesch, John F. Eger
  • Patent number: 8742543
    Abstract: The invention is directed to an avalanche photodiode containing a substrate and semiconductor layers with various electro-physical properties having common interfaces both between themselves and with the substrate. The avalanche photodiode may be characterized by the presence in the device of at least one matrix consisting of separate solid-state areas with enhanced conductivity surrounded by semiconductor material with the same type of conductivity. The solid-state areas are located between two additional semiconductor layers, which have higher conductivity in comparison to the semiconductor layers with which they have common interfaces. The solid-state areas are generally made of the same material as the semiconductor layers surrounding them but with conductivity type that is opposite with respect to them. The solid-state areas may be made of a semiconductor with a narrow forbidden zone with respect to the semiconductor layers with which they have common interfaces.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: June 3, 2014
    Inventors: Ziraddin Yagub-Ogly Sadygov, Abdelmounairne Faouzi Zerrouk
  • Patent number: 8742308
    Abstract: An imaging array comprises a photodetector layer, a readout IC (ROIC) layer, and a charge storage capacitor layer which is distinct from the photodetector and ROIC layers; the layers are electrically interconnected to form the array. The capacitors within the charge storage capacitor layer are preferably micromachined; the charge storage capacitor layer can be an interposer layer or an outer layer.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: June 3, 2014
    Assignee: Teledyne Scientific & Imaging, LLC
    Inventors: Jeffrey F. DeNatale, David J. Gulbransen, William E. Tennant, Alexandros P. Papavasiliou
  • Patent number: 8742413
    Abstract: In a photosensor and a method of manufacturing the same, the photosensor comprises: an intrinsic silicon layer formed on a substrate; a P-type doped region formed in a same plane with the intrinsic silicon layer; and an oxide semiconductor layer formed on or under the intrinsic silicon layer, and overlapping an entire region of the intrinsic silicon layer.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: June 3, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jae-Hwan Oh, Won-Kyu Lee, Seong-Hyun Jin, Young-Jin Chang, Jae-Beom Choi
  • Patent number: 8742523
    Abstract: A semiconductor device contains a photodiode which has a plurality of p-n junctions disposed in a stack. Two contact structures on the semiconductor device are connected across at least one of the junctions to allow electrical connection to an external detection circuit, so that signal current from incident light on the photodiode which generates electron-hole pairs across the connected junction may be sensed by the external detection circuit. At least one of the junctions is electrically shorted at the semiconductor device, so that signal current from the shorted junction may not be sensed by the external detection circuit.
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: June 3, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Henry Litzmann Edwards, Dimitar Trifonov Trifonov
  • Publication number: 20140145281
    Abstract: Embodiments related to controlling of photo-generated charge carriers are described and depicted.
    Type: Application
    Filed: November 29, 2013
    Publication date: May 29, 2014
    Inventors: Thomas BEVER, Henning FEICK, Dirk OFFENBERG, Stefano PARASCANDOLA, Ines UHLIG, Thoralf KAUTZSCH, Dirk MEINHOLD, Hanno MELZNER
  • Patent number: 8734008
    Abstract: An active sensor apparatus includes an array of sensor elements arranged in a plurality of columns and rows of sensor elements. The sensor apparatus includes a plurality of column and row thin film transistor switches for selectively activating the sensor elements, and a plurality of column and row thin film diodes for selectively accessing the sensor elements to obtain information from the sensor elements. The thin film transistor switches and thin film diodes are formed on a common substrate.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: May 27, 2014
    Assignee: Next Biometrics AS
    Inventor: Matias N. Troccoli
  • Patent number: 8734936
    Abstract: A transparent conductive film includes a transparent film substrate; and a first and second crystalline transparent conductive laminate, wherein the second crystalline layer is located between the transparent film substrate and the first transparent conductive layer, and a second content of the tetravalent metal element oxide of the second transparent conductive layer is higher than a first content of the tetravalent metal element oxide of the second transparent conductive layer. The transparent conductive film allows a reduction in crystallization time.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: May 27, 2014
    Assignee: Nitto Denko Corporation
    Inventors: Motoki Haishi, Tomotake Nashiki, Tomonori Noguchi, Yoshifumi Asahara
  • Patent number: 8735946
    Abstract: Embodiments of the invention relate to substrates comprising a base wafer, an insulating layer and a top semiconductor layer, wherein the insulating layer comprises at least a zone wherein a density of charges is in absolute value higher than 1010 charges/cm2. The invention also relates to processes for making such substrates.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: May 27, 2014
    Assignee: Soitec
    Inventors: Mohamad A Shaheen, Frederic Allibert, Gweltaz Gaudin, Fabrice Lallement, Didier Landru, Karine Landry, Carlos Mazure
  • Patent number: 8728833
    Abstract: An improved method for encapsulating LEDs in a polymer coat is described. A substrate houses an LED, and a polymer layer is brought into proximity with the substrate and LED. The polymer layer is melted over the substrate, encapsulating the LED onto the substrate.
    Type: Grant
    Filed: May 9, 2006
    Date of Patent: May 20, 2014
    Assignee: Intellectual Discovery Co., Ltd.
    Inventor: Tong Fatt Chew
  • Patent number: 8729543
    Abstract: Methods and devices are provided for forming multi-nary semiconductor. In one embodiment, a method is provided comprising of depositing a precursor material onto a substrate, wherein the precursor material may include or may be used with an additive to minimize concentration of group IIIA material such as Ga in the back portion of the final semiconductor layer. The additive may be a non-copper Group IB additive in elemental or alloy form. Some embodiments may use both selenium and sulfur, forming a senary or higher semiconductor alloy.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: May 20, 2014
    Assignee: aeris CAPITAL Sustainable IP Ltd.
    Inventors: David B. Jackrel, Katherine Dickey, Kristin Pollock, Jacob Woodruff, Peter Stone, Gregory Brown
  • Publication number: 20140131728
    Abstract: Provided is a copper indium gallium selenium (CIGS)- or copper zinc tin sulfur (CZTS)-based solar cell including a back electrode layer and a light-absorbing layer, wherein the light-absorbing layer has a composition of CuxInyGa1-y(SzSe1-z)2 (wherein 0.85?x<1, 0<y<1, 0<z<1, and each of x, y and z represents a real number) or Cu(2-p)Zn(2-q)Snq(SrSe(1-r))4 (wherein 1.4?p<2, 0<q<2, 0<r<2, and each of p, q and r represents a real number). The CIGS- or CZTS-based thin-film solar cell causes no interlayer delamination and has improved durability and photoelectric conversion efficiency. Also provided is a method for fabricating a CIGS- or CZTS-based thin-film solar cell by which conversion of molybdenum back electrode layer to molybdenum diselenide is controlled.
    Type: Application
    Filed: September 12, 2013
    Publication date: May 15, 2014
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jong Ku PARK, So Hye CHO, Bong Geun SONG, Seung Yong LEE, Bo In PARK, Hyung Ho PARK
  • Publication number: 20140131761
    Abstract: The present invention relates to a graphene sheet and a transparent electrode, and an active layer including the same, and a display device, an electronic device, an optoelectronic device, a battery, a solar cell, and a dye-sensitized solar cell including these. The graphene sheet includes a lower sheet including 1 to 20 graphene layers, and a ridge formed on the lower sheet and including more graphene layers. The ridge has a metal grain boundary shape.
    Type: Application
    Filed: January 21, 2014
    Publication date: May 15, 2014
    Applicant: UNIST Academy-Industry Research Corporation
    Inventors: Soon-Yong Kwon, Sung Youb Kim, Ki bog Park, Jin Sung Kwak, Jae Hwan Chu, Jae Kyung Choi
  • Patent number: 8723187
    Abstract: Imaging device including several pixels, each pixel including at least: a portion of a diamond layer placed between a first and second electrode, and able to achieve transduction of photons and/or high energy particles radiation into an electrical signal. an electronic circuit for amplification and/or reading of the electrical signal, electrically connected to at least the first electrode and made in a portion of a semiconductor material layer having a thickness lower than or equal to around 1 ?m and forming the surface layer of an SOD type substrate, also including the diamond layer and a dielectric layer placed between the diamond layer and the electronic circuit.
    Type: Grant
    Filed: December 29, 2010
    Date of Patent: May 13, 2014
    Assignee: Commissariat a l'energie atomique et aux energies alternatives
    Inventor: Jean-Paul Mazellier
  • Patent number: 8723283
    Abstract: An optical module includes a stem, an optical element, data signal lead pins, a printed circuit board, and a post portion. The optical element is mounted on one surface of the stem. The data signal lead pins are connected to the optical element, and protrudes through the other surface of the stem. The printed circuit board has one surface on which data signal transmission lines for contact with the data signal lead pins are formed and the other surface on a part of which a stiffener is formed to protrude. The post portion protrudes from the other surface of the stem, supports the printed circuit board while in close contact with the stiffener such that the data signal lead pins can contact the data signal transmission lines while being disposed linearly above the data signal transmission lines, and includes a coupling portion to be coupled with the stiffener.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: May 13, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sae-Kyoung Kang, Joon-Ki Lee, Joon-Young Huh
  • Patent number: 8722453
    Abstract: The method includes: steps of forming an n-type diffusion layer having an n-type impurity diffused thereon at a first surface side of a p-type silicon substrate; forming a reflection prevention film on the n-type diffusion layer; forming a back-surface passivation film made of an SiONH film on a second surface of the silicon substrate; forming a paste material containing silver in a front-surface electrode shape on the reflection prevention film; forming a front surface electrode that is contacted to the n-type diffusion layer by sintering the silicon substrate; forming a paste material containing a metal in a back-surface electrode shape on the back-surface passivation film; and forming a back surface electrode by melting a metal in the paste material by irradiating laser light onto a forming position of the back surface electrode and by solidifying the molten metal.
    Type: Grant
    Filed: April 14, 2009
    Date of Patent: May 13, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventor: Mitsunori Nakatani
  • Patent number: 8716824
    Abstract: An optical article and method of making the same are provided. The optical article has optical multi-aperture operation. The optical article has one or more electrically conductive and selectively passivated patterns.
    Type: Grant
    Filed: January 28, 2009
    Date of Patent: May 6, 2014
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: Jitendra S. Goela, Michael A. Pickering, Neil D. Brown, Angelo Chirafisi, Mark Lefebvre, Jamie L. Triba
  • Patent number: 8716821
    Abstract: A semiconductor device contains a photodiode which includes a buried collection region formed by a bandgap well to vertically confine photo-generated minority carriers. the bandgap well has the same conductivity as the semiconductor material immediately above and below the bandgap well. A net average doping density in the bandgap well is at least a factor of ten less than net average doping densities immediately above and below the bandgap well. A node of the photodiode, either the anode or the cathode, is connected to the buried collection region to collect the minority carriers, the polarity of the node matches the polarity of the minority carriers. The photodiode node connected to the buried collection region occupies less lateral area than the lateral area of the buried collection region.
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: May 6, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Henry Litzmann Edwards, Dimitar Trifonov Trifonov
  • Patent number: 8716647
    Abstract: An analog silicon photomultiplier system includes at least one analog pixel comprising a plurality of analog photodiodes (APDs), and a capacitor, a signal generator, a phase detector, and a compensation network. The signal generator is configured to generate and propagate a sinusoidal signal concurrently along first and second transmission lines. A capacitor is loaded on the first transmission line when an APD corresponding to the capacitor detects a photon. The phase detector is coupled with the first and second transmission lines, determines a phase difference between the first transmission line and the second transmission line and calculates a number of APDs that have fired from the phase difference. The compensation network is coupled with the second transmission line and the phase detector, and comprises a plurality of compensation capacitors, wherein the compensation capacitors are loaded on the second transmission line in proportion to the number of APDs that have fired.
    Type: Grant
    Filed: November 6, 2009
    Date of Patent: May 6, 2014
    Assignee: NXP, B.V.
    Inventors: Padraig O'Mathuna, Yong Luo
  • Publication number: 20140117345
    Abstract: An optoelectronic component having a substrate (1), an anode (2) and a cathode (10) and at least one active layer (6) disposed between the anode and the cathode. An amorphous dielectric layer (3) which contains or consists of a metal oxide, a metal nitride or a metal oxynitride is disposed directly on the cathode-side surface of the anode. The metal contained in the metal oxide, metal nitride or metal oxynitride is selected from one or several of the metals of the group consisting of aluminium, gallium, titanium, zirconium, hafnium, tantalum, lanthanum and zinc.
    Type: Application
    Filed: January 10, 2014
    Publication date: May 1, 2014
    Inventors: Tilman SCHLENKER, Ralph Paetzold
  • Publication number: 20140117485
    Abstract: An image sensor pixel includes a photodiode region having a first polarity doping type disposed in a semiconductor layer. A pinning surface layer having a second polarity doping type is disposed over the photodiode region in the semiconductor layer. The second polarity is opposite from the first polarity. A first polarity charge layer is disposed proximate to the pinning surface layer over the photodiode region. An contact etch stop layer is disposed over the photodiode region proximate to the first polarity charge layer. The first polarity charge layer is disposed between the pinning surface layer and the contact etch stop layer such that first polarity charge layer cancels out charge having a second polarity that is induced in the contact etch stop layer. A passivation layer is also disposed over the photodiode region between the pinning surface layer and the contact etch stop layer.
    Type: Application
    Filed: October 25, 2012
    Publication date: May 1, 2014
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Howard E. Rhodes, Dajiang Yang, Gang Chen, Duli Mao, Vincent Venezia
  • Patent number: 8710613
    Abstract: A pickup device according to the present invention includes a photoelectric conversion portion, a charge holding portion configured to include a first semiconductor region, and a transfer portion configured to include a transfer gate electrode that controls a potential between the charge holding portion and a sense node. A second semiconductor region is disposed on a surface of a semiconductor region between the control electrode and the transfer gate electrode. A third semiconductor region is disposed below the second semiconductor region. An impurity concentration of the third semiconductor region is higher than the impurity concentration of the first semiconductor region.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: April 29, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yuichiro Yamashita, Masahiro Kobayashi, Yusuke Onuki
  • Patent number: 8709841
    Abstract: A woven mesh substrate with semiconductor elements and a method and a device for manufacturing such a substrate, and more particularly a technique that makes it possible to exploit a woven mesh substrate with semiconductor elements in which a plurality of spherical semiconductor elements having a light receiving function or a light-emitting function are installed on a woven mesh substrate in net form that is made up from a plurality of vertical strands that are insulating and a plurality of horizontal strands that are conductive.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: April 29, 2014
    Assignee: Kyosemi Corporation
    Inventor: Josuke Nakata
  • Patent number: 8709859
    Abstract: A method of fabricating a solar cell on a conveyer belt is provided. The method includes the following steps. A first surface of an aluminum foil is coated with a layer of phosphorous mixed with a plurality of graphite powders and put on the conveyer belt. A first thermal treatment is performed to activate a portion of the aluminum foil and the phosphorous layer on the first surface to form an aluminum phosphide (AlP) layer. A molten silicon material is spray-coated on a second surface of the remaining aluminum foil, and a second thermal treatment is performed to make the silicon material transferring into a p-type polySi layer on the n-type AlP layer. A solar cell including the n-type AlP layer and the p-type polySi layer is formed, and the solar cell is respectively annealed and cooled down in a first and a second vertical stack.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: April 29, 2014
    Assignee: GAMC Biotech Development Co., Ltd.
    Inventor: Chia-Gee Wang
  • Patent number: 8710424
    Abstract: Embodiments of the present invention include an electron counter with a charge-coupled device (CCD) register configured to transfer electrons to a Geiger-mode avalanche diode (GM-AD) array operably coupled to the output of the CCD register. At high charge levels, a nondestructive amplifier senses the charge at the CCD register output to provide an analog indication of the charge. At low charge levels, noiseless charge splitters or meters divide the charge into single-electron packets, each of which is detected by a GM-AD that provides a digital output indicating whether an electron is present. Example electron counters are particularly well suited for counting photoelectrons generated by large-format, high-speed imaging arrays because they operate with high dynamic range and high sensitivity. As a result, they can be used to image scenes over a wide range of light levels.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: April 29, 2014
    Assignee: Massachusetts Institute of Technology
    Inventors: David C. Shaver, Bernard B. Kosicki, Robert K. Reich, Dennis D. Rathman, Daniel R. Schuette, Brian F. Aull
  • Patent number: 8709860
    Abstract: The object is to improve the conversion efficiency of a photoelectric conversion device. This object can be achieved by a photoelectric conversion device including an electrode and a semiconductor layer which is provided on one main surface of the electrode and contains a I-III-VI group compound semiconductor, wherein the semiconductor layer includes a connection layer that is located at a position on the one main surface side of the electrode and has a tendency that, the closer to the one main surface, the greater a quotient obtained by dividing an amount of substance of a I-B group element by an amount of substance of a III-B group element becomes.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: April 29, 2014
    Assignee: KYOCERA Corporation
    Inventors: Shintaro Kubo, Rui Kamada, Yusuke Miyamichi, Shuji Nakazawa
  • Patent number: 8709919
    Abstract: A method is for the synthesis of an array of metal nanowires (w) capable of supporting localized plasmon resonances. A metal film (M) deposited on a planar substrate (D) is irradiated with a defocused beam of noble gas ions (IB) under high vacuum, so that, with increasing ion doses a corrugation is produced on the metal film surface, formed by a mutually parallel nanoscale self-organized corrugations (r). Subsequently, the height of the self-organized corrugations peaks is increased relative to the valleys (t) interposed therebetween. Then the whole the metal film is eroded so as to expose the substrate at the valleys, and to mutually disconnect the self-organized corrugations, thereby generating the array of metal nanowires. Finally, the transversal cross-section of the nanowires is reduced in a controlled manner so as to adjust the localized plasmon resonances wavelength which can be associated thereto. The nanowires array constitutes an electrode of an improved photonic device.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: April 29, 2014
    Assignee: Universita' Degli Studi di Genova
    Inventors: Francesco Buatier De Mongeot, Corrado Boragno, Ugo Valbusa, Daniele Chiappe, Andrea Toma
  • Patent number: 8709958
    Abstract: An embodiment of the invention provides a solid-state image pickup element, including: a semiconductor layer having a photodiode, photoelectric conversion being carried out in the photodiode; a silicon oxide film formed on the semiconductor layer in a region having at least the photodiode by using plasma; and a film formed on the silicon oxide film and having negative fixed charges.
    Type: Grant
    Filed: June 11, 2012
    Date of Patent: April 29, 2014
    Assignee: Sony Corporation
    Inventors: Itaru Oshiyama, Susumu Hiyama
  • Patent number: 8710614
    Abstract: A light receiving element includes a core configured to propagate a signal light, a first semiconductor layer having a first conductivity type, the first semiconductor layer being configured to receive the signal light from the core along a first direction in which the core extends, an absorbing layer configured to absorb the signal light received by the first semiconductor layer, and a second semiconductor layer having a second conductivity type opposite to the first conductivity type.
    Type: Grant
    Filed: February 22, 2012
    Date of Patent: April 29, 2014
    Assignee: Fujitsu Limited
    Inventor: Kazumasa Takabayashi
  • Patent number: 8704326
    Abstract: A thin-film photoelectric conversion device includes a crystalline germanium photoelectric conversion layer having improved open circuit voltage, fill factor, and photoelectric conversion efficiency for light having a longer wavelength. The photoelectric conversion device comprises a first electrode layer, one or more photoelectric conversion units, and a second electrode layer sequentially stacked on a substrate, wherein each of the photoelectric conversion units comprises a photoelectric conversion layer arranged between a p-type semiconductor layer and an n-type semiconductor layer. At least one of the photoelectric conversion units includes a crystalline germanium photoelectric conversion layer comprising a crystalline germanium semiconductor that is substantially intrinsic or weak n-type and is essentially free of silicon.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: April 22, 2014
    Assignee: Kaneka Corporation
    Inventors: Naoki Kadota, Toshiaki Sasaki
  • Patent number: 8704924
    Abstract: A solid-state imaging device includes a substrate, a photoelectric conversion element provided on the light incidence side of the substrate and including a photoelectric conversion film sandwiched between a first electrode provided separately for each of pixels, and a second electrode provided opposite the first electrode, the photoelectric conversion film being made of an organic material or an inorganic material and generating a signal charge according to the quantity of incident light, an amplifier transistor having an amplifier gate electrode connected to the first electrode, and a voltage control circuit that is connected to the second electrode, and supplies a desired voltage to the second electrode.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: April 22, 2014
    Assignee: Sony Corporation
    Inventors: Taiichiro Watanabe, Keiji Mabuchi, Tetsuji Yamaguchi, Isao Hirota, Kouichi Harada