Light Patents (Class 257/431)
  • Patent number: 8901694
    Abstract: An optical input/output (I/O) device is provided. The device includes a substrate including an upper trench; a waveguide disposed within the upper trench of the substrate; a photodetector disposed within the upper trench of the substrate and comprising a first end surface optically connected to an end surface of the waveguide; and a light-transmitting insulating layer interposed between the end surface of the waveguide and the first end surface of the photodetector.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: December 2, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Pil-Kyu Kang, Joong-Han Shin, Byung-Lyul Park, Gil-Heyun Choi
  • Patent number: 8901692
    Abstract: An imaging device includes at least one photosite formed in a semiconducting substrate and fitted with a filtering device for filtering at least one undesired radiation. The filtering device is buried in the semiconducting substrate at a depth depending on the wavelength of the undesired radiation.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: December 2, 2014
    Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Rousset) SAS, STMicroelectronics SA
    Inventors: David Coulon, Benoit Deschamps, Frédéric Barbier
  • Patent number: 8900488
    Abstract: A conductive paste composition contains a source of an electrically conductive metal, an alkaline-earth-metal boron tellurium oxide, and an organic vehicle. An article such as a high-efficiency photovoltaic cell is formed by a process of deposition of the paste composition on a semiconductor device substrate (e.g., by screen printing) and firing the paste to remove the organic vehicle and sinter the metal and establish electrical contact between it and the device.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: December 2, 2014
    Assignee: E I du Pont de Nemours and Company
    Inventors: Zhigang Rick Li, Kurt Richard Mikeska, David Herbert Roach, Carmine Torardi, Paul Douglas Vernooy
  • Publication number: 20140346627
    Abstract: An imaging device accommodating package includes an insulating base body and an imaging device connecting pad. The insulating base body includes a lower surface, a through-hole and a bonding area on the bottom surface of the recess. The lower surface includes a recess. The through-hole is formed in a bottom surface of the recess in a perspective plan view. The bonding area is used for an imaging device. The imaging device connecting pad is formed on an upper surface of the insulating base body or on an inner surface of the through-hole.
    Type: Application
    Filed: November 30, 2012
    Publication date: November 27, 2014
    Applicant: KYOCERA CORPORATION
    Inventors: Hiroshi Yamada, Akihiko Funahashi, Yousuke Moriyama
  • Patent number: 8896076
    Abstract: A photoelectric conversion element of an embodiment is a photoelectric conversion element which performs photoelectric conversion by receiving illumination light having n light emission peaks having a peak energy Ap (eV) (where 1?p?n and 2?n) of 1.59?Ap?3.26 and a full width at half maximum Fp (eV) (where 1?p?n and 2?n), wherein the photoelectric conversion element includes m photoelectric conversion layers having a band gap energy Bq (eV) (where 1?q?m and 2?m?n), and the m photoelectric conversion layers each satisfy the relationship of Ap?Fp<Bq?Ap with respect to any one of the n light emission peaks.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: November 25, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinji Saito, Rei Hashimoto, Mizunori Ezaki, Shinya Nunoue, Hironori Asai
  • Patent number: 8895965
    Abstract: Provided is a photoelectric conversion element including a photoconductor containing a complex of a conductive polymer and/or polymer semiconductor and a protein containing at least one dye having a long-lived excited state.
    Type: Grant
    Filed: February 22, 2012
    Date of Patent: November 25, 2014
    Assignee: Sony Corporation
    Inventors: Wei Luo, Yuichi Tokita, Yoshio Goto, Seiji Yamada, Satoshi Nakamaru
  • Patent number: 8890138
    Abstract: An optical touch panel may be used remotely to control a large-sized display device. According to a method of fabricating the optical touch panel, an optical sensor transistor for sensing light and a switch transistor for drawing data can be formed together on the same substrate by using a relatively simple process. The optical touch panel may include an optical sensor transistor and a switch transistor. The optical sensor transistor may be configured to sense light and the switch transistor may be configured to draw data from the optical sensor transistor. The optical sensor transistor may include a light sensitive oxide semiconductor material as a channel layer. The switch transistor may include a non-light sensitive oxide semiconductor material as a channel layer.
    Type: Grant
    Filed: January 13, 2011
    Date of Patent: November 18, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-chul Park, I-hun Song, Chang-jung Kim
  • Patent number: 8890331
    Abstract: A photoelectric conversion device includes a first semiconductor substrate including a photoelectric conversion unit for generating a signal charge in accordance with an incident light, and a second semiconductor substrate including a signal processing unit for processing an electrical signal on the basis of the signal charge generated in the photoelectric conversion unit. The signal processing unit is situated in an orthogonal projection area from the photoelectric conversion unit to the second semiconductor substrate. A multilayer film including a plurality of insulator layers is provided between the first semiconductor substrate and the second semiconductor substrate. The thickness of the second semiconductor substrate is smaller than 500 micrometers. The thickness of the second semiconductor substrate is greater than the distance from the second semiconductor substrate and a light-receiving surface of the first semiconductor substrate.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: November 18, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mineo Shimotsusa, Takeshi Ichikawa, Yasuhiro Sekine
  • Patent number: 8890128
    Abstract: The present invention provides an organic display device, comprising: an organic solar module for obtaining solar energy and converting the obtained solar energy into electric power, and an ultraviolet organic light emitting module driven to emit ultraviolet light by the electric power obtained from the organic solar module. The present invention can fully use solar energy and carry out ultraviolet display by combining the ultraviolet organic light emitting module with the organic solar module.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: November 18, 2014
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventors: Yawei Liu, Yuan-Chun Wu
  • Patent number: 8890297
    Abstract: A light emitting device package according to embodiments comprises: a package body; a lead frame on the package body; a light emitting device supported by the package body and electrically connected with the lead frame; a filling material surrounding the light emitting device; and a phosphor layer comprising phosphors on the filling material.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: November 18, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Yu Ho Won, Geun Ho Kim
  • Patent number: 8890268
    Abstract: An embodiment of the invention provides a chip package, which includes: a semiconductor substrate having a device region; a package layer disposed on the semiconductor substrate; a spacing layer disposed between the semiconductor substrate and the package layer and surrounding the device region; and an auxiliary pattern having a hollow pattern formed in the spacing layer, a material pattern located between the spacing layer and the device region, or combinations thereof.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: November 18, 2014
    Inventors: Yu-Lung Huang, Tsang-Yu Liu
  • Publication number: 20140332759
    Abstract: According to various embodiments, an electrode may include at least one layer including a chemical compound including aluminum and titanium.
    Type: Application
    Filed: May 13, 2013
    Publication date: November 13, 2014
    Applicant: Infineon Technologies Dresden GmbH
    Inventors: Dirk Meinhold, Sven Schmidbauer, Markus Fischer, Norbert Urbansky
  • Patent number: 8884390
    Abstract: A die includes a first plurality of edges, and a semiconductor substrate in the die. The semiconductor substrate includes a first portion including a second plurality of edges misaligned with respective ones of the first plurality of edges. The semiconductor substrate further includes a second portion extending from one of the second plurality of edges to one of the first plurality of edges of the die. The second portion includes a first end connected to the one of the second plurality of edges, and a second end having an edge aligned to the one of the first plurality of edges of the die.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: November 11, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: I-I Cheng, Chih-Kang Chao, Volume Chien, Chi-Cherng Jeng, Pin Chia Su, Chih-Mu Huang
  • Patent number: 8884394
    Abstract: A signal charge collecting region is disposed inside a charge generating region so as to be surrounded by the charge generating region, and collects signal charges from the charge generating region. An unnecessary charge collecting region is disposed outside the charge generating region so as to surround the charge generating region, and collects unnecessary charges from the charge generating region. A transfer electrode is disposed between the signal charge collecting region and the charge generating region, and causes the signal charges from the charge generating region to flow into the signal charge collecting region in response to an input signal. An unnecessary charge collecting gate electrode is disposed between the unnecessary charge collecting region and the charge generating region, and causes the unnecessary charges from the charge generating region to flow into the unnecessary charge collecting region in response to an input signal.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: November 11, 2014
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Mitsuhito Mase, Takashi Suzuki, Jun Hiramitsu
  • Publication number: 20140327037
    Abstract: A method of manufacturing at least one semiconducting micro- or nano-wire used for formation of an optoelectric structure, optoelectronic structures including the micro- or nano-wires, and a method enabling manufacture of the photoelectronic structures. The method includes providing a semiconducting substrate, forming a crystalline buffer layer on the substrate, the buffer layer having a first zone over at least part of its thickness composed mainly of magnesium nitride in a form MgxNy, and forming at least one semiconducting micro- or nano-wire on the buffer layer.
    Type: Application
    Filed: December 19, 2012
    Publication date: November 6, 2014
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Amelie Dussaigne, Philippe Gilet, Francois Martin
  • Patent number: 8878121
    Abstract: A solid-state imaging device includes: a plurality of substrates stacked via a wiring layer or an insulation layer; a light sensing section that is formed in a substrate, of the plurality of substrates, disposed on a light incident side and that generates a signal charge in accordance with an amount of received light; and a contact portion that is connected to a non-light incident-surface side of the substrate in which the light sensing section is formed and that supplies a desired voltage to the substrate from a wire in a wiring layer disposed on a non-light incident side of the substrate.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: November 4, 2014
    Assignee: Sony Corporation
    Inventor: Takeshi Matsunuma
  • Patent number: 8878242
    Abstract: A device includes a device isolation region formed into a semiconductor substrate, the device isolation region having gaps for photo-sensitive devices, a dummy gate structure formed over the substrate, the dummy gate structure comprising at least one structure that partially surrounds a doped pickup region formed into the device isolation region, and a via connected to the doped pickup region.
    Type: Grant
    Filed: July 8, 2013
    Date of Patent: November 4, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Tzu-Hsuan Hsu, Szu-Ying Chen, Wei-Cheng Hsu, Hsiao-Hui Tseng
  • Patent number: 8878325
    Abstract: A device includes an image sensor chip having formed therein an elevated photodiode, and a device chip underlying and bonded to the image sensor chip. The device chip has a read out circuit electrically connected to the elevated photodiode.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: November 4, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Hsun Wan, Yi-Shin Chu, Szu-Ying Chen, Pao-Tung Chen, Jen-Cheng Liu, Dun-Nian Yaung
  • Patent number: 8878268
    Abstract: At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: November 4, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toru Koizumi, Akira Okita, Tetsuya Itano, Sakae Hashimoto, Ryuichi Mishima
  • Publication number: 20140311221
    Abstract: Embodiments of the present disclosure include sensors, arrays of conductometric sensors, devices including conductometric sensors, methods of making conductometric sensors, methods of using conductometric gas sensors, methods of enhancing sensor response with light, and the like.
    Type: Application
    Filed: April 25, 2014
    Publication date: October 23, 2014
    Inventors: James Gole, William Ivey Laminack
  • Publication number: 20140313384
    Abstract: A method for manufacturing a solid-state image sensor having a pixel region, a peripheral circuit region, and an intermediate region interposed between the pixel region and the peripheral circuit region, includes forming a high melting point metal compound in active regions of the peripheral circuit region and the intermediate region, forming an etch stop film on the high melting point metal compound formed in the active regions of the peripheral circuit region and the intermediate region, forming an interlayer insulating film on the etch stop film, and forming, by using the etch stop film, a contact plug to contact the high melting point metal compound in the active region of the peripheral circuit region.
    Type: Application
    Filed: July 8, 2014
    Publication date: October 23, 2014
    Inventors: Kentarou Suzuki, Yusuke Onuki
  • Patent number: 8866268
    Abstract: A semiconductor package structure and a manufacturing method thereof are provided. The semiconductor package structure includes a semiconductor die, a thermally conductive film, a substrate, a plurality of electrically conductive film patterns, and at least one insulator. The thermally conductive film is disposed on the bottom of the semiconductor die. The substrate is substantially comprised of the electrically conductive material or semiconductor material. Furthermore, a first hole is disposed on and passed all the way through the substrate, and the semiconductor die is disposed in the first hole. The electrically conductive film patterns are disposed on the substrate, and not contacting with each other. In addition, the insulator is connected between the semiconductor die and the substrate.
    Type: Grant
    Filed: July 15, 2011
    Date of Patent: October 21, 2014
    Assignee: Unistars Corporation
    Inventors: Shang-Yi Wu, Wen-Cheng Chien, Chia-Lun Tsai, Tien-Hao Huang
  • Patent number: 8866251
    Abstract: The present invention provides a solid-state imaging element including: a silicon layer having a photodiode formed therein and a positive charge accumulation region formed on the surface thereof; and an optical waveguide formed above the photodiode to guide incident light into the photodiode, wherein an insulating layer is formed in the optical waveguide, and the insulating layer has a dielectric constant of 5 or greater and negative fixed charge.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: October 21, 2014
    Assignee: Sony Corporation
    Inventor: Tomoyuki Hirano
  • Patent number: 8866237
    Abstract: An embedded micro-electro-mechanical system (MEMS) (100) comprising a semiconductor chip (101) embedded in an insulating board (120), the chip having a cavity (102) including a radiation sensor MEMS (105), the opening (104) of the cavity at the chip surface covered by a plate (110) transmissive to the radiation (150) sensed by the MEMS. The plate surface remote from the cavity having a bare central area, to be exposed to the radiation sensed by the MEMS in the cavity, and a peripheral area covered by a metal film (111) touching the plate surface and a layer (112) of adhesive stacked on the metal film.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: October 21, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Christopher D. Manack, Frank Stepniak, Sreenivasan K. Koduri
  • Patent number: 8866059
    Abstract: A solid-state imaging device that is configurable into a small size appropriate for expanding dynamic range includes: a photodiode which is a photoelectric conversion unit that generates charge by incident light; a MOS transistor which is connected to the photodiode and transfers the charge; a floating diffusion region which is a first accumulation unit which accumulates the charge via the MOS transistor; a MOS transistor which is a second transfer unit connected to the floating diffusion region and connected in series to the MOS transistor; and a MOS transistor which is an output unit which outputs, via the MOS transistor, a signal voltage in accordance with an amount of the charge.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: October 21, 2014
    Assignee: Panasonic Corporation
    Inventors: Takahiko Murata, Takayoshi Yamada, Yoshihisa Kato, Shigetaka Kasuga, Mitsuyoshi Mori
  • Publication number: 20140306306
    Abstract: A method for forming a photovoltaic device includes forming an absorber layer with a granular structure on a conductive layer; conformally depositing an insulating protection layer over the absorber layer to fill in between grains of the absorber layer; and planarizing the protection layer and the absorber layer. A buffer layer is formed on the absorber layer, and a top transparent conductor layer is deposited over the buffer layer.
    Type: Application
    Filed: April 12, 2013
    Publication date: October 16, 2014
    Applicant: International Business Machines Corporation
    Inventors: Talia S. Gershon, Supratik Guha, Jeehwan Kim, Mahadevaiyer Krishnan, Byungha Shin
  • Patent number: 8860164
    Abstract: A light receiving element includes a core configured to propagate a signal light, a first semiconductor layer having a first conductivity type, the first semiconductor layer being configured to receive the signal light from the core along a first direction in which the core extends, an absorbing layer configured to absorb the signal light received by the first semiconductor layer, and a second semiconductor layer having a second conductivity type opposite to the first conductivity type.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: October 14, 2014
    Assignee: Fujitsu Limited
    Inventor: Kazumasa Takabayashi
  • Patent number: 8861138
    Abstract: A plasmon generator has a front end face, a first metal layer, a second meta-field light based on a surface plasmon. The intermediate layer is interposed between the first metal layer and the second metal layer. Each of the first metal layer, the second metal layer and the intermediate layer has an end located in the front end face. Each of the first and second metal layers is formed of a metal material. The intermediate layer is formed of a material higher in Vickers hardness than the metal material used to form the first metal layer and the metal material used to form the second metal layer.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: October 14, 2014
    Assignees: Headway Technologies, Inc., SAE Magnetics (H.K.) Ltd.
    Inventors: Yoshitaka Sasaki, Hiroyuki Ito, Shigeki Tanemura, Hironori Araki, Seiichiro Tomita, Ryuji Fujii
  • Patent number: 8859391
    Abstract: A method for manufacturing a semiconductor device including: forming a wiring layer on a surface side of a first semiconductor wafer; forming a buried film so as to fill in a level difference on the wiring layer, the level difference being formed at a boundary between a peripheral region of the first semiconductor wafer and an inside region being on an inside of the peripheral region, and the level difference being formed as a result of a surface over the wiring layer in the peripheral region being formed lower than a surface over the wiring layer in the inside region, and making the surfaces over the wiring layer in the peripheral region and the inside region substantially flush with each other; and opposing and laminating the surfaces over the wiring layer formed in the first semiconductor wafer to a desired surface of a second semiconductor wafer.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: October 14, 2014
    Assignee: Sony Corporation
    Inventor: Hiroyasu Matsugai
  • Patent number: 8860861
    Abstract: A pixel is provided with a photodiode region which includes a photoelectric conversion portion for receiving light and generating electrons, and a charge storage portion for storing electric charge. The pixel is configured in such a manner that an electron exclusion region is provided in the photodiode region with the diameter of a circle having the maximum diameter among circles that can exist in the surface of a region through which electrons can pass in the photodiode region as the width of an electron passage region in the photodiode region, and the width of the electron passage region is smaller than when the electron exclusion region is not provided.
    Type: Grant
    Filed: August 7, 2009
    Date of Patent: October 14, 2014
    Assignee: Honda Motor Co., Ltd.
    Inventor: Chiaki Aoyama
  • Patent number: 8859310
    Abstract: Methods of fabricating optoelectronic devices, such as photovoltaic cells and light-emitting devices. In one embodiment, such a method includes providing a substrate, applying a monolayer of semiconductor particles to the substrate, and encasing the monolayer with one or more coatings so as to form an encased-particle layer. At some point during the method, the substrate is removed so as to expose the reverse side of the encased-particle layer and further processing is performed on the reverse side. When a device made using such a method has been completed and installed into an electrical circuit the semiconductor particles actively participate in the photoelectric effect or generation of light, depending on the type of device.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: October 14, 2014
    Assignee: Versatilis LLC
    Inventor: Ajaykumar R. Jain
  • Patent number: 8859889
    Abstract: A solar cell element is disclosed. The solar cell element comprises a semiconductor substrate, a first electrode, a second electrode, a first wiring member and a second wiring member. The semiconductor substrate with a first surface and a second surface comprises a plurality of through-holes. The first electrode comprises a plurality of conduction portions and at least one first output extracting portion. The second electrode has a resistivity of less than 2.5×10-8 ?m (ohm-meter). The first wiring member comprises a first end face in a long direction thereof. The second wiring member comprises a second end face in a long direction thereof facing the first end face.
    Type: Grant
    Filed: April 20, 2011
    Date of Patent: October 14, 2014
    Assignee: KYOCERA Corporation
    Inventor: Koutarou Umeda
  • Publication number: 20140299957
    Abstract: An image sensor pixel includes one or more photodiodes disposed in a semiconductor layer. Pixel circuitry is disposed in the semiconductor layer coupled to the one or more photodiodes. A passivation layer is disposed proximate to the semiconductor layer over the pixel circuitry and the one or more photodiodes. A contact etch stop layer is disposed over the passivation layer. One or more metal contacts are coupled to the pixel circuitry through the contact etch stop layer. One or more isolation regions are defined in the contact etch stop layer that isolate contact etch stop layer material through which the one or more metal contacts are coupled are coupled to the pixel circuitry from the one or more photodiodes.
    Type: Application
    Filed: April 8, 2013
    Publication date: October 9, 2014
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Sing-Chung Hu, Dajiang Yang, Oray Orkun Cellek, Hsin-Chih Tai, Gang Chen
  • Publication number: 20140299772
    Abstract: Nanoparticles, methods of manufacture, devices comprising the nanoparticles, methods of their manufacture, and methods of their use are provided herein. The nanoparticles and devices having photoabsorptions in the range of 1.7 ?m to 12 ?m and can be used as photoconductors, photodiodes, phototransistors, charge-coupled devices (CCD), luminescent probes, lasers, thermal imagers, night-vision systems, and/or photodetectors.
    Type: Application
    Filed: May 21, 2012
    Publication date: October 9, 2014
    Applicant: THE UNIVERSITY OF CHICAGO
    Inventors: Philippe Guyot-Sionnest, Sean E. Keuleyan, Emmanuel Lhuillier
  • Patent number: 8853809
    Abstract: An optical element 10 for transmitting light therethrough along a predetermined direction and modulating the light comprises a structure 11 having a first region R1 and a second region R2 periodically arranged with respect to the first region R1 along a plane perpendicular to the predetermined direction, the first and second regions R1, R2 having respective refractive indexes different from each other, and properties of transmitting the light therethrough.
    Type: Grant
    Filed: May 7, 2013
    Date of Patent: October 7, 2014
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Kazutoshi Nakajima, Toru Hirohata, Wataru Aka-Hori, Kazunori Tanaka, Kazuue Fujita
  • Patent number: 8853808
    Abstract: According to one embodiment, a radiation detector includes a substrate, a scintillator layer, a moisture-proof body and an adhesive layer. The substrate is partitioned into at least an active area and a bonding area. The substrate includes a photoelectric conversion element located in the active area and configured to convert fluorescence to an electrical signal, an organic resin protective layer located at an outermost layer in the active area, and an inorganic protective film located at an outermost layer of the bonding area. The scintillator layer is formed on the organic resin protective layer so as to cover the photoelectric conversion element and configured to convert radiation to the fluorescence. The moisture-proof body is formed so as to cover the scintillator layer. The adhesive layer is formed on the inorganic protective film and bonds the moisture-proof body to the substrate.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: October 7, 2014
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electron Tubes & Devices Co., Ltd.
    Inventor: Katsuhisa Homma
  • Patent number: 8853544
    Abstract: Various aspects of the present invention provide a transfer method for peeling off an MIM structure (comprising lower electrode/dielectric layer/upper electrodes) film formed on a supporting substrate and then transferring onto a transfer substrate with sufficiently uniform and low damage. Various aspects of the present invention also provide a thin film element provided with one or more thin film components which are transferred onto a substrate by using said method.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: October 7, 2014
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Ryuichi Kondou, Kenichi Ota
  • Patent number: 8853799
    Abstract: Embodiments of the present invention provide an integrated circuit system including a first active layer fabricated on a front side of a semiconductor die and a second pre-fabricated layer on a back side of the semiconductor die and having electrical components embodied therein, wherein the electrical components include at least one discrete passive component. The integrated circuit system also includes at least one electrical path coupling the first active layer and the second pre-fabricated layer.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: October 7, 2014
    Assignee: Analog Devices, Inc.
    Inventors: Alan J. O'Donnell, Santiago Iriarte, Mark J. Murphy, Colin G. Lyden, Gary Casey, Eoin Edward English
  • Publication number: 20140291704
    Abstract: An infra-red (IR) device comprising a dielectric membrane formed on a silicon substrate comprising an etched portion; and at least one patterned layer formed within or on the dielectric membrane for controlling IR emission or IR absorption of the IR device, wherein the at least one patterned layer comprises laterally spaced structures.
    Type: Application
    Filed: June 10, 2014
    Publication date: October 2, 2014
    Inventors: Syed Zeeshan ALI, Florin UDREA, Julian GARDNER, Richard Henry HOOPER, Andrea DE LUCA, Mohamed Foysol CHOWDHURY, Ilie POENARU
  • Publication number: 20140291493
    Abstract: A photomultiplier tube includes a semiconductor photocathode and a photodiode. Notably, the photodiode includes a p-doped semiconductor layer, an n-doped semiconductor layer formed on a first surface of the p-doped semiconductor layer to form a diode, and a pure boron layer formed on a second surface of the p-doped semiconductor layer. A gap between the semiconductor photocathode and the photodiode may be less than about 1 mm or less than about 500 ?m. The semiconductor photocathode may include gallium nitride, e.g. one or more p-doped gallium nitride layers. In other embodiments, the semiconductor photocathode may include silicon. This semiconductor photocathode can further include a pure boron coating on at least one surface.
    Type: Application
    Filed: March 5, 2014
    Publication date: October 2, 2014
    Applicant: KLA-Tencor Corporation
    Inventors: Yung-Ho Chuang, David L. Brown, John Fielden
  • Publication number: 20140291694
    Abstract: A nonpolar III-nitride film grown on a miscut angle of a substrate, in order to suppress the surface undulations, is provided. The surface morphology of the film is improved with a miscut angle towards an a-axis direction comprising a 0.15° or greater miscut angle towards the a-axis direction and a less than 30° miscut angle towards the a-axis direction.
    Type: Application
    Filed: June 16, 2014
    Publication date: October 2, 2014
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Asako Hirai, Zhongyuan Jia, Makoto Saito, Hisashi Yamada, Kenji Iso, Steven P. DenBaars, Shuji Nakamura, James S. Speck
  • Publication number: 20140291644
    Abstract: An exemplary printable composition of a liquid or gel suspension of diodes comprises a plurality of diodes, a first solvent and/or a viscosity modifier. An exemplary diode comprises: a light emitting or absorbing region having a diameter between about 20 and 30 microns and a height between 2.5 to 7 microns; a plurality of first terminals spaced apart and coupled to the light emitting region peripherally on a first side, each first terminal of the plurality of first terminals having a height between about 0.5 to 2 microns; and one second terminal coupled centrally to a mesa region of the light emitting region on the first side, the second terminal having a height between 1 to 8 microns.
    Type: Application
    Filed: March 24, 2014
    Publication date: October 2, 2014
    Applicant: NthDegree Technologies Worldwide Inc.
    Inventors: Mark David Lowenthal, William Johnstone Ray, Neil O. Shotton, Richard A. Blanchard, Brad Oraw
  • Publication number: 20140291481
    Abstract: A photon detection device includes a photodiode having a planar junction disposed in a first region of semiconductor material. A deep trench isolation (DTI) structure is disposed in the semiconductor material. The DTI structure isolates the first region of the semiconductor material on one side of the DTI structure from a second region of the semiconductor material on an other side of the DTI structure. The DTI structure includes a dielectric layer lining an inside surface of the DTI structure and doped semiconductor material disposed over the dielectric layer inside the DTI structure. The doped semiconductor material disposed inside the DTI structure is coupled to a bias voltage to isolate the photodiode in the first region of the semiconductor material from the second region of the semiconductor material.
    Type: Application
    Filed: April 1, 2013
    Publication date: October 2, 2014
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Bowei Zhang, Zhiqiang Lin
  • Patent number: 8847345
    Abstract: An optical element includes a plurality of optical filters having different characteristics. The element includes a first optical filter including a first metal-structure group including first metal structures periodically arranged in an in-plane direction of a substrate surface and a second optical filter including a second metal-structure group including second metal structures periodically arranged in the in-plane direction, the second metal-structure group exhibiting a plasmon resonance condition different from that of the first metal-structure group. The optical distance between the first metal structures adjacent to each other is in a range of 0.75 to 1.25 times the optical distance between the second metal structures adjacent to each other.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: September 30, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yoichiro Handa
  • Patent number: 8847240
    Abstract: An optoelectronic device is provided including an element that forms a dipole moment between an active layer and a charge transport layer. The optoelectronic device may include an active layer between a first electrode and a second electrode, a first charge transport layer between the first electrode and the active layer, and a dipole layer between the active layer and the first charge transport layer. A second charge transport layer may be further provided between the second electrode and the active layer. The second dipole layer may be further provided between the second charge transport layer and the active layer.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: September 30, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-young Chung, Kyung-sang Cho, Tae-ho Kim, Byoung-lyong Choi
  • Publication number: 20140284744
    Abstract: A semiconductor device includes a first substrate having an attaching surface on which first electrodes and a first insulating film are exposed, an insulating thin film that covers the attaching surface of the first substrate, and a second substrate which has an attaching surface on which second electrodes and a second insulating film are exposed and is attached to the first substrate in a state in which the attaching surface of the second substrate and the attaching surface of the first substrate are attached together sandwiching the insulating thin film therebetween, and the first electrodes and the second electrodes deform and break a part of the insulating thin film so as to be directly electrically connected to each other.
    Type: Application
    Filed: March 12, 2014
    Publication date: September 25, 2014
    Applicant: Sony Corporation
    Inventors: Nobutoshi Fujii, Yoshiya Hagimoto, Kenichi Aoyagi, Yoshihisa Kagawa
  • Patent number: 8841160
    Abstract: Disclosed are methods for producing chalcopyrite compound (e.g., copper indium selenide (CIS), copper indium gallium selenide (CIGS), copper indium sulfide (CIS) or copper indium gallium sulfide (CIGS)) thin films. The methods are based on solution processes, such as printing, particularly, multi-stage coating of pastes or inks of precursors having different physical properties. Chalcopyrite compound thin films produced by the methods can be used as light-absorbing layers for thin-film solar cells. The use of the chalcopyrite compound thin films enables the fabrication of thin-film solar cells with improved efficiency at low costs.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: September 23, 2014
    Assignee: Korea Institute of Science and Technology
    Inventors: Byoung Koun Min, Hee Sang An, Yun Jeong Hwang
  • Publication number: 20140264697
    Abstract: An image pickup module includes: a wiring board including a first main surface on which chip electrodes are disposed and a second main surface on which the cable electrodes connected respectively to the chip electrodes via respective through wirings are disposed; an image pickup device chip including external electrodes bonded respectively to the chip electrodes; and a cable including conductive wires bonded respectively to the cable electrodes, in which all of the cable electrodes are disposed in a region not facing a region where the chip electrodes are disposed.
    Type: Application
    Filed: May 30, 2014
    Publication date: September 18, 2014
    Applicant: OLYMPUS CORPORATION
    Inventor: Takashi NAKAYAMA
  • Publication number: 20140264681
    Abstract: A photoconductive switch semiconductor device including a semiconductor substrate including a region functioning as a photoconductive switch; and a metallization layer disposed on the surface of the semiconductor substrate including a first component including a first terminal, and an inwardly spiraling first middle portion, and a first end portion, and a second component including a second terminal, and an inwardly spiraling second middle portion, and a second end portion, wherein the first component and the second component are electrically isolated.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Inventor: Joseph R. Demers
  • Publication number: 20140264683
    Abstract: The present disclosure provides an embodiment of a method for fabricating a three dimensional (3D) image sensor structure. The method includes providing to an image sensor substrate having image sensors formed therein and a first interconnect structure formed thereon, and a logic substrate having a logic circuit formed therein and a first interconnect structure formed thereon; bonding the logic substrate to the image sensor substrate in a configuration that the first and second interconnect structures are sandwiched between the logic substrate and the image sensor substrate; and forming a conductive feature extending from the logic substrate to the first interconnect structure, thereby electrically coupling the logic circuit to the image sensors.
    Type: Application
    Filed: December 30, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Chun-Chieh Chuang, Feng-Chi Hung, Shu-Ting Tsai, Jeng-Shyan Lin, Shuang-Ji Tsai, Wen-I Hsu