Printed Circuit Board Patents (Class 361/748)
  • Publication number: 20120146463
    Abstract: A printed circuit is produced with a base circuit and a number of optional circuit elements. One or more of the optional circuit elements may be added to the base circuit to determine or change the characteristics of the base circuit. Alternatively, one or more of the optional circuit elements may be removed from the base circuit to determine or change the characteristics of the base circuit. The base circuit and optional circuit elements may be printed on a single substrate. Mechanisms may be provided to facilitate the separation of the optional elements form the substrate either to introduce them into the base circuit or remove them from the base circuit to change the characteristics of the base circuit. A simple, low-cost, robust, and easy to use base circuit and optional circuit element is provided.
    Type: Application
    Filed: December 8, 2010
    Publication date: June 14, 2012
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Tse Nga Ng, Jurgen H. Daniel, Ana Claudia Arias, Brent Krusor
  • Publication number: 20120149255
    Abstract: A cable assembly (100) includes a cover (40) defining a cavity (101), a circuit board (20) assembled in the cavity and including a first surface (201) and a second surface (202) lower than the first surface, and a cable (2) having a jacket (22) and a number of wires (21) shrouded by the jacket. Each wire includes an inner coat (210) and a conductor having a free end (211) exposed outwardly from the inner coat for being soldered to the first surface, with the inner coat disposed on the second surface.
    Type: Application
    Filed: December 8, 2011
    Publication date: June 14, 2012
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: CHIEN-CHIUNG WANG, XUE-LIANG ZHANG, QING-MAN ZHU, JIAN-JUN ZHU
  • Patent number: 8200861
    Abstract: A dongle for connecting a disk drive assembly to the backplane of a storage enclosure is disclosed. The dongle includes: a housing having a disk drive connector portion having a plurality of contact pins for connecting to a disk drive assembly and having a PCB holding portion having walls that define a recess; and, a PCB located within the recess, the PCB having a plurality of contact fingers on at least one surface at an edge of the PCB to form a backplane connector for connecting to the backplane. At least some of the disk drive connector contact pins are in electrical connection with at least some of the contact fingers of the backplane connector.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: June 12, 2012
    Assignee: Xyratex Technology Limited
    Inventors: David M. Davis, Christopher J. Nother
  • Patent number: 8199514
    Abstract: An electrical device storage unit includes a separation wall having a convex portion and a concave portion; a control unit having a printed circuit board whose front surface and back surface are mounted with an electronic component; an adhesive for joining the convex portion and the printed circuit board; and an electrical device that is electrically connected with the control unit by a conductor and arranged opposite the control unit with the separation wall disposed therebetween, wherein the conductor is provided passing through the separation wall and the printed circuit board, and an end of the conductor is soldered to the printed circuit board.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: June 12, 2012
    Assignee: Aisin AW Co., Ltd.
    Inventor: Yoshinobu Ito
  • Publication number: 20120140423
    Abstract: Electrical components such as integrated circuits may be mounted on a printed circuit board. To prevent the electrical components from being subjected to electromagnetic interference, radio-frequency shielding structures may be formed over the components. The radio-frequency shielding structures may be formed from a layer of metallic paint. Components may be covered by a layer of dielectric. Channels may be formed in the dielectric between blocks of circuitry. The metallic paint may be used to coat the surfaces of the dielectric and to fill the channels. Openings may be formed in the surface of the metallic paint to separate radio-frequency shields from each other. Conductive traces on the surface of the printed circuit board may be used in connecting the metallic paint layer to internal printed circuit board traces.
    Type: Application
    Filed: December 1, 2010
    Publication date: June 7, 2012
    Inventors: Joseph Fisher, JR., Sean Mayo, Dennis R. Pyper, Paul Nangeroni, Jose Mantovani
  • Patent number: 8193457
    Abstract: A stack structure of a circuit board includes a first substrate, a second substrate and a fixing element. The first substrate has a first component area, a plurality of supporting solder elements, and a plurality of signal solder elements, wherein the plurality of signal elements is disposed in the first component area. The first substrate stacks on the second substrate. The plurality of supporting solder elements is disposed between the first and the second substrates for providing a supporting force. The fixing element secures the first substrate and the second substrate, and the supporting solder elements are disposed around the fixing element.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: June 5, 2012
    Assignee: Compal Electronics, Inc.
    Inventor: Hsin-Hung Shen
  • Patent number: 8192090
    Abstract: A backplane and card assembly comprises: a backplane having optical and electrical connectors; a plurality of cards each comprising an optical receiver and electrical connectors, for fitting into the backplane to obtain operational optical and electrical connections via the backplane; and an automatic maintenance unit comprising a gripping arm configured to remove and replace cards from the backplane. Having both the optical and electrical connectors together on the backplane allows a relatively simple movement of the gripping arm to remove and replace the card.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: June 5, 2012
    Inventor: Eli Benoliel
  • Publication number: 20120134119
    Abstract: A chip card holding mechanism includes a support bracket defining a receiving chamber and an opening communicating with the receiving chamber; a resilient member fixed to the support bracket at an end of the support bracket opposite to the opening, and partial received in the receiving chamber; a latching assembly rotatably fixed to the support bracket and further comprising a pair of latching portions; and a tray slidably assembled to the support bracket, in which the tray comprises an accommodating space defined thereon to receive a chip card, and a pair of opposite sidewalls adjacent to the accommodating space, each sidewall defining a latching groove according to the corresponding latching portion; and the tray is received in the receiving chamber by having the latching portions of the latching assembly engaged in the latching grooves and resisting against the resilient member. An electronic device using the same is also provided.
    Type: Application
    Filed: June 24, 2011
    Publication date: May 31, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., FU TAI HUA INDUSTRY (SHENZHEN) CO., LTD.
    Inventor: ZI-MING TANG
  • Publication number: 20120134120
    Abstract: To broaden a substantial area for wiring between a display portion and a driver element, and to increase the number of wirings between the driver element and the display portion. In a driving IC 100, bumps 10, 12, 14, 16, 18, 22, 24, 26 and 28 are arrayed in a first row 110 and bumps 11, 13, 15, 17, 21, 23, 25, 27 are arrayed in a second row 120, wherein the respective bumps are disposed so that the shortest distances between forward ends of the respective bumps and a side along the array, become larger gradually from the center outward in the array.
    Type: Application
    Filed: November 22, 2011
    Publication date: May 31, 2012
    Applicant: OPTREX Corporation
    Inventor: Kenji GONDO
  • Publication number: 20120134121
    Abstract: An electronic device includes: a vibrator disposed within a cavity on a substrate and electrically driven; an enclosure wall which has electric conductivity and sections the cavity from an insulation layer surrounding the circumference of the cavity; a first wiring and a second wiring which connect with the vibrator and penetrate the enclosure wall; and a liquid flow preventing portion disposed at the position where the first wiring and the second wiring penetrate the enclosure wall to prevent flow of etchant dissolving the insulation layer from the cavity toward the insulation layer and insulate the first wiring and the second wiring from the enclosure wall.
    Type: Application
    Filed: November 29, 2011
    Publication date: May 31, 2012
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Yoko KANEMOTO, Ryuji KIHARA
  • Publication number: 20120134118
    Abstract: A feed circuit for connecting adjacent components includes: a printed circuit board having a first portion and an axis of symmetry extending along a longitudinal direction of the first portion, second portions extending in substantially opposite directions from one end of the first portion, and third portions extending in substantially opposite directions from another end of the first portion; at least two circuits electrically connecting respective ones of the second portions with corresponding ones of the third portions; and connection areas at each of the second portions configured to be connected to one of the adjacent components, and at each of the third portions configured to be connected to another one of the adjacent components.
    Type: Application
    Filed: November 29, 2010
    Publication date: May 31, 2012
    Inventor: Ryan WERNICKE
  • Patent number: 8189341
    Abstract: A display apparatus including a circuit board and a surface grounded portion which is disposed on an end portion of the circuit board and formed of a conductive layer. The display apparatus may include a signal receiver mounted on the circuit board, the signal receiver receiving a signal. The display apparatus may include a signal processor mounted on the circuit board, the signal processor processing signals received by the signal receiver.
    Type: Grant
    Filed: April 2, 2008
    Date of Patent: May 29, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Ju-yong Kim
  • Patent number: 8189328
    Abstract: In one embodiment of the invention, a flash memory dual inline memory module (FMDIMM) is disclosed. The FMDIMM includes a printed circuit board (PCB) with an edge connector; a first plurality of multi-chip packaged flash memory/support application specific integrated circuit (ASIC) parts mounted to the printed circuit board and electrically coupled to the edge connector; and a first address device mounted to the PCB and electrically coupled to the edge connector and the first plurality of multi-chip packaged flash memory/support ASIC parts. Each of the first plurality of multi-chip packaged flash memory/support ASIC parts includes one or more randomly accessible flash memory die to periodically store data in a non-volatile manner.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: May 29, 2012
    Assignee: Virident Systems, Inc.
    Inventors: Ruban Kanapathippillai, Kenneth Alan Okin
  • Publication number: 20120127676
    Abstract: In order that even the cell connectors (17) of, for instance, a traction rechargeable battery (11) which carry very high currents can be connected to a battery management system (21) in a fault-resistant and functionally reliable manner, firstly a circuit board (24) in the form of a leadframe (25) encapsulated with plastic by injection molding is latched onto the housing (13) mechanically grouping the cells (12), said circuit board in any case not projecting higher than the adjacent end faces (15) of the cell terminal connections (14) projecting at a clear radial distance therefrom.
    Type: Application
    Filed: July 7, 2010
    Publication date: May 24, 2012
    Applicant: Zehdenick Innovative Metall- und Kunststofftechnik GmbH
    Inventors: Frank Warmuth, Thomas SCHmiedel, Andre Schmidt, Ronny Warsinke
  • Publication number: 20120127675
    Abstract: An address signal line having a stub structure connects between at least three memory elements and a data transferring element and transmits address signals for the memory elements. An address terminal of the data transferring element has an impedance lower than a characteristic impedance of the address signal line. A wiring length TL0 from the data transferring element to a first branch point S1 where a branch line is branched at a shortest distance from the data transferring element is configured to become equal to or greater than a wiring length TL1 from the first branch point S1 to a second branch point S2 where a second branch line is branched. A wiring length TL3 from the second branch point S2 to a third branch point S3 where a third branch line is branched is configured to become greater than the wiring lengths TL0 and TL1.
    Type: Application
    Filed: February 1, 2012
    Publication date: May 24, 2012
    Applicant: ELPIDA MEMORY, INC.
    Inventors: ATSUSHI HIRAISHI, TOSHIO SUGANO, MASAHIRO YAMAGUCHI, YOJI NISHIO, TSUTOMU HARA, KOICHIRO AOKI
  • Publication number: 20120120616
    Abstract: A wiring board is provided which can prevent a metal electrode from corroding due to a defect in a transparent conductive electrode covering an end face of an organic insulating film. An active-matrix substrate includes: a glass substrate; a metal wire provided on the glass substrate; a gate insulating film covering the metal wire; an interlayer insulating film covering the gate insulating film; and a transparent electrode formed on the interlayer insulating film. The scanning wire provided with a terminal area where the transparent electrode is laminated directly on the scanning wire. The transparent electrode extends over the terminal area in such a way as to cover an end face of the interlayer insulating film that faces the terminal area and an end face of the gate insulating film that faces the terminal area.
    Type: Application
    Filed: May 18, 2010
    Publication date: May 17, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Hiromitsu Katsui, Kenichi Kitoh, Wataru Nakamura
  • Publication number: 20120120617
    Abstract: Provided is a feed line structure that enables suppression of noise entering a primary power supply from an electronic circuit without using a circuit component such as a choke coil and a capacitor and also without increasing an occupied area on the circuit board, so that an EMI countermeasure is achieved. The feed line structure includes a feed line composed by pairing a power supply wire 41 and a reference potential wire 42 in an insulator 40, and is characterized in that a wire 43 in a floating state in potential is provided.
    Type: Application
    Filed: June 17, 2010
    Publication date: May 17, 2012
    Applicant: NEC CORPORATION
    Inventor: Kazuhiro Kashiwakura
  • Publication number: 20120120615
    Abstract: Various circuit boards and methods of manufacturing the same are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first interconnect layer of a circuit board. The first interconnect layer includes a first conductor trace with a first segment that does not include a via land. A first via is formed on the first segment.
    Type: Application
    Filed: January 23, 2012
    Publication date: May 17, 2012
    Inventors: Andrew KW Leung, Neil McLellan, Yip Seng Low
  • Publication number: 20120120614
    Abstract: There is provided a wiring board including a multilayer substrate and a reinforcing member. The multilayer substrate has a first main substrate surface formed with a chip mounting area to which an electronic chip is mounted and a second main substrate surface opposed to the first main substrate surface. The reinforcing member is fixed to either an area of the first main substrate surface other than the chip mounting area or the second main substrate surface and has a body predominantly formed of ceramic material and incorporating therein at least one capacitor.
    Type: Application
    Filed: November 11, 2011
    Publication date: May 17, 2012
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventor: Seigo UENO
  • Patent number: 8179682
    Abstract: A multilayer circuit board having a security cell having security-related electronic components disposed thereon. The security cell is covered by a circuit path arrangement having circuit path segments disposed close to one another, and by an insulation layer. Penetration and thus manipulation of the security-related components is thus largely prevented.
    Type: Grant
    Filed: September 16, 2008
    Date of Patent: May 15, 2012
    Assignee: Continental Automotive GmbH
    Inventors: Dieter Cremer, Reinfried Grimmel
  • Patent number: 8179691
    Abstract: A wired circuit board includes a first insulating layer; a first wire formed on the first insulating layer; a second insulating layer formed on the first insulating layer so as to cover the first wire; and a second wire formed on the second insulating layer so as to be arranged in opposed relation to the first wire in a thickness direction. The thickness of the first wire is 1 ?m or less and is ? or less of the thickness of the second insulating layer.
    Type: Grant
    Filed: January 6, 2009
    Date of Patent: May 15, 2012
    Assignee: NITTO DENKO Corporation
    Inventors: Takahiko Yokai, Tetsuya Ohsawa, Yasunari Ooyabu
  • Patent number: 8179690
    Abstract: A cut-edge positioning type soldering structure and a method for preventing a pin deviation can prevent a plurality of pins of an electronic component from being deviated when the pins are soldered onto a printed circuit board by a solder, and each of at least two solder pads includes at least two cut edges, and the solder pads are installed in an alignment direction on the printed circuit board, such that the cut-edge positioning type soldering structure and the method for preventing a pin deviation can improve the efficiency of manufacturing processes and reduce the manufacturing cost.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: May 15, 2012
    Assignee: Askey Computer Corp.
    Inventors: Hsiang-Chih Ni, Ching-Feng Hsieh
  • Publication number: 20120113602
    Abstract: A electrical connector assembly includes a mother board (3) having a number of circuit traces (31), an electrical connector (2) and a number of filter modules mounted on the mother board and situated away from the electrical connector. The electrical connector includes an insulative housing (20) and a number of contact terminals (30) assembled to the insulative housing and being mounted to the mother board along a first direction. The contact terminals are connected to the filter modules via the number of circuit traces of the mother board.
    Type: Application
    Filed: November 7, 2011
    Publication date: May 10, 2012
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Jie ZHANG, Jian-She HU
  • Publication number: 20120106053
    Abstract: A cable clamp mounted to a circuit board to bind cables, the cable clamp includes a clamp member to clamp the cables, and a fixable member extending from the clamp member to be fixed to the circuit board.
    Type: Application
    Filed: November 19, 2010
    Publication date: May 3, 2012
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: ZHENG-HENG SUN
  • Publication number: 20120106097
    Abstract: A motherboard includes a power circuit, a system power supply, and a central processor unit (CPU). The power circuit includes a direct current (DC) voltage input terminal. A first control circuit receives a direct current (DC) voltage through the DC voltage input terminal and outputs a first control signal. A second control circuit receives the first control signal and outputs a second control signal to the CPU and output a third control signal. A switching circuit includes a number of switches. The second control signal controls the corresponding switches to be on or off. A voltage converting circuit receives the third control signal and converts the DC voltage from the DC voltage input terminal, and outputs the converted DC voltage to the system power supply. The CPU receives the second control signal and controls the motherboard operation.
    Type: Application
    Filed: November 24, 2010
    Publication date: May 3, 2012
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: MING-CHIH HSIEH
  • Publication number: 20120106099
    Abstract: A packaging board is described having a structure that can positively prevent same kind electrical components having different specifications from being erroneously mounted on a printed board and that can quickly confirm a regular packaging position for each of the same kind of electrical components. The packing board includes at least two electrical components having a same kind and different specifications from each other can be provided with component side identifying marks that can discriminate between the electrical components. A printed board can be provided with mounting areas for the same kind of electrical components with board side identifying marks that correspond to the component side identifying marks.
    Type: Application
    Filed: October 26, 2011
    Publication date: May 3, 2012
    Applicant: SUMITOMO WIRING SYSTEMS, LTD.
    Inventor: Yukinori KITA
  • Publication number: 20120106096
    Abstract: A connector for electrical and mechanical interconnection of first and second mechanically adjacent modules with one another. The first module includes a first electrical connector and an alignment pin and the second module includes a printed circuit board floatingly and displacably mounted on the second module with at least one alignment hole aligned for alignment with the alignment pin of the first module and a second electrical connector aligned for engagement with a corresponding first electrical connector of the first module. During assembly, the alignment pin of the first module engages the alignment hole of the second module and displaces the printed circuit board to align the second electrical connector with the first electrical connector.
    Type: Application
    Filed: October 29, 2010
    Publication date: May 3, 2012
    Applicant: ZF FRIEDRICHSHAFEN AG
    Inventors: Thomas SCHOBER, Werner BECK, Thomas DEICHLER
  • Publication number: 20120106100
    Abstract: According to one embodiment, an input-output (I-O) panel is transformed. The I-O panel is configured to couple to an array of first midplane connectors of a first shelf configured according to a first format, where the first shelf has rear access. The I-O panel comprises an array of I-O panel connectors and defines an xy-plane. An array of second midplane connectors of a second shelf is transformed to substantially align the second midplane connectors with the I-O panel connectors. The second shelf is configured according to a second format, where the second shelf has front access. The array of second midplane connectors is arranged in columns defining a midplane column axis and rows defining a midplane row axis.
    Type: Application
    Filed: January 10, 2012
    Publication date: May 3, 2012
    Applicant: Fujitsu Limited
    Inventor: Stephen J. Brolin
  • Publication number: 20120106098
    Abstract: In a flat panel display apparatus having improved sealing and a method of manufacturing the same, the flat panel display apparatus comprises: a substrate; a display unit disposed on the substrate; a sealing substrate facing the display unit; a sealing member interposed between the substrate and the sealing substrate and surrounding the display unit; and a plurality of wiring groups comprising areas overlapping the sealing member between the substrate and the sealing substrate; wherein the wiring groups are disposed so as to surround the display unit, are spaced apart from an area corresponding to an edge of the display unit, and receive voltage from an external power source.
    Type: Application
    Filed: September 19, 2011
    Publication date: May 3, 2012
    Applicants: ENSIL TECH CO., LTD., SAMSUNG MOBILE DISPLAY CO., LTD.
    Inventors: Oh-Seob Kwon, Dong-Seop Park, Sung-Soo Koh, Jung-Jun Im, Byung-Uk Han, Jae-Sang Ro, Won-Eui Hong, Seog-Young Lee
  • Patent number: 8169767
    Abstract: Novel boron nitride agglomerated powders are provided having controlled density and fracture strength features. In addition methods for producing same are provided. One method calls for providing a feedstock powder including boron nitride agglomerates, and heat treating the feedstock powder to form a heat treated boron nitride agglomerated powder. In one embodiment the feedstock powder has a controlled crystal size. In another, the feedstock powder is derived from a bulk source. Devices, such as microelectronic devices and printed circuit boards, which include boron nitride agglomerates with controlled fracture strength features are also disclosed.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: May 1, 2012
    Assignee: Saint-Gobain Ceramics & Plastics, Inc.
    Inventors: Eugene A. Pruss, Thomas M. Clere
  • Patent number: 8169786
    Abstract: There is provided a housing for a rugged handheld device, which includes: a main housing including: a main circuit board space sealed from an exterior environment, for supporting a main circuit board; and a compartment space for supporting a removable compartment for holding a device component for operation of the handheld device, such as a docking connector board, a display assembly, a keyboard assembly, where the compartment space is sealed from the external environment by a removable compartment cover for sealing the compartment space from the exterior environment, independently from the sealing of the main circuit board space and/or the device component placed into the compartment space.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: May 1, 2012
    Assignee: Psion Teklogix Inc.
    Inventor: Alan Mangaroo
  • Patent number: 8166446
    Abstract: A system for testing an electronic circuit board (ECB) having a plurality of test points in a pre-defined arrangement on a measurement device having a plurality of resources includes an interface fixture having a plurality of contact pads arranged in an array on a first surface. The contact pads can be electrically coupled to the plurality of resources of the measurement system according to a pre-defined pattern, where at least two of the contact pads are electrically coupled to one of the plurality of resources in a many-to-one relationship. The system also includes a test fixture removably attached to the first surface of the interface fixture. The test fixture includes an upper probe plate having a plurality of openings and a lower probe plate parallel to the upper probe plate. The lower probe plate includes a plurality of openings associated with the openings in the upper probe plate.
    Type: Grant
    Filed: July 15, 2008
    Date of Patent: April 24, 2012
    Assignee: Jabil Circuit, Inc.
    Inventors: Mark A. Dickson, Edward J. Collins, Robert Gregory Jukna
  • Publication number: 20120092836
    Abstract: A suspension board with circuit includes a metal supporting board, a first insulating layer laminated on a top surface of the metal supporting board, a second insulating layer laminated on a back surface of the metal supporting board, a first conductive pattern laminated on the surface of the first insulating layer and including a first terminal connected to the magnetic head, and a second conductive pattern laminated on the surface of the second insulating layer and including a second terminal. In a slider mounting region, the slider is mounted on the surface and an electronic element mounting space is formed. Respective end edges of the first and second insulating layers are spaced apart from and located at positions inwardly protruded in the electronic element mounting space from an end edge of the metal supporting board, and the second terminal is disposed to face the electronic element mounting space.
    Type: Application
    Filed: October 7, 2011
    Publication date: April 19, 2012
    Applicant: Nitto Denko Corporation
    Inventor: Tetsuya Ohsawa
  • Publication number: 20120086660
    Abstract: Electronic displays and metal micropatterned substrates are described comprising a graphic defined by a contrasting area adjacent the graphic. In one embodiment, the graphic is visible when the display is viewed with reflected light and the graphic is substantially less visible or invisible when viewed with backlighting transmitted through the metal micropatterned substrate. The graphic and contrasting area have a total metal micropattern density that differs by no greater than about 5% and more preferably by no greater than 2%.
    Type: Application
    Filed: June 18, 2010
    Publication date: April 12, 2012
    Inventors: Cristin E. Moran, Matthew H. Frey
  • Patent number: 8154876
    Abstract: A circuit board module includes: a board having a mounting surface; an electronic component mounted on the mounting surface; a frame which is mounted on the mounting surface so as to surround the electronic component; a resin portion which is provided inside the frame and closely contacts the electronic component, the mounting surface, and the frame; and a lid portion which covers the electronic component, and which is connected to the frame. The lid portion includes a flat portion which is provided at a region containing an area corresponding to the electronic component not covered with the resin portion and which protrudes outward more than the other regions.
    Type: Grant
    Filed: October 16, 2008
    Date of Patent: April 10, 2012
    Assignee: Panasonic Corporation
    Inventor: Shotaro Nagaike
  • Patent number: 8153903
    Abstract: In a circuit board disposed in parallel to a fixing plane, a guard spacer (abutting member) is disposed on a multi-layer printed circuit board on the side of the fixing plane to suppress deformation of the multi-layer printed circuit board to prevent short circuit if an impact is applied to the circuit board. The guard spacer may be a dummy electronic component or a plate member. An image display using the circuit board is also disclosed.
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: April 10, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Akihiko Kanouda, Ryuji Kurihara, Fusao Sakuramori, Takeshi Mochizuki, Yoshihiko Sugawara, Masami Joraku
  • Publication number: 20120081862
    Abstract: A structure for fixing circuit board, adapted for fixing a circuitboard at the rear of a cage, is disclosed, which comprises: a circuitboard; and a clamp, configured with a clipping part, a fixing part and an elastic part; wherein, the clipping part is coupled to the fixing part while the fixing part is coupled to the elastic part; the clipping part has a first hook formed at a surface facing toward the fixing part; the elastic part has a second hook formed extruding out form a surface facing away from the fixing part; the clipping part and the fixing part are arranged straddling across the top edge of the circuitboard while enabling the first hook to couple to a fastener of the circuitboard; and the elastic part is arranged facing toward the cage while enabling the second hook to secure to the bottom of the cage.
    Type: Application
    Filed: January 19, 2011
    Publication date: April 5, 2012
    Applicant: INVENTEC CORPORATION
    Inventor: LINGER LIN
  • Publication number: 20120075808
    Abstract: An electronic package structure is provided. The electronic package structure comprises a substrate, a first electronic element, and a second electronic element. The substrate includes a heat-dissipating plate and a circuit board disposed on the heat-dissipating plate. The first electronic element is disposed on the heat-dissipating plate and coupled to the circuit board. The second electronic element is disposed on the circuit board and coupled to the circuit board.
    Type: Application
    Filed: August 10, 2011
    Publication date: March 29, 2012
    Inventors: Han-Hsiang LEE, Yi-Cheng Lin, Pei-Chun Hung, Bau-Ru Lu, Da-Jung Chen, Jeng-Jen Li
  • Publication number: 20120075814
    Abstract: The present invention can relate to an electronic device having one or more support tabs that protect a circuit board disposed inside the device from externally applied compressive forces. In particular, when a force is applied to a housing of the device, the support tabs can buttress the housing of the device, either directly or through other intervening components disposed within the device, to reduce the likelihood that the housing or intervening components will contact and damage the circuit board. The present invention also can relate to methods for manufacturing such an electronic device.
    Type: Application
    Filed: September 28, 2011
    Publication date: March 29, 2012
    Applicant: APPLE INC.
    Inventors: Douglas Joseph Weber, Pinida Jan Moolsintong, Stephen Brian Lynch
  • Patent number: 8144300
    Abstract: A printed circuit board on which a connector is mounted includes a conductive layer, insulating layers, and a supporting member. A part of the conductive layer is exposed on a top surface of the PCB in order to form a connecting pad portion for connecting the connector. The insulating layers are disposed proximate to both sides of the conductive layer. The supporting member is connected to the conductive layer and covers a surface of a hole formed by opening an orifice through the conductive layer and the insulating layer. The hole is disposed adjacent to the connecting pad portion.
    Type: Grant
    Filed: August 25, 2008
    Date of Patent: March 27, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-Soo Kim, Jin-Ho Park
  • Patent number: 8144473
    Abstract: An electro-optical apparatus comprising an electro-optical panel including a display section, a flexible printed circuit board, and a rigid circuit board. The flexible printed circuit board includes a first terminal connected to the electro-optical panel and a second terminal connected to an external circuit. The rigid circuit board includes a first surface on which electronic components are mounted and a second surface mounted to the flexible printed circuit board. The second surface of the rigid circuit board is opposite to the first surface. An entirety of the rigid circuit board is stacked on the flexible printed circuit board within the flexible printed circuit board. The rigid circuit board is electrically connected to the flexible printed circuit board. The flexible printed circuit board is bent toward the external circuit.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: March 27, 2012
    Assignee: Seiko Epson Corporation
    Inventors: Masanori Yumoto, Yoshihisa Hirano, Chiaki Imaeda
  • Publication number: 20120069531
    Abstract: A conducting paste and method of forming the paste for device level interconnection. The conducting paste contains metal loading in the range 80-95% that is useful for making five micron device level interconnects. The conducting paste is made by mixing two different conducting pastes, each paste maintaining its micro level individual rich region in the mixed paste even after final curing. One paste contains at least one low melting point alloy and the other paste contains noble metal fillers such as gold or silver flakes. In general, average flake size below five micron is suitable for five micron interconnects. However, 1 micron or smaller silver flakes and an LMP mixture is preferred for five micron interconnects. The amount of LMP based paste in the final mixture is preferably 20-50% by weight. The nano micro paste embodiment shows good electrical yield (81%) and low contact resistance.
    Type: Application
    Filed: September 17, 2010
    Publication date: March 22, 2012
    Applicant: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
    Inventors: Rabindra N. Das, Roy H. Magnuson, Mark D. Poliks, Voya R. Markovich
  • Publication number: 20120063101
    Abstract: A display assembly includes a transparent cover piece, a display shroud having a contact structure arranged to face the transparent cover piece, an interface subassembly mounted on the display shroud, an electronics board shroud having a support member and a connection feature, and a biasing member operably engaged between the display shroud and the electronics board shroud. The connection feature mechanically connects the electronics board shroud to the display shroud while permitting axial displacement and rotation therebetween. The biasing member rests on the support member of the electronics board shroud, and the biasing member is configured to urge the contact structure of the display shroud into physical contact with the transparent cover piece. The interface subassembly includes a display circuit for providing a digital display and a touch circuit for providing touch actuation at or near the digital display through the transparent cover piece.
    Type: Application
    Filed: September 14, 2010
    Publication date: March 15, 2012
    Applicant: Rosemount Inc.
    Inventors: Daniel Ronald Schwartz, Steven John McCoy, Jason Harold Rud
  • Patent number: 8134084
    Abstract: The present invention relates to a wiring member including: a copper foil layer having a smooth surface with a surface roughness Rz of 2 ?m or less; a noise suppressing layer containing a metallic material or a conductive ceramic and having a thickness of 5 to 200 nm; and an insulating resin layer provided between the smooth surface of the copper foil layer and the noise suppressing layer, and also relates to a printed wiring board equipped with the wiring member.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: March 13, 2012
    Assignee: Shin-Etsu Polymer Co., Ltd.
    Inventors: Toshiyuki Kawaguchi, Kazutoki Tahara, Tsutomu Saga, Mitsuaki Negishi
  • Publication number: 20120058650
    Abstract: Example embodiments relate to semiconductor modules and semiconductor devices including the same. The semiconductor module may include a board, a plurality of semiconductor chips, a plurality of first taps, and a plurality of second taps. The board may include a chip region, a first tap region, and a second tap region. The first tap region of the board may have a first width that extends in a thickness direction of the board. The second tap region may have a second width that is less than the first width. The second tap region may be disposed under the first tap region. The semiconductor chips may be mounted in the chip region of the board. The first taps may be disposed in the first tap region, and the second taps may be disposed in the second tap region. The first and second taps may be configured to transmit/receive an electric signal to/from the plurality of semiconductor chips.
    Type: Application
    Filed: August 3, 2011
    Publication date: March 8, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Su-Hyun Cha, Junghoon Kim, Seongchan Han
  • Publication number: 20120057310
    Abstract: According to one embodiment, an electronic apparatus includes a housing, a module in the housing, and an electrical interconnection. The housing includes a first portion, a second portion including a step between the first portion and the second potion, and a slope between the first portion and the second portion. The electrical interconnection extends from the first portion to the second portion via the slope and is electrically connected to the module.
    Type: Application
    Filed: June 3, 2011
    Publication date: March 8, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ichioh Murakami, Shuya Takahashi
  • Publication number: 20120057313
    Abstract: Methods and arrangements for packaging system level electronics are described. In one aspect, an external skin of the package is formed from isolation paper. In some embodiments, the isolation paper is formed into a box. A printed circuit board is placed within the isolation paper skin and is substantially completely surrounded by a potting material that substantially completely fills the skin. The potting material is cured to solidify the potting material within the isolation paper box and to adhere the potting material to the isolation paper such that the isolation paper forms a skin for a brick of potting material that encapsulates the printed circuit board. The isolation paper skin includes at least one opening that permits an interconnect to be exposed through the skin. With this arrangement, a packaged electronics device is provided and the isolation paper forms the exposed outer surface of the packaged electronics device.
    Type: Application
    Filed: September 3, 2010
    Publication date: March 8, 2012
    Applicant: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Artur DARBINYAN, Kurt E. SINCERBOX, David T. CHIN
  • Patent number: 8130507
    Abstract: A component built-in wiring board is provided. The component built-in wiring board 10 includes a core substrate 11, a first component 61, a first built-up layer 31 and a capacitor 101. The core substrate 11 has a housing hole 90 and the first component 61 is housed in the housing hole 90. A component mounting region 20 capable of mounting a second component 21 is provided in a surface 39 of the first built-up layer 31. The capacitor 101 has electrode layers 102 and 103 and a dielectric layer 104. The capacitor 101 is embedded in the first built-up layer 31 such that a first front surface 105 and a second front surface 106 in the electrode layer 102 and a first front surface 107 and a second front surface 108 in the electrode layer 103 are disposed in parallel with the surface 39 of the first built-up layer 31.
    Type: Grant
    Filed: March 23, 2009
    Date of Patent: March 6, 2012
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Makoto Origuchi, Tsuneaki Takashima
  • Publication number: 20120051002
    Abstract: A manufacturing method of a packaging structure of electronic components is provided, and includes the steps of: providing a substrate including at least an electronic component and a grounding area; covering the electronic component of the substrate with a molding unit; cutting out the molding unit to form a plurality of recessed spaces, wherein the recessed spaces are arranged around the electronic component and at least one of the recessed spaces is electrically connected to the grounding area of the substrate; and forming a plurality of columnar electromagnet barriers in the recessed spaces and an electromagnet barrier layer on an upper surface of the molding unit. A packaging structure of electronic components manufactured by the aforementioned method is also provided.
    Type: Application
    Filed: November 15, 2010
    Publication date: March 1, 2012
    Applicant: ACSIP TECHNOLOGY INC.
    Inventors: SHING-YEU JUANG, HSING-KUEI LIN
  • Publication number: 20120051001
    Abstract: A PCB includes a number of insulation layers, a number of circuit layers, a signal-interfering component, and a signal-sensitive component. The circuit layers and the insulation layers are stacked alternately. The circuit layers include at least two first circuit layers, a second circuit layer, and a ground layer. The ground layer has a first side and a second side facing away the first side. The first circuit layers are positioned near the first side and include an outmost first circuit layer and at least one inner first circuit layer positioned between the outmost first circuit layer and the ground layer. The second circuit layer is positioned near the second side. The signal-interfering component is positioned on the outmost first circuit layer. The signal-sensitive component is positioned on the second circuit layer. Each inner first circuit layer defines a copper-remove area corresponding to an orthogonal projection of the signal-interfering component thereon.
    Type: Application
    Filed: October 31, 2010
    Publication date: March 1, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY(ShenZhen) CO., LTD.
    Inventors: NING WU, HSIN-KUAN WU, HOU-YUAN CHOU, SHUN-BO BAI, YAN-MEI ZHU