Printed Circuit Board Patents (Class 361/748)
  • Publication number: 20140037124
    Abstract: An acoustic device includes a substrate, a substrate cover, and a plurality of electrical and acoustic components. The substrate cover is disposed on the substrate and the plurality of electrical and acoustic components are disposed on the substrate and under the substrate cover. The substrate cover is constructed of a base metal and the substrate cover comprises a partially plating. The partial plating is arranged so as to prevent solder creep along a surface of the substrate cover.
    Type: Application
    Filed: July 24, 2013
    Publication date: February 6, 2014
    Applicant: Knowles Electronics, LLC
    Inventors: Tony K. Lim, Kurt B. Friel
  • Publication number: 20140036455
    Abstract: A method of additive manufacturing of a three-dimensional object is disclosed. The method comprises sequentially forming a plurality of layers each patterned according to the shape of a cross section of the object. In some embodiments, the formation of at least one of the layers comprises performing a raster scan to dispense at least a first building material composition, and a vector scan to dispense at least a second building material composition. The vector scan is optionally along a path selected to form at least one structure selected from the group consisting of (i) an elongated structure, (ii) a boundary structure at least partially surrounding an area filled with the first building material, and (iii) an inter-layer connecting structure.
    Type: Application
    Filed: April 17, 2012
    Publication date: February 6, 2014
    Applicant: STRATASYS LTD.
    Inventor: Eduardo Napadensky
  • Publication number: 20140035935
    Abstract: This disclosure provides systems, methods and apparatus for glass via bars that can be used in compact three-dimensional packages, including embedded wafer level packages. The glass via bars can provide high density electrical interconnections in a package. In some implementations, the glass via bars can include integrated passive components. Methods of fabricating glass via bars are provided. In some implementations, the methods can include patterning and etching photo-patternable glass substrates. Packaging methods employing glass via bars are also provided.
    Type: Application
    Filed: August 3, 2012
    Publication date: February 6, 2014
    Applicant: QUALCOMM MEMS TECHNOLOGIES, INC.
    Inventors: Ravindra V. Shenoy, Kwan-Yu Lai, Jon Bradley Lasiter, Jonghae Kim, Mario Francisco Velez, Chi Shun Lo, Donald William Kidwell, Philip Jason Stephanou, Justin Phelps Black, Evgeni Petrovich Gousev
  • Patent number: 8644656
    Abstract: A via hole is formed in a first cladding layer laminated on a wiring board. A conductive material is filled in the via hole so as to form a first conductor portion (a portion of a conductive via) having a mushroom-like shape projecting from a surface of the first cladding layer. Then, a second cladding layer is formed to cover the first conductor portion, the first cladding layer and a core layer, and a via hole is formed in the second cladding layer. A conductive material is filled in the via hole so as to form a second conductor portion (a remaining portion of the conductive via) connected to the first conductor portion.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: February 4, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Kenji Yanagisawa
  • Publication number: 20140029216
    Abstract: According to one embodiment, a circuit board is provided with a first rectangular electronic component, a board and a reinforcing plate. The first electronic component has a plurality of connection terminals. The board has the first electronic component mounted thereon via the connection terminals, and has a through hole for receiving a second electronic component at a position at which the first electronic component overlaps with the second electronic component. The reinforcing plate is attached to the back surface of the board, and has a plurality of first portions near the corner portions of the first electronic component, and a second portion of a strip shape coupling the first portions and located near the hole. The first and second portions are formed integral as one body.
    Type: Application
    Filed: September 4, 2013
    Publication date: January 30, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Yasunari Ukita
  • Publication number: 20140029206
    Abstract: Electronic devices are provided with ejectable component assemblies. Each ejectable component assembly may include a tray that can be loaded with one or more types of removable module, such as a mini-SIM card and a micro-SIM card, and inserted into the device. Each assembly may also include a cover coupled to a circuit board. The tray may be inserted through an opening in the electronic device and into a space between the cover and the circuit board. A portion of the space is contained within the pocket. A portion of the tray may be contained within the pocket when the tray is inserted into the device for holding the module at a functional insertion position within the device.
    Type: Application
    Filed: September 11, 2012
    Publication date: January 30, 2014
    Applicant: APPLE INC.
    Inventors: Michael B. Wittenberg, Miguel C. Christophy, Shayan Malek
  • Publication number: 20140030557
    Abstract: A battery pack includes a protective circuit configured to operate when a voltage of the battery is lower than a first voltage or higher than a second voltage or when a current greater than a particular current is detected, and the protective circuit includes a circuit board including a wire pattern, a current breaking device electrically connected to the wire pattern and formed patternwise on the circuit board, and a controller configured to control the current breaking device.
    Type: Application
    Filed: November 15, 2012
    Publication date: January 30, 2014
    Applicant: SAMSUNG SDI CO., LTD.
    Inventor: Youngjun Kim
  • Publication number: 20140029201
    Abstract: There is provided a power package module, including: a lead frame; at least one first electronic component mounted on the lead frame; and an insulating member disposed on a first surface of the first electronic component and having a via electrode connected to the first electronic component.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 30, 2014
    Inventors: Si Joong YANG, Do Jae Yoo, Joon Seok Chae
  • Publication number: 20140029221
    Abstract: Power may be supplied to an electronic module according to various techniques. In one general implementation, for example, a system for supplying power to an electronic module may include a printed circuit board, the electronic module, and a conductive foil. The board may include a number of contact locations on a first side, with at least one of the contact locations electrically coupled to a via to a second side of the board. The electronic module may be electrically coupled to the contact locations on the first side of the board and receive electrical power through the at least one contact location electrically coupled to a via. The foil may be adapted to convey electrical power for the electronic module and electrically coupled on the second side of circuit board to at least the via electrically coupled to a contact location that receives electrical power for the electronic module.
    Type: Application
    Filed: September 28, 2013
    Publication date: January 30, 2014
    Applicant: International Business Machines Corporation
    Inventors: Michael A. Christo, Julio A. Maldonado, Roger D. Weekly, Tingdong Zhou
  • Patent number: 8638567
    Abstract: Manufacturing circuits with reference plane voids over vias with a strip segment interconnect permits routing critical signal paths over vias, while increasing via insertion capacitance only slightly. The transmission line reference plane defines voids above (or below) signal-bearing plated-through holes (PTHs) that pass through a rigid substrate core, so that the signals are not degraded by an impedance mismatch that would otherwise be caused by shunt capacitance from the top (or bottom) of the signal-bearing PTHs to the transmission line reference plane. In order to provide increased routing density, signal paths are routed over the voids, but disruption of the signal paths by the voids is prevented by including a conductive strip through the voids that reduces the coupling to the signal-bearing PTHs and maintains the impedance of the signal path conductor.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: January 28, 2014
    Assignee: International Business Machines Corporation
    Inventors: Sungjun Chun, Anand Haridass, Roger D. Weekly
  • Patent number: 8637151
    Abstract: An objective of this invention is to provide an interlayer dielectric film with a carrier material used in a multilayer printed circuit board, which exhibits sufficient rigidity for a thin multilayer printed circuit board. According to the present invention, there is provided an interlayer dielectric film with a carrier material comprising a carrier material comprised of a metal foil or resin film and an interlayer dielectric film formed on one side of the carrier material, wherein the interlayer dielectric film is comprised of a base material impregnated with a resin; the base material has a thickness of 8 ?m to 20 ?m; and when the resin is cured at 170° C. for one hour under a pressure of 30 kgf/cm2, an elongation percentage of the interlayer dielectric film in a planar direction is 0.05% or less as determined by a TMA method.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: January 28, 2014
    Assignee: Sumitomo Bakelite Co., Ltd.
    Inventor: Toyoaki Kishi
  • Publication number: 20140022742
    Abstract: A compact transition structure includes a printed circuit board, wherein there is a rectangular region on one side of the printed circuit board and the rectangular region has a pair of long edges and a pair of short edges; a transition probe on the one side of the printed circuit board, wherein the transition probe extends into the rectangular region through a long edge of the rectangular region and has a terminal near a center of the rectangular region; and a coupler probe on the one side the printed circuit board, wherein the coupler probe extends into the rectangular region through a short edge of the rectangular region and has a terminal before the center of the rectangular region such that the coupler probe is electrically insulated from the transition probe.
    Type: Application
    Filed: July 17, 2013
    Publication date: January 23, 2014
    Applicant: ZTE (USA) Inc.
    Inventors: Ying SHEN, Peng Gao
  • Publication number: 20140022743
    Abstract: A touch-sensing substrate including a substrate, a patterned conductive layer and a patterned insulating layer is provided. The substrate has a plurality of first striped regions and a plurality of second striped regions. The first striped regions are intersected with the second striped regions to define a plurality of sensing-pad disposition regions. The patterned conductive layer includes a plurality of sensing pads disposed in the sensing-pad disposition regions. The patterned insulating layer is disposed on the first striped regions and the second striped regions. The patterned insulating layer and the patterned conductive layer are spliced to form a patterned light-shielding layer. The patterned light-shielding layer has a plurality of enclosed notches arranged in array, wherein parts of the enclosed notches are surrounded by the patterned conductive layer, and other parts of the enclosed notches are surrounded by the patterned conductive layer and the patterned insulating layer.
    Type: Application
    Filed: July 19, 2013
    Publication date: January 23, 2014
    Applicant: UNIDISPLAY INC.
    Inventors: Yi-Ming Tsai, Chun-Heng Lin, Wea-Li Tien, Sheng-Hsien Lin, Yueh-Ju Tsai, Wei-Jie Wang
  • Publication number: 20140022746
    Abstract: Intersection structures are provided to reduce a strain in a conformable electronic system that includes multi-level arrangements of stretchable interconnect structures. Bypass regions are formed in areas of the stretchable interconnect structures that may ordinarily cross or pass each other. The bypass regions of the stretchable interconnects are disposed relative to each other such that the intersection structure encompasses at least a portion of the bypass regions of each stretchable interconnect structure. The intersection structure has elastic properties that relieve a mechanical strain on the bypass regions during stretching at least one of the stretchable interconnect structures.
    Type: Application
    Filed: March 15, 2013
    Publication date: January 23, 2014
    Applicant: MC10 ,Inc.
    Inventor: Yung-Yu Hsu
  • Patent number: 8631567
    Abstract: A method of manufacturing a rigid-flexible printed circuit board, including providing a base substrate in which coverlays are respectively formed on two sides of a flexible copper foil laminate on both sides of which inner circuit patterns are respectively formed; layering insulation layers and copper foil layers on portions of coverlays which are to be a rigid region of the flexible copper foil laminate; forming a via hole in the rigid region, and, simultaneously, forming first windows in the coverlays in a flexible region; forming outer circuit patterns including areas adjacent to the first windows; and applying solder resist in the rigid region to expose portions of the external circuit patterns, where the outer circuit patterns formed in the areas adjacent to the first windows include additional plating portions for covering portions of the coverlays.
    Type: Grant
    Filed: March 8, 2010
    Date of Patent: January 21, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Yang Je Lee, Il Woon Shin, Going Sik Kim, Doo Pyo Hong, Ha Il Kim, Dong Gi An
  • Patent number: 8634199
    Abstract: A connection device is used to mount a computer mini-card. The connection device includes a board, an edge connector formed a bottom side of the board, a socket, and a pole. The socket is mounted on a first side surface of the board to connect to the computer mini-card, and is electrically connected to the edge connector. The pole extends from the first side surface of the board to fix an end of the computer mini-card opposite to the socket.
    Type: Grant
    Filed: December 17, 2011
    Date of Patent: January 21, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd, Hon Hai Precision Industry Co., Ltd.
    Inventors: Yong-Hua Xiao, Tsung-Hsien Lin, Xin Ji
  • Patent number: 8633393
    Abstract: A printed circuit board (PCB) is provided. The PCB includes a first microwave board material, a second prepreg, and a third ordinary board material that are pressed together. The first microwave board material, the second prepreg, and the third ordinary board material are provided with an opening respectively. At least two openings have different sizes. In a region between boundaries of the at least two openings having different sizes, a borehole is provided to pass through the board material in the region. A back-drilled hole is selectively used. A radio-frequency device and a method for manufacturing a PCB are further provided. Thus, it is suitable for designing different power modules and other circuit modules on the same single board, and is compatible with the existing basic PCB manufacturing technologies, which further has a low cost, and can meet the requirements of large-power radio-frequency circuits with different frequencies.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: January 21, 2014
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Ruiquan Yang, Haiqiang Sheng, Hongcai Li
  • Publication number: 20140016279
    Abstract: The present invention relates to touch panel and a fabrication method thereof. The method for forming touch panel disclosed in the present invention includes: forming a first pattern on a surface of a first substrate having a conductive material; forming a second pattern on a surface of a second substrate; aligning and laminating the first substrate having the first pattern and the second substrate; and cutting the laminated first substrate and second substrate into a plurality of touch panels. The present invention may resolve problems such as the high probability of substrate cracking and the high complexity of alignment of existing method for fabricating touch panel. A simple fabrication procedure may be used to perform alignment, to lamination and cutting, and the yield may be further improved.
    Type: Application
    Filed: February 14, 2013
    Publication date: January 16, 2014
    Applicant: WINSKY TECHNOLOGY LIMITED
    Inventor: Winston CHAN
  • Publication number: 20140016283
    Abstract: An apparatus for reducing EMI at the micro-electronic-component level includes a substrate having a ground conductor integrated therein. A micro-electronic component such as an integrated circuit is mounted to the substrate. An electrically conductive lid is mounted to the substrate, thereby forming a physical interface with the substrate. The electrically conductive lid substantially covers the micro-electronic component. A conductive link is provided to create an electrical connection between the electrically conductive lid and the ground conductor at the physical interface.
    Type: Application
    Filed: October 1, 2013
    Publication date: January 16, 2014
    Applicant: International Business Machines Corporation
    Inventors: Martin Beaumier, Alexandre Blander, Pascale Gagnon, Michael A. Gaynes, Eric Giguere, Eric Salvas, Luc Tousignant
  • Publication number: 20140016280
    Abstract: The present general inventive concept provides a serially arranged printed circuit board including a printed circuit board body and a connector connected to the printed circuit board body configured to exchange a signal with an external device. The printed circuit board body includes a plurality of semiconductor device areas, on which a plurality of semiconductor devices is formed, and a dummy area including a plurality of conductive patterns electrically connecting the connector with the plurality of semiconductor device areas, respectively. Each of the plurality of conductive patterns is formed in two or more multiple layers.
    Type: Application
    Filed: July 12, 2013
    Publication date: January 16, 2014
    Inventors: Young-Hoon KIM, Jong-Wook JEONG, Jeongsam LEE, Hyunseok CHOI
  • Publication number: 20140016282
    Abstract: A method includes: with a setting frequency set as an operating frequency of an LSI, selecting a capacitor having a lowest resonant impedance and a resonant frequency close to the setting frequency with reference to a capacitor characteristic database and installing one or more capacitors, each being the selected capacitor, as high frequency decoupling capacitors, the number thereof corresponding to a value obtained by dividing the upper limit of the power feeding line impedance by a resonant impedance of the capacitor.
    Type: Application
    Filed: March 28, 2012
    Publication date: January 16, 2014
    Applicant: NEC CORPORATION
    Inventor: Kazuhiro Kashiwakura
  • Publication number: 20140016281
    Abstract: A process tunable resistor is fabricated by adjusting elements of the resistor during a fabrication process. The elements include legs, turns, and elements such as a parallel sub-legs, that are adjusted in the fabrication process to provide a specific user defined resistance value. The process tunable resistor provides for fixed contact points in order to support pre-existing or define circuit designs.
    Type: Application
    Filed: December 23, 2011
    Publication date: January 16, 2014
    Applicant: Samsung Electronics Co. Ltd.
    Inventors: Scot E. Zickel, Nayak Tripti, Alexandra M. Kern
  • Patent number: 8625305
    Abstract: A portable electric device such as a mobile phone is disclosed. The portable electric device comprises a first chassis and a second chassis, and the first chassis and the second chassis are foldably coupled. The first chassis comprises a case member that comprises a coupling recess, a first recess and a second recess. The coupling recess and the first recess face a same side of the case member. The second recess faces an opposite side of the case member to the coupling recess and the first recess. The second recess is located at a rear side of the coupling recess. The first recess and the second recess accommodate a first electronic component and a second electronic component, respectively.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: January 7, 2014
    Assignee: Kyocera Corporation
    Inventor: Kouichi Hisada
  • Patent number: 8625300
    Abstract: Manufacturing circuits with reference plane voids over vias with a strip segment interconnect permits routing critical signal paths over vias, while increasing via insertion capacitance only slightly. The transmission line reference plane defines voids above (or below) signal-bearing plated-through holes (PTHs) that pass through a rigid substrate core, so that the signals are not degraded by an impedance mismatch that would otherwise be caused by shunt capacitance from the top (or bottom) of the signal-bearing PTHs to the transmission line reference plane. In order to provide increased routing density, signal paths are routed over the voids, but disruption of the signal paths by the voids is prevented by including a conductive strip through the voids that reduces the coupling to the signal-bearing PTHs and maintains the impedance of the signal path conductor.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: January 7, 2014
    Assignee: International Business Machines Corporation
    Inventors: Sungjun Chun, Anand Haridass, Roger D. Weekly
  • Patent number: 8625291
    Abstract: An electronic device includes a main body, a display panel and an electrical circuit board assembly. The display panel is disposed in the main body and includes a power cord for supplying power to a backlight module thereof. The electrical circuit board assembly is located beneath the display panel and connected to the power cord by a connector. An accommodating space is defined between the electrical circuit board assembly and a second portion of the main body for receiving the connector therein.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: January 7, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Yong-Jun Yu, Na Wang, Bao-Gang Zhao, Wei Liu
  • Patent number: 8625296
    Abstract: An object of the present invention is to allow stress that may be applied to a semiconductor package to be suppressed, when the semiconductor package is mounted on a curved board. In a mount board 1, a semiconductor package 20 is mounted on a curved board 10 including a curved surface on at least a portion thereof. The curved board 10 includes a pedestal portion 13a disposed on a region of the curved surface portion where the semiconductor package 20 is mounted and having an upper surface thereof formed flat, and a plurality of pad portions 15a disposed on the flat surface of the pedestal portion 13a. The pedestal portion 13a is formed of an insulating material. The semiconductor package 20 is mounted on the pad portions 15a.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: January 7, 2014
    Assignee: NEC Corporation
    Inventors: Shinji Watanabe, Nobuhiro Mikami, Junya Sato, Kenichiro Fujii, Katsumi Abe, Atsumasa Sawada
  • Publication number: 20140003004
    Abstract: A method for producing a base substrate includes preparing an insulator substrate; forming a first film containing, as a main component, a metal that contains at least one of tungsten and molybdenum and has a melting point of 1000° C. or higher on the insulator substrate; forming a second film containing nickel as a main component and also containing boron on the first film; forming a first metal layer by performing a sintering treatment of the first film and the second film; and forming a second metal layer containing palladium as a main component on the first metal layer.
    Type: Application
    Filed: June 20, 2013
    Publication date: January 2, 2014
    Inventor: Tomoyuki KAMAKURA
  • Publication number: 20140003005
    Abstract: Electronic displays and metal micropatterned substrates are described comprising a graphic defined by a contrasting area adjacent the graphic. In one embodiment, the graphic is visible when the display is viewed with reflected light and the graphic is substantially less visible or invisible when viewed with backlighting transmitted through the metal micropatterned substrate. The graphic and contrasting area have a total metal micropattern density that differs by no greater than about 5% and more preferably by no greater than 2%.
    Type: Application
    Filed: September 5, 2013
    Publication date: January 2, 2014
    Applicant: 3M INNOVATIVE PROPERTIES COMPANY
    Inventors: Cristin E. Moran, Matthew H. Frey
  • Patent number: 8619434
    Abstract: An arrangement system composed of a plurality of electrical/electronic components particularly of a voltage converter device of a power supply system for use in oil/natural gas production composed of at least one support member that is provided on at least one side with a surrounded accommodating recess, a circuit carrier which is arranged in the accommodating recess and electrically connected to the components, and a holding member fixing the circuit carrier and/or the components in the accommodating recess. An insulating material is arranged at least in part between the circuit carrier and/or components and the support member. Such an arrangement system permits an adequate electrical insulation of the corresponding components and optionally also of the circuit carrier in relation to the support member together with an adequately high heat conduction.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: December 31, 2013
    Assignee: Cameron International Corporation
    Inventors: Klaus Biester, Peter Kunow, Volker Zabe
  • Publication number: 20130342968
    Abstract: Computational enclosures may be designed to distribute power from power supplies to load units (e.g., processors, storage devices, or network routers). The architecture may affect the efficiency, cost, modularity, accessibility, and space utilization of the components within the enclosure. Presented herein are power distribution architectures involving a distribution board oriented along a first (e.g., vertical) axis within the enclosure, comprising a power interconnect configured to distribute power among a set of load boards oriented along a second (e.g., lateral) axis and respectively connecting with a set of load units oriented along a third (e.g., sagittal) axis, and a set of power supplies also oriented along the third axis. This orientation may compactly and proximately position the loads near the power supplies in the distribution system, and result in a comparatively low local current that enables the use of printed circuit boards for the distribution board and load boards.
    Type: Application
    Filed: June 22, 2012
    Publication date: December 26, 2013
    Applicant: Microsoft Corporation
    Inventors: Eric C. Peterson, Shaun L. Harris
  • Publication number: 20130343010
    Abstract: Disclosed are an electric conducting substrate, comprising a transparent substrate and an electric conducting pattern comprising an electric conducting line provided on the transparent substrate, and an electronic device comprising the same.
    Type: Application
    Filed: August 22, 2013
    Publication date: December 26, 2013
    Applicant: LG Chem, LTD
    Inventors: Ji Young HWANG, In-Seok HWANG, Yong Goo SON, Beom Mo KOO, Jiehyun SEONG, Joo Yeon KIM, Jeseob PARK
  • Publication number: 20130342983
    Abstract: An electronic device includes an enclosure with a bottom wall and a sidewall, a motherboard mounted on the bottom wall, an expansion card, and an expansion unit. The sidewall defines a first opening and a second opening. The expansion card includes an edge connector, a number of first sockets exposed through the first opening, and an expansion socket unit. The expansion socket unit includes a second socket. The expansion unit includes an expansion socket exposed through the second opening. The expansion socket of the expansion unit is electrically connected to the second socket by cables.
    Type: Application
    Filed: July 24, 2012
    Publication date: December 26, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.
    Inventors: JUN-HUI WANG, YU HAN, ZHENG-HENG SUN
  • Publication number: 20130341191
    Abstract: An apparatus (11) for processing a sample, circuit board (8008) suited to use in such an apparatus and a method of processing are provided in which the apparatus (11) is provided with alignment features to assist in provided the circuit board and a sample cartridge (9) in the correct position relative to one another. In this way, the plurality of sections for processing a sample in the cartridge (9) are positioned against a plurality of elements, such as a heater (4) for heating the sample cartridge (9) or an electrical contact (EP1-EP4) for powering features on the sample cartridge (9), correctly and can operate independently of one another.
    Type: Application
    Filed: August 25, 2011
    Publication date: December 26, 2013
    Applicant: FORENSIC SCIENCE SERVICE LIMITED
    Inventors: Stan Smith, Brett Duane, Cedric Hurth, David Nguyen, Amol Surve, Ralf Lenigk, Frederic Zenhausen
  • Publication number: 20130343009
    Abstract: An apparatus includes active layers, and a first high resistive layer disposed between the active layers. The apparatus further includes second and third high resistive layers disposed on respective surfaces of the active layers, the second and third high resistive layers including first and second strip conductors, respectively, the first strip conductors being connected at an end by a first connecting conductor, the second strip conductors being connected at an end by a second connecting conductor, and the first connecting conductor being disposed perpendicularly to the second connecting conductor. The apparatus further includes first contact pads disposed on respective ends of the first connecting conductor, and second contact pads disposed on respective ends of the second connecting conductor. The apparatus further includes matching layers disposed on respective surfaces of the second and third high resistive layers.
    Type: Application
    Filed: June 20, 2013
    Publication date: December 26, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Andrew Borisovich Kozyrev, Alexander Chernokalov, Vitally Osadchy, Andrew Altynnikov, Igor Kotelnikov
  • Publication number: 20130343008
    Abstract: A circuit board system including mechanical protection of electrical components includes a circuit board (101) furnished with electrical components (103-111) and a protection element (102) attached to areas of the circuit board which are free from the electrical components. The protection element has thickness in the direction perpendicular to the circuit board and it is shaped to leave the electrical components unscreened in the direction perpendicular to the circuit board. Thus, the protection element constitutes barriers protecting the electrical components but still allows the electrical components to be accessed from the direction perpendicular to the circuit board for example in a flying probe testing. The body of the protection element can be made of same material as the electrically insulating body of the circuit board. Thus, the thermal expansion co-efficient of the protection element can be substantially the same as that of the circuit board.
    Type: Application
    Filed: June 12, 2013
    Publication date: December 26, 2013
    Inventors: Antti HOLMA, Peter KOKKO
  • Patent number: 8614900
    Abstract: An apparatus for reducing EMI at the micro-electronic-component level includes a substrate having a ground conductor integrated therein. A micro-electronic component such as an integrated circuit is mounted to the substrate. An electrically conductive lid is mounted to the substrate, thereby forming a physical interface with the substrate. The electrically conductive lid substantially covers the micro-electronic component. A conductive link is provided to create an electrical connection between the electrically conductive lid and the ground conductor at the physical interface.
    Type: Grant
    Filed: May 18, 2011
    Date of Patent: December 24, 2013
    Assignee: International Business Machines Corporation
    Inventors: Martin Beaumier, Alexandre Blander, Pascale Gagnon, Michael A. Gaynes, Eric Giguere, Eric Salvas, Luc Tousignant
  • Patent number: 8615616
    Abstract: The present disclosure describes techniques for scalable embedded memory programming. In some aspects data is received at a first communication interface from a host device, at least a portion of the data is stored to a memory device supported by a printed circuit board, and the data is transmitted to a target device via a second communication interface.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: December 24, 2013
    Assignee: Marvell World Trade Ltd.
    Inventors: William B. Weiser, Thomas G. Warner
  • Publication number: 20130335928
    Abstract: A fabrication method of a coreless packaging substrate is provided, including the steps of: forming an inner built-up circuit board on a carrier; removing the carrier; and symmetrically forming a first outer built-up structure and a second outer built-up structure on top and bottom surfaces of the inner built-up circuit board, respectively. The present invention effectively increases the product yield, saves the fabrication cost, and reduces wastes.
    Type: Application
    Filed: February 28, 2013
    Publication date: December 19, 2013
    Applicant: UNIMICRON TECHNOLOGY CORPORATION
    Inventors: Tzyy-Jang Tseng, Chung W. Ho, Dyi-Chung Hu, Huan-Ling Lee, Sheng-Yuah He
  • Publication number: 20130335927
    Abstract: A planar transformer assembly, for use in charging capacitors of an ICD, includes windings arranged to minimize voltage across intervening dielectric layers. Each secondary winding of a preferred plurality of secondary windings is arranged relative to a primary winding, in a hierarchical fashion, such that the DC voltage, with respect to ground, of a first secondary winding, of the plurality of secondary windings, is lower than that of a second secondary winding, with respect to ground, wherein the first secondary winding is in closest proximity to the primary winding. The primary winding and each secondary winding are preferably formed on a corresponding plurality of dielectric layers.
    Type: Application
    Filed: June 15, 2012
    Publication date: December 19, 2013
    Inventor: Mark R. Boone
  • Publication number: 20130334319
    Abstract: A semiconductor device that is resistant to bending stress and has a structure in which an antenna circuit, an electric double layer capacitor for storing electricity, and the like are formed over a signal processing circuit that is provided over a substrate and has a charging circuit. The signal processing circuit having the charging circuit is provided over a substrate, and the antenna circuit and the electric double layer capacitor are provided over the signal processing circuit. The antenna circuit is electrically connected to the signal processing circuit, and the electric double layer capacitor is electrically connected to the charging circuit. With such a structure, a wiring for connecting the charging circuit and the electric double layer capacitor can be made short. Accordingly, a semiconductor device that is resistant to bending stress can be provided.
    Type: Application
    Filed: August 20, 2013
    Publication date: December 19, 2013
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Kaoru TSUCHIYA
  • Publication number: 20130337665
    Abstract: A midplane has a first side to which contact ends of a first differential connector are connected and a second side opposite the first side to which contact ends of a second differential connector are connected. The midplane includes a plurality of vias extending from the first side to the second side, with the vias providing first signal launches on the first side and second signal launches on the second side. The first signal launches are provided in a plurality of rows, with each row having first signal launches along a first line and first signal launches along a second line substantially parallel to the first line. The second signal launches are provided in a plurality of columns, with each column having second signal launches along a third line and second signal launches along a fourth line substantially parallel to the third line.
    Type: Application
    Filed: May 21, 2013
    Publication date: December 19, 2013
    Applicant: Amphenol Corporation
    Inventors: Thomas S. COHEN, Marc Benard Cartier, JR., Mark W. Gailus
  • Patent number: 8611096
    Abstract: This invention is directed to a support plate for reinforcing a portion of a circuit board. The support plate may be coupled to a portion of the circuit board that is subject to forces (e.g., portions of the circuit board having switches) to prevent flexing of the board. The support plate may be coupled to the circuit board. This invention is also directed to a switch constructed from a button, a label plate, and a backer plate. The label plate and the backer plate may include apertures operative to receive a protrusion extending from the button, where the protrusion is welded to the backer plate. Labels may be printed or attached to the bottom surface of the label plate to protect the labels. In some embodiments, the protrusion may be welded to the backer plate. The protrusion may be operative to engage an electrical switch of an electronic device in which the switch is placed.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: December 17, 2013
    Assignee: Apple Inc.
    Inventors: Stephen Brian Lynch, Dinesh Mathew
  • Patent number: 8609991
    Abstract: A flex-rigid wiring board including a rigid substrate including a rigid base material and a conductor layer, and a flexible substrate having a conductor layer. The conductor layer of the flexible substrate is electrically connected to the conductor layer of the rigid substrate. The rigid substrate has a recessed portion which is formed on a surface of the rigid substrate and which accommodates an electronic component.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: December 17, 2013
    Assignee: Ibiden Co., Ltd.
    Inventor: Michimasa Takahashi
  • Publication number: 20130329381
    Abstract: An electromagnetic shielding case and an electronic device having the same are introduced. The electronic device includes a PCB, which has at least one electronic component mounted thereon and is provided around the electronic component with multiple positioning holes. The electromagnetic shielding case includes a casing body internally defining a shielding space and multiple fixing pins formed on lower edges of the casing body corresponding to the positioning holes on the PCB. Each fixing pin includes a neck portion and an end portion with an angle included therebetween. After the fixing pins are correspondingly extended through the positioning holes, the end portions can be deflected by an angle to thereby hold the casing body to the PCB with the electronic component located in the shielding space and shielded against EMI. With these arrangements, the electromagnetic shielding case can be quickly mounted to and dismounted from the PCB.
    Type: Application
    Filed: August 6, 2012
    Publication date: December 12, 2013
    Inventors: SZU-HAO HUANG, SHIH-PO LO
  • Publication number: 20130329380
    Abstract: A method and a system for a handheld communication device is provided. The method includes: a testing a printed circuit board PCB assembly; identifying an emission point in the PCB; allocating a frequency radio (RF) absorber over or close to the emission point where the emission point is a potential source of electromagnetic interference (EMI) other than electronic components mounted on the PCB. The system includes a PCB assembly; and an RF absorber planar plate secured over or close to the emission point, for reducing the EMI from the emission point. A handheld communication device includes an antenna system and the PCB assembly with the RF absorber for isolating the antenna system from self-interference in the device.
    Type: Application
    Filed: June 6, 2012
    Publication date: December 12, 2013
    Applicant: Psion Teklogix Inc.
    Inventor: Michael Tran
  • Patent number: 8605445
    Abstract: The structure comprises at least a device, for example a microelectronic chip, and at least a getter arranged in a cavity under a controlled atmosphere delineated by a substrate and a sealing cover. The getter comprises at least one preferably metallic getter layer, and an adjustment sub-layer made from pure metal, situated between the getter layer and the substrate, on which it is formed. The adjustment sub-layer is designed to modulate the activation temperature of the getter layer. The getter layer comprises two elementary getter layers.
    Type: Grant
    Filed: October 9, 2008
    Date of Patent: December 10, 2013
    Assignee: Commissariat a l'Energie Atomique
    Inventor: Xavier Baillin
  • Patent number: 8605448
    Abstract: A printed wiring board includes a bridge located in a surface layer, a noise absorber located on the bridge, a plurality of grounds directly connected or high-frequency-connected to the bridge, a first device using one of the plurality of grounds as a reference potential, a second device using one of the plurality of grounds other than the ground for the first device as a reference potential, and a high-speed signal line that connects the first device and the second device. The high-speed signal line is routed through a layer adjacent to the bridge in a layer direction of the printed wiring board to form a transmission line structure.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: December 10, 2013
    Assignee: Ricoh Company, Limited
    Inventors: Kenji Motohashi, Hideji Miyanishi, Kazumasa Aoki
  • Publication number: 20130322029
    Abstract: A multilayer electronic support structure including at least one metallic component encapsulated in a dielectric material, and comprising at least one faraday barrier to shield the at least one metallic component from interference from external electromagnetic fields and to prevent electromagnetic emission from the metallic component.
    Type: Application
    Filed: May 30, 2012
    Publication date: December 5, 2013
    Inventor: DROR HURWITZ
  • Publication number: 20130321981
    Abstract: A laminated chip electronic component includes: a ceramic body including internal electrodes and dielectric layers; first and second external electrodes formed to cover both end portions of the ceramic body in a length direction; an active layer in which the internal electrodes are disposed in an opposing manner, while having the dielectric layers interposed therebetween, to form capacitance; upper and lower cover layers formed on upper and lower portions of the active layer in a thickness direction, the lower cover layer having a thickness greater than that of the upper cover layer; and additional electrode layers disposed irrespective of a formation of capacitance within the lower cover layer.
    Type: Application
    Filed: August 17, 2012
    Publication date: December 5, 2013
    Inventors: Young Ghyu AHN, Min Cheol Park, Doo Young Kim, Sang Soo Park
  • Publication number: 20130322030
    Abstract: A printed circuit board includes a power supply, a plurality of loads, a copper sheet, and a plurality of metal sheets mounted onto the copper sheet. The copper sheet is electronically connected between the power supply and the loads. The power supply outputs a plurality of currents to the loads via a plurality of current traces passing through the copper sheet, the plurality of metal sheets are located along the plurality of current traces.
    Type: Application
    Filed: May 22, 2013
    Publication date: December 5, 2013
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: CHIA-MING YEH, CHUN-YUAN TIEN, CHIH-HUNG WU