Printed Circuit Board Patents (Class 361/748)
  • Patent number: 8595925
    Abstract: A manufacturing method of identifiable print circuit board includes a step of “disposing an identifier”, by providing a base plate, defining a surface of the base plate as a manufacturing surface, and disposing a primary identifier on the manufacturing surface; a step of “piling”, by sequentially piling up an insulating layer and a circuit layer with a penetrating area on the manufacturing surface, with the penetrating area in alignment with the position of the primary identifier; and a step of “lamination”, by laminating the base plate, the insulating layer, and the circuit layer at a temperature not less than 150° C. and a pressure not less than 280 psi to obtain a print circuit board.
    Type: Grant
    Filed: January 5, 2011
    Date of Patent: December 3, 2013
    Assignee: Wus Printed Circuit Co., Ltd
    Inventors: Chih-Kang Chen, Tien-Jen Lin, Wei-Jen Mai
  • Patent number: 8599565
    Abstract: A touchscreen panel includes an upper substrate having a first transparent conductor layer provided on a first base layer, and a lower substrate having a second transparent conductor layer provided on a second base layer. The first and second transparent conductor layers oppose each other via a spacer and make contact when the first base layer is pressed. The first transparent conductor layer is segmented into a plurality of conductive regions that are electrically insulated from each other.
    Type: Grant
    Filed: April 12, 2010
    Date of Patent: December 3, 2013
    Assignee: Fujitsu Component Limited
    Inventors: Koichi Kondoh, Takashi Nakajima, Nobuyoshi Shimizu, Masanobu Hayama, Norio Endo
  • Publication number: 20130314887
    Abstract: A printed circuit board (PCB) prevents damage to tabs of the PCB and pins of a slot by reducing insertion force when the PCB is inserted in the slot. The PCB includes a body portion including a first surface and a second surface and a metal interconnection layer formed on at least one of the first and second surfaces. The metal interconnecting layer includes tabs formed along a first edge of the body portion. An insertion force alleviation portion in which at least a portion of the body portion is removed is formed in the first edge to reduce the insertion force required to seat the PCB within the slot.
    Type: Application
    Filed: February 5, 2013
    Publication date: November 28, 2013
    Inventors: Jin-San Jung, Joo-Han Lee, Hyun-Seok Choi
  • Publication number: 20130314881
    Abstract: A portable display device may include a display panel, a window, an attaching member and a blocking member. The display panel may have a drive circuit region and a display region. The window may be positioned facing to the display panel. The attaching member may be interposed between the display region of the display panel and the window to attach the display panel to the window. The blocking member may be arranged on a boundary line between the drive circuit region and the display region to prevent the attaching member from infiltrating into the drive circuit region. Thus, flows of the attaching member may be readily controlled using the blocking member having a simple structure to prevent the infiltration of the attaching member into the drive circuit region. As a result, the portable display device may be assembled by a simple process and a low cost.
    Type: Application
    Filed: February 25, 2013
    Publication date: November 28, 2013
    Inventors: Yong-Youl CHO, Kwan-Young HAN, Jong-Hwan KIM, Kyu-Ho JUNG, Young-In LIM
  • Patent number: 8593819
    Abstract: Circuit modules and methods of construction thereof that contain composite meta-material dielectric bodies that have high effective values of real permittivity but which minimize reflective losses, through the use of host dielectric (organic or ceramic), materials having relative permittivities substantially less than ceramic dielectric inclusions embedded therein. The composite meta-material bodies permit reductions in physical lengths of electrically conducting elements such as antenna element(s) without adversely impacting radiation efficiency. The meta-material structure may additionally provide frequency band filtering functions that would normally be provided by other components typically found in an RF front-end.
    Type: Grant
    Filed: May 14, 2012
    Date of Patent: November 26, 2013
    Inventor: L. Pierre de Rochemont
  • Patent number: 8593824
    Abstract: Tamper secure circuitry including a first printed circuit board having mounted thereon circuit components and a slotted anti-tamper grid containing printed circuit board mounted onto the first printed circuit board defining at least one slot and arranged to overlie at least some of the circuit components, which are located in a volume defined by the at least one slot and the first printed circuit board.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: November 26, 2013
    Assignee: Verifone, Inc.
    Inventor: Ehud Kirmayer
  • Patent number: 8593818
    Abstract: The present invention relates to a Network on chip comprising a torus matrix of processing elements formed by a juxtaposition of bricks in rows and columns, each brick comprising a longitudinal extra-connection bus segment connecting two terminals situated on opposite transverse edges of the brick on a first axis; two longitudinal intra-connection bus segments connecting circuits of the brick to respective terminals situated on the opposite transverse edges on a second axis symmetrical to the first axis with respect to the center of the brick; a transverse extra-connection bus segment connecting two terminals situated on opposite longitudinal edges of the brick on a third axis; and two transverse intra-connection bus segments connecting circuits of the brick to respective terminals situated on the opposite longitudinal edges on a fourth axis symmetrical to the third axis with respect to the center of the brick.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: November 26, 2013
    Assignee: Kalray
    Inventor: Francois Jacquet
  • Patent number: 8593828
    Abstract: Communications system housings, assemblies, and related alignment features and methods are disclosed. In certain embodiments, communications cards and related assemblies and methods that include one or more alignment features are disclosed. In certain embodiments, at least one digital connector disposed in the communications card is configured to engage at least one complementary digital connector to align at least one RF connector also disposed in the communications card with at least one complementary RF connector. In other embodiments, printed circuit board (PCB) assemblies are disclosed that include a moveable standoff to provide an alignment feature. In other embodiments, distributed antenna systems and assemblies that include one or more alignment features are disclosed.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: November 26, 2013
    Assignee: Corning Cable Systems LLC
    Inventors: Chois A. Blackwell, Jr., Terry D. Cox
  • Publication number: 20130308282
    Abstract: A mobile terminal is provided. The mobile terminal includes a front case, a flat panel having a front side facing the front case and a back side, a main printed circuit board supported by the back side of the flat panel, the main circuit printed circuit board having a back side, a battery having a first surface located at a first side thereof and a second surface located at a second side thereof, the battery being located at the back side of the main printed circuit board to form a separation gap between the first curved surface and the back side of the main printed circuit board and at least a portion of an electronic component being mounted on the main printed circuit board and extending into the separation gap. An apparatus for forming a curved battery for the mobile terminal is also provided.
    Type: Application
    Filed: March 15, 2013
    Publication date: November 21, 2013
    Applicant: LG Electronics Inc.
    Inventors: Choonghwan SHIN, Kyungtae YANG, Kyuho LEE, Jisun YANG, Sukho HONG, Seunggeun LIM
  • Publication number: 20130308283
    Abstract: According to one embodiment, a connector includes a connector main body, and a mark. The connector main body is mounted on a connector mounting portion of a substrate, and has an outer surface extending along a direction intersecting with a mounting surface. The mark is provided on the outer surface of the connector main body. The mark configured to indicate a degree of tilt of the connector main body relative to the mounting surface.
    Type: Application
    Filed: January 4, 2013
    Publication date: November 21, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Ichioh Murakami
  • Patent number: 8589608
    Abstract: A system to mate logic nodes may include a connector to secure at least one of an inter-nodal circuit and a fabric bus, where the inter-nodal circuit provides communications between any connected logic nodes, and the fabric bus provides logical connections to a first logic node and any other logic node. The system may also include an element carried by the connector configured to provide an appropriate actuation force to mate the connector and at least one of the inter-nodal circuit and the fabric bus.
    Type: Grant
    Filed: February 26, 2011
    Date of Patent: November 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: William L. Brodsky, Eric J. McKeever, John G. Torok
  • Publication number: 20130301227
    Abstract: A circuit module having satisfactory isolation characteristics and a method of manufacturing the same are such that electronic components are mounted on a principal surface of a circuit substrate. An insulating layer covers the principal surface of the circuit substrate and the electronic components. A groove is disposed in a principal surface of the insulating layer. A shielding layer covers the principal surface of the insulating layer and the inner surface of the groove.
    Type: Application
    Filed: July 8, 2013
    Publication date: November 14, 2013
    Inventor: Koji KAWANO
  • Publication number: 20130301228
    Abstract: The present invention relates a packaging structure including: a carrier board and a cementing layer on the surface of the carrier board; chips and passive devices having functional side thereof attached to the cementing layer; and a sealing material layer for packaging and curing, the sealing material being formed on the carrier board on the side attached to the chips and the passive devices. The present invention integrates chips and passive devices and then packages the chips and the passive devices together, and is therefore a packaged product having not single-chip functionality but integrated-system functionality. The present invention is highly integrated, reduces interfering factors such as system-internal electric resistance and inductance, and accommodates growing demand for lighter, thinner, shorter, and smaller semiconductor packaging.
    Type: Application
    Filed: January 20, 2012
    Publication date: November 14, 2013
    Applicant: NANTONG FUJITSU MICROELECTRONICS CO., LTD.
    Inventors: Yujuan Tao, Lei Shi, Guohua Gao, Guoji Yang, Honglei Li, Haijun Shen
  • Patent number: 8580682
    Abstract: A device includes a substrate having a first surface, and a second surface opposite the first surface. A through-substrate via (TSV) extends from the first surface to the second surface of the substrate. A dielectric layer is disposed over the substrate. A metal pad is disposed in the dielectric layer and physically contacting the TSV, wherein the metal pad and the TSV are formed of a same material, and wherein no layer formed of a material different from the same material is between and spacing the TSV and the metal pad apart from each other.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: November 12, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ku-Feng Yang, Yung-Chi Lin, Hung-Pin Chang, Tsang-Jiuh Wu, Wen-Chih Chiou
  • Patent number: 8582333
    Abstract: Switched capacitor networks for power delivery to packaged integrated circuits. In certain embodiments, the switched capacitor network is employed in place of at least one stage of a cascaded buck converter for power delivery. In accordance with particular embodiments of the present invention, a two-stage power delivery network comprising both switched capacitor stage and a buck regulator stage deliver power to a microprocessor or other packaged integrated circuit (IC). In further embodiments, a switched capacitor stage is implemented with a series switch module comprising low voltage MOS transistors that is then integrated onto a package of at least one IC to be powered. In certain embodiments, a switched capacitor stage is implemented with capacitors formed on a motherboard, embedded into an IC package or integrated into a series switch module.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: November 12, 2013
    Assignee: Intel Corporation
    Inventors: Bradley S. Oraw, Telesphor Kamgaing
  • Patent number: 8582312
    Abstract: A highly reliable electronic circuit board for suppressing propagation of noise and a power line communication apparatus using it are provided. An electronic circuit board of the invention is connected to a different electronic circuit board and including a first board having a first face and a second face opposed to the first face and a second board having a third face and a fourth face opposed to the third face.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: November 12, 2013
    Assignee: Panasonic Corporation
    Inventors: Hiroshi Kawano, Shuichiro Yamaguchi, Takumi Naruse, Toshihiro Yamauchi
  • Publication number: 20130294038
    Abstract: The invention relates to an electronic device for radio frequency or power applications, comprising a semiconductor layer supporting electronic components on a support substrate, wherein the support substrate comprises a base layer having a thermal conductivity of at least 30 W/m K and a superficial layer having a thickness of at least 5 ?m, the superficial layer having an electrical resistivity of at least 3000 Ohm·cm and a thermal conductivity of at least 30 W/m K. The invention also relates to two processes for manufacturing such a device.
    Type: Application
    Filed: November 16, 2011
    Publication date: November 7, 2013
    Applicant: SOITEC
    Inventors: Didier Landru, Luciana Capello, Eric Desbonnet, Christophe Figuet, Oleg Kononchuk
  • Publication number: 20130294037
    Abstract: The present invention discloses a conductive film and a display apparatus provided with the conductive film. A conductive film is disposed on a display panel of a display apparatus, and has a base body, and a conductive section formed on one of the main surfaces of the base body. The conductive section has a mesh pattern composed of fine metal lines, and the fine metal lines have a tilt of 30-44° with respect to the alignment direction of pixels of the display apparatus.
    Type: Application
    Filed: July 11, 2013
    Publication date: November 7, 2013
    Inventors: Tadashi KURIKI, Kazuchika IWAMI
  • Patent number: 8576572
    Abstract: An electronic device is disclosed. The electronic device includes a housing, a circuit board, an antenna, electronic components, and a wiring part. The circuit board is built inside the housing on which an opening is formed. The antenna is facing one surface of the circuit board. Electronic components are disposed at the position facing the antenna through the circuit board, on the other surface of the circuit board, in a state such that the electronic components are not fixed to the circuit board The wiring part passes through the opening of the circuit board, with one end connected to the electronic components on one side of the circuit board and other end connected to the circuit board on the other surface of the circuit board.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: November 5, 2013
    Assignee: KYOCERA Corporation
    Inventors: Takahiro Tanaka, Mitsuhiro Nishizono, Takumi Ogata, Tadashi Koyama
  • Patent number: 8576578
    Abstract: A robust printed circuit board (PCB) that includes at least two power layers that are used in providing power to components connected to the PCB. The power layers may be a power plane layer and a ground plane layer. The power plane layer is situated such that its edge is pulled back a second distance from the planar edge of the PCB. The ground plane layer is situated such that its edge is pulled back a first distance from the planar edge of the PCB. The second distance and the first distance are different, and as a result, the planar edges of the power plane layer and the ground plane layer respectively do not coincide.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: November 5, 2013
    Assignee: International Business Machines Corporation
    Inventors: Robert L. Ayers, Michael L. Scollard, Heidi D. Williams
  • Patent number: 8576567
    Abstract: A COF includes, in at least one embodiment, a heat dissipating material on a back surface of an insulating film. The heat dissipating material has a slit for reducing a degree of thermal expansion. Thus, at least one embodiment of the invention provides the COF in which deformation and disconnection of wiring are prevented.
    Type: Grant
    Filed: January 13, 2009
    Date of Patent: November 5, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tatsuya Katoh, Takuya Sugiyama, Yasunori Chikawa
  • Publication number: 20130286603
    Abstract: According to one embodiment, there are provided a memory which is provided on a circuit board, a controller which is provided on the circuit board and controls the memory, and a signal line which is formed on the circuit board and configured to perform data transmission between the controller and the memory, in which a width of the signal line in the place where the signal line is led out from the memory is large compared with a place disposed under the memory.
    Type: Application
    Filed: October 31, 2012
    Publication date: October 31, 2013
    Inventors: Takashi OKADA, Atsuko SEKI
  • Publication number: 20130286604
    Abstract: A photocurable resin composition which hardly causes leakage and is easily formed into a desired shape and an image display device using this photocurable resin composition are provided. Namely, a photocurable resin composition comprises a compound (A) having a photopolymerizable functional group and an oil gelling agent (B), is provided. Also, an image display device having a laminate structure including an image display unit having an image display part, a transparent protective plate, and a resin layer existent between the image display unit and the transparent protective plate, wherein the resin layer is a cured material of the above-described photocurable resin composition, is provided.
    Type: Application
    Filed: March 21, 2013
    Publication date: October 31, 2013
    Applicant: HITACHI CHEMICAL COMPANY, LTD.
    Inventor: Hitachi Chemical Company, Ltd.
  • Publication number: 20130286460
    Abstract: A porous electrode sheet (1) includes a resin film (2) being transparent and having insulating properties, and a transparent electrode (3) placed on one face (2a) of the resin film (2). The resin film (2) is provided with a plurality of through holes (21) extending linearly from the one face (2a) to the other face (2b). The transparent electrode (3) has openings (31) at positions corresponding respectively to the through holes (21). The through holes (21) of the resin film (2) and the openings (31) of the transparent electrode (3) communicate with each other, and thereby form passages (10) penetrating the porous electrode sheet (1) in the thickness direction.
    Type: Application
    Filed: December 15, 2011
    Publication date: October 31, 2013
    Applicant: NITTO DENKO CORPORATION
    Inventors: Junichi Moriyama, Yozo Nagai, Satoru Furuyama, Hajime Yamamoto
  • Patent number: 8569629
    Abstract: An FPC board includes a base insulating layer. A plurality of wiring traces are formed on the base insulating layer. The adjacent wiring traces are arranged at a distance d from each other, and each wiring trace has a predetermined width and a thickness t1. Each transmission line pair is constituted by the two adjacent wiring traces of the plurality of wring traces. A ratio of the thickness t1 of the wiring trace to the distance d between the adjacent wiring traces is set to 0.8 or more. A cover insulating layer may be formed on the base insulating layer to cover the wiring traces. A metal layer having a predetermined thickness may be provided on a back surface of the base insulating layer. Furthermore, a differential impedance of each transmission line pair may be set to 100 ?.
    Type: Grant
    Filed: April 27, 2010
    Date of Patent: October 29, 2013
    Assignee: Nitto Denko Corporation
    Inventors: Tadao Ookawa, Mitsuru Honjo, Daisuke Yamauchi
  • Publication number: 20130280955
    Abstract: An electrical connector includes a circuit board having an internal ground plane that defines at least a portion of an internal layer of the circuit board. The circuit board has an exterior side that includes a mounting region and includes electrical contacts arranged on the exterior side within the mounting region for making electrical connection with corresponding signal conductors of electrical wires. Ground shields are mounted to the mounting region of the circuit board and include electrically conductive bodies that are configured to extend over corresponding electrical wires along the mounting region of the circuit board. The bodies of the ground shields include side segments that are configured to extend between the signal conductors of adjacent electrical wires along the mounting region of the circuit board. The bodies are engaged with the internal ground plane of the circuit board to electrically connect the ground shields to the internal ground plane.
    Type: Application
    Filed: April 24, 2012
    Publication date: October 24, 2013
    Applicant: TYCO ELECTRONICS CORPORATION
    Inventors: WAYNE STEWART ALDEN, III, JEFFERY W. MASON
  • Publication number: 20130278842
    Abstract: According to one embodiment, an electronic apparatus includes a board, a first electronic component on the board, a second electronic component on the board, and a fixing member between the first and second electronic components. The second electronic component is designed to produce less heat than the first electronic component. The fixing member is configured to secure the board to a part.
    Type: Application
    Filed: January 7, 2013
    Publication date: October 24, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kota TOKUDA, Nobuhiro YAMAMOTO, Tsuyoshi KOZAI
  • Publication number: 20130279125
    Abstract: Provided are systems and methods for a control assembly including: a first film that is in-molded that includes decorative graphics, a front surface and a rear surface; and a second film molded to the rear surface of the first film having a printed circuit that includes sensors, control circuits and interconnects and a front and rear surface; and an internal connector.
    Type: Application
    Filed: June 18, 2013
    Publication date: October 24, 2013
    Inventor: Scott Moncrieff
  • Publication number: 20130278549
    Abstract: A display device is provided with a laminated wiring including a low-resistance conductive film, a low-reflection film mainly containing Al and functioning as a reflection preventing film, and a cap film which are sequentially laminated on a transparent substrate, and an insulting film formed so as to cover the laminated wiring.
    Type: Application
    Filed: March 8, 2013
    Publication date: October 24, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masami HAYASHI, Kenichi MIYAMOTO, Nobuaki ISHIGA, Kensuke NAGAYAMA, Naoki TSUMURA
  • Patent number: 8566773
    Abstract: An approach is provided in which a dynamic thermal relief generator retrieves a circuit board file that identifies power plane thru pin locations and a power plane layer. The dynamic thermal relief generator selects one of the power plane thru pin locations and identifies one or more electrical properties corresponding to a component assigned to the selected power plane thru pin location. As such, the dynamic thermal relief generator computes a conductive material exclusion amount based upon the identified electrical properties, which indicates an amount of area to exclude conductive material on the selected power plane layer. In turn, the dynamic thermal relief generator creates a thermal relief pattern based upon the computed conductive material exclusion amount that identifies conductive material voids on the selected power plane layer to exclude the substantially conductive material.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: October 22, 2013
    Assignee: International Business Machines Corporation
    Inventors: Michael Anthony Christo, Julio Alejandro Maldonado, Samuel Wynne Yang
  • Publication number: 20130271927
    Abstract: A mainboard is provided with a plurality of USB connectors; a switching circuit; a current limiting circuit electrically connected to the switching circuit; a power loop for supplying electrical power to the switching circuit, the current limiting circuit, and the USB connectors; and a control chip. The control chip is programmed to enable the switching circuit so that current is blocked flowing from at least one of the USB connectors to the switching circuit via the current limiting circuit when the mainboard is powering on.
    Type: Application
    Filed: April 11, 2012
    Publication date: October 17, 2013
    Inventor: Chih Ting Lu
  • Publication number: 20130271928
    Abstract: A circuit module pertaining to an embodiment of the present invention has a board, multiple electronic components, a shield member, sealing layer, and cover layer. The board has a mounting surface that includes a first area and second area in which the multiple electronic components are mounted. The shield member is constituted by conductive material and placed between the first area and second area on the mounting surface. The sealing layer has on its top surface a groove having its bottom face including an upper end face of the shield member, is formed on the mounting surface, and is constituted by an insulator that covers the multiple electronic components. The cover layer is constituted by conductive material and has a first cover part that fills the groove as well as a second cover part that covers the first cover part and sealing layer.
    Type: Application
    Filed: March 22, 2013
    Publication date: October 17, 2013
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Masaya SHIMAMURA, Eiji MUGIYA
  • Publication number: 20130271909
    Abstract: Multi-pair differential lines printed circuit board common mode filters are generally described. In one embodiment, the apparatus includes a multi-layer printed circuit board, a first signal line and a second signal line forming a first differential pair on a first layer of the printed circuit board, a second differential pair on the first layer of the printed circuit board, and a common mode filter on a second layer of the printed circuit board, the common mode filter comprising an absence of a predominantly occurring dielectric material of the printed circuit board, the common mode filter spanning an area directly below at least a portion of both the first and the second differential pairs. Other embodiments are also described and claimed.
    Type: Application
    Filed: December 19, 2011
    Publication date: October 17, 2013
    Inventors: Chung-Hao J. Chen, Dong-Ho Han, Mike Schaffer
  • Publication number: 20130271929
    Abstract: The present description relates to the field of fabricating microelectronic packages, wherein a microelectronic device may be attached to a microelectronic substrate with a compensator to control package warpage. The warpage compensator may be a low coefficient of thermal expansion material, including but not limited to silicon or a ceramic material, which is positioned on a land-side of the microelectronic device to counteract the thermal expansion effects of the microelectronic device.
    Type: Application
    Filed: November 9, 2011
    Publication date: October 17, 2013
    Inventors: Pramod Malatkar, Richard J. Harries
  • Patent number: 8559181
    Abstract: A flexible circuit comprises a folded dielectric sheet having conductive patterns on its surface(s) to which microelectronic device(s) are attached. The dielectric sheet is folded 180° about a selected axis and a bond layer joins the two halves over a portion of their respective surface areas so that a remaining portion of their areas remain unbonded and a bifurcated structure is thereby formed. Electrical contacts are provided on the unbonded or bifurcated portions of the flexible sheets. The flex may be attached to a rigid frame and provided with protective heat spreading covers. The folded flex design is particularly suitable for reel-to-reel manufacturing.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: October 15, 2013
    Assignee: Microelectronics Assembly Technologies, Inc.
    Inventors: James E. Clayton, Zakaryae Fathi
  • Patent number: 8559182
    Abstract: There is provided a device module. The device module includes: a key input portion; a display portion; a power supply portion; a circuit board, wherein the key input portion, the display portion and the power supply portion are mounted on and electrically connected to the circuit board; and a sheet member, wherein the key input portion, the display portion, the power supply portion and the circuit board are enveloped in and sealed with the sheet member.
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: October 15, 2013
    Assignee: Casio Computer Co., Ltd
    Inventor: Hiroki Ohira
  • Patent number: 8559149
    Abstract: An aircraft power distribution system is disclosed that includes a power distribution box. A generator supplies power to the power distribution box, and a load receives power from the power distribution box. The power distribution box includes a board supporting plug-in pins receiving the power. A contactor is supported by the board to selectively providing power to a secondary power distribution connector supported on the board. The board includes power traces that are run within the board to connect the plug-in pins to the secondary power distribution connector. Protection and secondary power distribution circuitry is also supported by the board and connected to the contactors and/or power traces by control traces. The power and control traces eliminate loose wiring and harnesses.
    Type: Grant
    Filed: May 5, 2008
    Date of Patent: October 15, 2013
    Assignee: Hamilton Sundstrand Corporation
    Inventors: Jeffrey T. Wavering, Francis C. Belisle, Josef Maier
  • Publication number: 20130265726
    Abstract: Provided is a printed circuit board capable of increasing an inductance value of a power pattern and a ground pattern while keeping a low electric resistance value of the power pattern and the ground pattern. The printed circuit board includes a printed wiring board including: a power layer having a power pattern formed therein; and a ground layer having a ground pattern formed therein. On the printed wiring board, an LSI as a semiconductor device and an LSI as a power supply member are mounted. The ground pattern has a first ground region that overlaps the power pattern as viewed from the direction perpendicular to the surface of the printed wiring board. In the first ground region, at least one defect portion is formed. In the first ground region, the defect portion forms a region that is narrower than the power pattern.
    Type: Application
    Filed: March 28, 2013
    Publication date: October 10, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Yusuke Murai, Sou Hoshi, Nobuaki Yamashita
  • Publication number: 20130265727
    Abstract: A many-up wiring substrate includes an insulating base substrate in which a plurality of wiring board regions are arranged in at least one of a vertical direction and a horizontal direction; a hole disposed in one main surface of the insulating base substrate, and straddling adjacent wiring board regions of the plurality of wiring board regions or straddling the wiring board regions and a dummy region; a conductor disposed on an inner surface of the hole; and a through hole disposed so as to extend from the inner surface of the hole of the wiring board regions to the other main surface of the insulating base substrate.
    Type: Application
    Filed: March 30, 2011
    Publication date: October 10, 2013
    Applicant: KYOCERA CORPORATION
    Inventor: Hiroyuki Segawa
  • Publication number: 20130258614
    Abstract: A external connecting terminal (35) includes a first interconnect layer (36A) formed of a same film as a first conductive pattern for touch position detection under an interlayer insulating film (23), and a second interconnect layer (36B) formed of a same film as a second conductive pattern for touch position detection on the interlayer insulating film (23). the first and the second interconnect layers are electrically connected to a lead line (31) at a portion overlapping the lead line (31), and electrically connected together at a portion outside the lead line (31).
    Type: Application
    Filed: December 2, 2011
    Publication date: October 3, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Katsunori Misaki
  • Publication number: 20130258612
    Abstract: A daughter circuit board of a brushless DC motor for interface signal conversion, having circuit units integrated on the daughter circuit and eight ports for communicating with a control system of a user terminal. The daughter circuit board is plugged into a motor controller for signal conversion so that the motor controller communicates with the control system of the user terminal. The eight ports include a signal input port of analog control, a signal port for activating a fan mode, signal ports of speed feedback, a reserved signal port, a port of COM, a port of DC power supply, and a R/T port.
    Type: Application
    Filed: January 8, 2013
    Publication date: October 3, 2013
    Applicant: Zhongshan Broad-Ocean Motor Co., Ltd.
    Inventors: Yong ZHAO, Xiansheng ZHANG
  • Publication number: 20130258613
    Abstract: A touch panel includes a substrate, a transparent sensor electrode pattern, a patterned compensation electrode, a passivation layer, a transparent shielding electrode and at least one connection structure. The substrate has a surface and includes a sensor region and a peripheral region. The transparent sensor electrode pattern is disposed on the surface of the substrate and in the sensor region. The patterned compensation electrode is disposed on the surface of the substrate and in the peripheral region, and the patterned compensation electrode and the transparent sensor electrode pattern are electrically isolated. The passivation layer is disposed on the surface of the substrate, covers the transparent sensor electrode pattern, and at least partially exposes the patterned compensation electrode. The transparent shielding electrode is disposed on the passivation layer.
    Type: Application
    Filed: February 24, 2013
    Publication date: October 3, 2013
    Applicant: AU OPTRONICS CORP.
    Inventors: Chia-Chun Yeh, Po-Yuan Liu, Wen-Chi Chuang, Pei-Jung Wu, Cheng-Ta Ho
  • Publication number: 20130258615
    Abstract: The invention relates to a method for producing an electronic assembly (1) having at least one electronic component (3, 4) and a shaped body (2) which at least partially surrounds the electronic component (3, 4), comprising the following steps: at least one electronic component (3, 4) is placed into an open mould (10), a first moulding material (21) and a second moulding material (22) are supplied to a cavity (13) in the mould (10), wherein the first moulding material is different from the second moulding material, and the mould (10) is closed, wherein the mould (10) is closed before or at the same time as the first and second moulding materials (21, 22) are supplied.
    Type: Application
    Filed: December 9, 2011
    Publication date: October 3, 2013
    Applicant: ROBERT BOSCH GMBH
    Inventor: Gerhard Grauf
  • Publication number: 20130258611
    Abstract: The fixing device includes a main body, at least two sliding location elements and at least one location element. The main body includes a bolting structure for bolting with a component element. The sliding location elements are disposed on one side of the main body opposite the bolting structure. Each sliding location element includes a connecting portion connected to the main body and an extending portion connected to the connecting portion. The extending portion is substantially parallel to the main body. A spacing is kept between the main body and the extending portion for clamping and fixing a printed circuit board. The at least one location element is extended from the main body and is substantially parallel to the extending portion. The at least one location element is disposed between the sliding location elements and the bolting structure for fixing the printed circuit board.
    Type: Application
    Filed: September 12, 2012
    Publication date: October 3, 2013
    Inventors: Jen-Kung LI, Wen-Lin WU
  • Publication number: 20130258610
    Abstract: Various circuit board lids and methods and using the same are disclosed. In one aspect, an apparatus is provided that includes a lid adapted to cover a semiconductor chip mounted on a circuit board. The lid has a top plate, a first support leg and a second support leg opposite the first support leg adapted to support the lid. The first and second support legs and the top plate define a recess to accommodate the semiconductor chip. The recess has a first opening and a second opening. At least one of the first and second openings extends from the first support leg to the second support leg.
    Type: Application
    Filed: March 29, 2012
    Publication date: October 3, 2013
    Inventors: Jianguo Li, Neil McLellan, Yip Seng Low
  • Patent number: 8546696
    Abstract: A printed circuit board having a connection terminal which includes: an insulating substrate including first and second surfaces, and an end surface along an outline normal to an insertion direction of the connection terminal; at least one lead wiring layer formed on the first surface of the insulating substrate; an insulating protection film covering the lead wiring layer; at least one lead terminal layer constituting an end portion of the lead wiring layer, the lead terminal layer being formed into a strip, and having an end surface along the outline; a reinforcement body adhered on the second surface of the insulating substrate at a backside position of the lead terminal layer; wherein a distance between an outer surface of the lead terminal layer and an outer surface of the reinforcement body on the outline side is smaller than a distance therebetween on the lead wiring layer side.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: October 1, 2013
    Assignee: Fujikura Ltd.
    Inventor: Hirohito Watanabe
  • Patent number: 8547704
    Abstract: A button structure and an electronic device using the same are provided. The button structure is disposed on a casing and comprises an elastic element and a button. The elastic element comprises a first support portion, a second support portion and a carrying portion. The carrying portion is connected between the first support portion and the second support portion. The first support portion and the second support portion lean on the casing. The button is disposed on the carrying portion.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: October 1, 2013
    Assignee: Inventec Corporation
    Inventor: Ting-Chang Kuo
  • Publication number: 20130250526
    Abstract: An electronic device includes a front cover, a rear cover coupled to the front cover, a circuit board fixed to the front cover, a connector mounted on the circuit board, and a cable including a first end connected to the connector and an opposite, second end. The front cover defines a receiving groove. A bottom of the receiving groove defines a through opening and a restriction element protruding from the bottom of the receiving groove. A smallest distance between a sidewall of the receiving groove and the restriction element is smaller than a diameter of the cable. The second end of the cable passes through the through opening from an inner side of the front cover, and the cable is retainably received in a space between the sidewall and the restriction element.
    Type: Application
    Filed: February 26, 2013
    Publication date: September 26, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD
    Inventors: PING LI, XUE-FENG WAN
  • Publication number: 20130250527
    Abstract: An electronic device is provided wherein the characteristics thereof are prevented from deteriorating. The electronic device (1) is provided with: a chip component (2) having an electronic element (22); a wiring board (3) on which the chip component (2) is mounted with a space therebetween, the space for containing the electronic element (22); a resin layer (4) provided from the surface of the chip component (2) to the surface of the wiring board (3) so as to surround the space; and an inorganic insulating layer (5), which is provided at the resin layer (4) and is positioned at the side of the space. Since entry of water vapor into the space can be reduced not only by means of the resin layer (4) but also by means of the inorganic insulating layer (5), the electronic device (1) having high airtight sealing performance can be provided.
    Type: Application
    Filed: October 25, 2011
    Publication date: September 26, 2013
    Applicant: KYOCERA CORPORATION
    Inventors: Hidefumi Hatanaka, Katsura Hayashi
  • Publication number: 20130250528
    Abstract: A circuit module provided with an auxiliary substrate includes a structure in which electronic components are mounted on a circuit substrate arranged at a bottom, an insulating resin covering the electronic components is defined so as to be higher than the electronic components, and the auxiliary substrate is arranged on the insulating resin. As a result, there has been a problem in that the height of the circuit module is increased. The circuit module is defined such that at least one of the electronic components is in contact with the auxiliary substrate.
    Type: Application
    Filed: May 24, 2013
    Publication date: September 26, 2013
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventor: Takayuki HORIBE