Abstract: Disclosed herein is a computer-implemented defect prediction method for a device manufacturing process involving processing a pattern onto a substrate, the method comprising: identifying a processing window limiting pattern (PWLP) from the pattern; determining a processing parameter under which the PWLP is processed; and determining or predicting, using the processing parameter, existence, probability of existence, a characteristic, or a combination thereof, of a defect produced from the PWLP with the device manufacturing process.

Abstract: In at least one embodiment, an apparatus for performing a high voltage (HV) short circuit diagnosis and an impedance analysis for a vehicle is provided. The apparatus includes a controller configured to measure a first voltage associated with a battery and a first current that varies based on a HV power net during the pre-charge operation and to perform the short circuit diagnosis based on the first voltage and the first current. The controller is further configured to determine a difference between the first voltage and a pre-charge voltage across one of a capacitor and the HV power net and to measure a second current based at least on the difference. The controller is further configured to perform the impedance analysis for the vehicle based on the second current.

Abstract: A method in a wireless communication device includes detecting, with one or more control circuits actuation of the user interface actuator. The one or more control circuit can then determine whether the wireless communication device is disposed at a first predefined location, such as a first receiver of a wireless communication device accessory or a second predefined location. Where the wireless communication device is disposed at the first predefined location, the one or more control circuits can cause a wireless communication circuit to enter a first mode of operation, which can be a searching pairing mode of operation. Where the wireless communication device is disposed at the second predefined location, the one or more control circuits can cause the wireless communication circuit to enter a second mode of operation, which can be a listening pairing mode of operation.

Abstract: An integrated circuit (IC) design method is disclosed. The method includes: using a computer to perform synthesis upon a register transfer level (RTL) IC design to generate a gate level netlist; performing place and route (P&R) upon the gate level netlist to generate a layout; determining a sink current distribution information of the layout; and generating a voltage (IR) drop/electro-migration (EM) analysis result of the layout according to the sink current distribution information; wherein the layout includes a cell having a cell height that is N times higher than a single cell height, where N is an integer and greater than 1, and the cell corresponds to N power/ground (P/G) rail sets; wherein the sink current distribution information includes a proportion of a sink current flowing through each of the N power/ground (P/G) rail sets with respect to the cell when operated. Associated non-transitory computer-readable medium is also disclosed.

Abstract: A burn-in test process is omitted for some or all lots. In burn-in necessity determination processing, whether each semiconductor chip requires a burn-in test to be performed is determined based on measurement data obtained in a probe test process. In an assembly process, based on the results of determination made in the burn-in necessity determination processing, the assembled packages are sorted into a first lot which includes packages each including a semiconductor chip determined to require a burn-in test to be performed and a second lot which includes packages each including a semiconductor chip determined to require no burn-in test to be performed. In a burn-in test process, only the packages of the first lot are subjected to a burn-in test.

Abstract: Automated test procedures, carried out under software control, can be employed to test a device, testing individual pins, and/or groups of pins, to detect and diagnose or characterize various types of failures. A distributed FA system includes a shared database for device definitions, test setups, and test results. Test platforms provide I/O curve tracing which can provide both a qualitative visual representation and a quantitative measured performance. The disclosed system enables and exploits front line testing of devices in the field. Response to the customer can be nearly immediate. Eliminate “false returns” by differentiation of use versus a real quality issue.

Abstract: Provided is a semiconductor inspection circuit which is capable of inspecting connection states of power supply, ground, and signal bumps in a semiconductor package or a printed circuit board equipped with a semiconductor LSI mounted in a product operation state. As a means to solve the problem, a circuit capable of switching a path is provided at an input portion of a driver/receiver, a mechanism capable of transferring an output of a path switching circuit near a receiver circuit to a voltage waveform circuit with an internal variable terminal is provided, and a breakage state of a bump can be observed in the product operation state by observing a DC level at a terminal having a certain DC resistance when a signal bump connection state is observed and receiving a step wave and observing a response waveform thereof when an IO power supply bump connection state is observed.

Abstract: An active device array substrate is provided. The active device array substrate includes multiple pixel structures, a drive circuit, multiple signal lines and a control line. The pixel structures are disposed in a display area. The drive circuit is disposed outside the display area. The signal lines are electrically connected to the drive circuit and the pixel structures corresponded to the signal lines. The control lines are intersected with the signal lines. A method adapted for inspecting defects on the active device array substrate is also provided. First, a tested signal line is selected from the signal lines, and the control line and the tested-signal line are conducted. Second, a test signal is input from the control line to the tested-signal line to determine a location of a defect. Finally, the control line and the tested signal line are isolated.

Abstract: A method of determining a communication time delay in a communication network between a local terminal and one or more remote terminals within an electrical power network includes: selecting, in respect of the or each remote terminal a calculation node in the electrical power network; calculating respective node currents flowing into the corresponding calculation node from the local terminal and the or each remote terminal; equating, in respect of the or each remote terminal, a sum of node currents flowing into the corresponding calculation node to zero according to Kirchhoff's first law; and extracting, in respect of the or each remote terminal, a communication time delay between the local terminal and the said respective remote terminal from a corresponding equated sum of node currents.

Abstract: A signage display system for an aircraft includes a controller for receiving input and generating a command, a central controller connected to the controller, the central controller receiving the command and generating a display signal responsive to the command, at least one peripheral device connected to the central controller, the peripheral device receiving the display signal prompting the device to display safety information, an input associated with the peripheral device for receiving an acknowledgement of the safety information and generating an acknowledgement signal responsive to the acknowledgement, such that display of the safety information is discontinued in response to receipt of the acknowledgement. A method and set of instructions also are provided.

Abstract: A product inspection device that includes a measuring section, a deemed standard deviation calculation unit, a measurement value standard deviation calculation unit, a determination unit, and a risk calculation unit. The measuring section measures characteristic values of products, the deemed standard deviation calculation unit calculates a deemed standard deviation, and the risk calculation unit calculates a consumer risk and a producer risk based on at least one of an average value of the measured characteristic values of some of the products contained in a measured product lot, the deemed standard deviation, or the measurement value standard deviation. The determination unit changes a inspection standard based on at least one of the calculated consumer risk or the calculated producer risk, and determines whether or not all the products contained in the product lot are non-defective articles with the changed inspection standard as a reference.

Abstract: A single-ended test probe includes a probe body such as a coaxial cable, a signal tip integral with the core (signal conductor), to ground arm having a ground tip and mounted to the coaxial cable, and an electrically conductive ground member projecting outside the coaxial cable and electrically conductively connecting the ground arm to the shield (ground conductor) of the coaxial cable. The ground member may be located closer to the end of the cable than the location at which the ground arm is mounted to the cable to minimize inductance in the connection between the probe and a device under test. The ground member may also be a cam by which the span between the ground and signal tips can be adjusted. Also, the test probe may include a second ground arm that is detachable connectable to the probe body independently of the first.

Abstract: Systems and methods for semiconductor design evaluation. IC layout information of a circuit design is received, and the circuit design is decomposed into smaller circuit pieces. Each circuit piece has IC layout information and a netlist. For each circuit piece, a set of strike models is selected based on the layout information and the net-list of the circuit piece and received radiation environment information. Each strike model has circuit components with voltage values corresponding to a respective particle strike. For each selected strike model of a circuit piece: a radiation susceptibility metric is determined by comparing functional results of simulation of the of the strike model with functional results of simulation of the circuit piece. For each circuit piece, a radiation susceptibility metric is determined based on the radiation susceptibility metrics generated for each selected strike model of the circuit piece.

Abstract: A method detects electromigration in a field replaceable unit. An integrated circuit, which is within a field replaceable unit (FRU) in an electronic device, is quiescented. An isolation power switch applies a test voltage from a field power source to a target voltage rail in the integrated circuit. An isolation power switch isolates the target voltage rail from the field power source. A voltage sensor coupled to the target voltage rail measures a field voltage decay rate for the target voltage rail. A voltage record comparator logic within the integrated circuit compares the field voltage decay rate to an initial voltage decay rate for the target voltage rail. In response to a difference between the field voltage decay rate and the initial voltage decay rate for the target voltage rail exceeding a predetermined limit, a signal is sent to an output device.

Abstract: Various particular embodiments include a via testing structure, including: a first terminal coupled to a first set of sensing lines in a top level of the structure; a second terminal coupled to a second set of sensing lines in the top level of the structure, wherein first set of sensing lines and the second set of sensing lines are disposed in a comb arrangement; a third terminal coupled to a third set of sensing lines in a bottom level of the structure; and a plurality of vias electrically coupling the second set of sensing lines in the top level of the structure to the third set of sensing lines in the bottom level of the structure, each via having a via top and a via bottom.

Abstract: A two dimensional array of digital imaging pixels each include a photo-sensing element and a readout element. A test element within the two-dimensional array, a column of test elements peripheral to the array, or test monitoring circuits peripheral to the array are constructed using the same process as the readout elements. The test element within the array and the column of test elements are connected to a first and second external voltage sources. The test element within the two-dimensional array and the column of test elements may be connected to a test data line or to a data line used by the imaging pixels.

Abstract: A system and method are disclosed for measuring latency in a device which includes a user interface that receives user input and provides output in response. In an embodiment, a body separate from the device under test is provided. A first sensor operatively attached to the body detects a touch event input to the device at a first time and a second sensor detects a response output from the device at a second time. A computational engine computes a time differential between the first time and the second time and an output outputs an indication of a measurement of latency in the device, the measurement being reflective of the time differential between the first time and the second time.

Abstract: A photovoltaic inspection system is provided, the photovoltaic inspection system detecting a failure by eliminating ON/OFF operation of a switch or others at the time of inspection or checkup as much as possible, reducing an influence of a temperature distribution as a whole with a small effort, and detecting a local deterioration in a photovoltaic module or string.

Abstract: A method and apparatus for testing a duct leak detection system of an aircraft is disclosed. A sensor of the duct leak detection system is selected at an interface of the duct leak detection system. An alternating current is sent through the selected sensor and a resistance of the selected sensor is measured using the alternating current. An indicative signal is generated at the interface when the measured resistance of the selected sensor is outside of a specification of the selected sensor.

Abstract: A negative voltage testing including a monitoring and triggering circuit coupled to a supply voltage rail of a device under test (DUT) and a switching circuit coupled to the monitoring and triggering circuit. The monitoring and triggering circuit is configured to cause the switching circuit to provide a first negative voltage to the supply voltage rail when a supply voltage on the supply voltage rail decays below a predetermined level during a first test of the DUT.

Abstract: A testing device includes a base body, a holder, an electrically conductive plate, plural testing probes and plural insulation structures. The testing device of the present invention uses the electrically conductive plate to replace the plastic plate of the conventional testing device. Consequently, the electrostatic discharge effect is avoided. Moreover, the insulation structure is arranged between the testing probe and the electrically conductive plate to separate the testing probe from the electrically conductive plate so as to avoid the electric leakage problem. Consequently, the testing device of the present invention is capable of avoiding the electrostatic discharge effect without causing damage of the under-test object and reducing the measurement accuracy.

Abstract: Project modeling is conducted using variable defect arrival rate or variable defect rate density parameters. These defect rates may be updated on an iteration by iteration basis and may be used to provide remediation and further project modeling, remediation, and prediction.

Abstract: A motor driving device includes: a converter that converts AC power into DC power; a DC link capacitor provided for the DC link; an inverter that converts DC power into AC power for a motor; an initial charging circuit that charges the DC link capacitor; a potential difference determination unit that determines a potential difference between both ends of the initial charging circuit; a direct current detecting unit that detects direct current supplied to the initial charging circuit; an alternating current detecting unit that detects alternating current supplied to a motor; and an abnormality determination unit that determines that abnormal heat generation occurs in the initial charging circuit when the alternating current detecting unit detects alternating current and the direct current detecting unit detects direct current, in a case in which a potential difference occurs between both of the ends of the initial charging circuit.

Abstract: An embodiment method includes providing a standardized testing structure design for a chip-on-wafer (CoW) structure, wherein the standardized testing structure design comprises placing a testing structure in a pre-selected area a top die in the CoW structure, and electrically testing a plurality of microbumps in the CoW structure by applying a universal testing probe card to the testing structure.

Abstract: A probe device includes an electrode plate arranged above a mounting table for mounting thereon a semiconductor wafer and electrically connected to a tester, a contact probe arranged at a side of the mounting table and electrically connected to a mounting table electrode of the mounting table. The contact probe includes a contact portion, having a top surface formed uneven, to be in contact with the electrode plate, and a cable connection portion formed as one unit with the contact portion. The contact portion and the cable connection portion are vertically movable by a biasing member provided below the cable connection portion. When the probes are made contact with electrodes of a semiconductor device of the semiconductor wafer by moving up the mounting table, the contact portion and the electrode plate are made contact with each other and the backside electrode and the tester are electrically connected to each other.

Abstract: The present invention is directed, in part, to electrical components and methods of use associated with such components. In particular, the invention relates to an electrical device and improved method of back feeding energy generated from alternative energy devices such as solar panels, wind turbines, fuel cells, electrical generators and other alternative energy sources, to the utility without the necessity of installing a sub panel or replacing an existing panel, resulting in significant cost savings for the user and increased electrical energy available to the power grid. The invention further discloses installation of a back feed circuit breaker into an existing main panel and main circuit breaker thus, eliminating the need of a home owner to completely reinstall a new electrical system in order to install alternative energy sources such as for example, solar panels and the like.

Abstract: The application provides a device for measuring at least one parameter value of a suspended sediment of a fluid. The device includes a backscattering transducer module, a storage unit, and a calculation unit. The backscattering transducer module comprises a source module and a receiver module. The source module transmits at least three acoustic signals with different fixed characterizing measurement frequencies while the receiver module measures at least three echo level values of echo signals, which correspond with the at least three acoustic signals. The storage unit stores a data set of pre-determined echo level values with a data set of pre-determined suspended sediment parameter values. The calculation unit derives at least one suspended sediment parameter value from the data sets and the at least three echo level values.

Abstract: A power circuit abnormality detection method for a power circuit detects whether an abnormality in a power source relay exists. The power circuit includes a pre-charge circuit opening and closing a connection between a direct current power source and a smoothing condenser by bypassing the power source relay to pre-charge the smoothing condenser, and a discharge circuit connected in parallel to the smoothing condenser to discharge electric charges stored in the smoothing condenser via a discharge resistance when a discharge switch is closed. The power circuit abnormality detection method includes a step of detecting whether the open contact abnormality in the power source relay exists based on whether a charge voltage of the smoothing condenser is reduced when a predetermined period of time has elapsed since both the discharge circuit and the power source relay are closed after the pre-charge circuit is opened.

Abstract: A flow measurement device includes a first sensor device that responds to stimulus from fluid medium flowing through a measurement section by registering a measure representing a physical characteristic, a processor, and a data storage including a look-up table containing a first collection of values representing a first value of flow of a first fluid or a first value of flow of a second fluid, and a second look-up table containing a second collection of the values representing a second value of the flow of the first fluid or a second value of the flow of the second fluid, the processor receiving the measures registered during a measurement time interval and estimating a flow pattern of the fluid medium during the measurement interval where the flow pattern describes how the first and second fluids are distributed in the measurement section over the measurement time interval.

Abstract: A flow measuring device includes a first sensor device that responds to one stimulus caused by a fluid medium flowing through a measurement section by registering a first measure representing a first type of physical characteristic of the fluid medium, and a second sensor device that responds to another stimulus caused by the fluid medium by registering a second measure representing a second type of physical characteristic of the fluid medium, the second measure being independent from the first measure, and the first and second measures both being dependent on the flow of the first fluid and on the flow of the second fluid in the fluid medium in the measurement section, the first measure and the second measure being sufficient to solve both a first function that defines the flow of the first fluid and a second function that defines the flow of the second fluid.

Abstract: A structure and method of testing degradation of semiconductor devices by stressing an array of several semiconductor devices at the same time and measuring the resulting degradation separately for each individual device to obtain an estimate of its expected lifetime is provided. The devices may be subjected to stress that is either in a pulsed state or in a DC state. An on-chip pulse generator may be used for stressing in the pulsed state.

Abstract: An apparatus for testing an arc fault circuit interrupter includes an AC signal generator circuit configured to be capacitively coupled to an AC power line and to induce an AC signal thereon and a control circuit configured to control the AC signal generator circuit to selectively enable and disable generation of the AC signal responsive to a waveform of an AC power voltage of the AC power line.

Abstract: A method of preventive detection of a fault in at least one device under surveillance of a group comprising at least two devices, the device under surveillance having at least one first parameter correlated with at least one second parameter of at least one second device in the group, said parameters representing state variables of said devices. The method includes the following steps: predicting a value of the first parameter from a measured value of the second parameter; comparing the predicted value of the first parameter and a measured value of the first parameter; and analyzing the result of the comparison effected in the comparison step to detect a potential fault. The invention also relates to a computer program, an installation, and a module for preventive detection of a fault in a device.

Abstract: The invention relates to an input module (32) for a programmable logic controller able to be connected to a plurality of elements of an automated chain, the module (32) comprising: inputs (32A, 32B), each input (32A, 32B) being able to receive the signal from at least one element of the plurality of elements, interfaces (40A, 40B), each interface (40A, 40B) being associated with a single input and comprising at least one output (40A6, 40B6) able to operate in three different states, a test block (42), and a processing sub-module (24) able to compare the state of the output (40A6, 40B6) of each interface (40A, 40B) with the state imposed by the test block (42) and to deduce an operating anomaly of the module (32, 34) therefrom.

Abstract: Active surveillance of potential lead anomalies in implanted medical leads utilizes test signal(s) delivered through an output current pathway and induced signals monitored via an independent monitor current pathway to detect for any reactions to the test signals in the induced signals. Various specific responses can be initiated if a potential insulation breach or anomaly in the implanted medical lead is identified due to detection of a “positive” test result in the induced signals on the monitor current pathway in reaction to a test signal applied to the output current pathway.

Abstract: A semiconductor memory device according to an embodiment comprises: a memory cell array, the memory cell array including a memory block, the memory block including a memory cell, the memory cell including a semiconductor layer, a conductive layer, and a charge accumulation layer, the charge accumulation layer being disposed between the semiconductor layer and the conductive layer; and a control circuit that executes an access operation on the memory cell, the control circuit, triggered by the access operation, detecting a leak current of the conductive layer, and when the leak current is a certain value or more, executing a faulty memory block processing that registers as an access-prohibited region the memory block including the conductive layer.

Abstract: An integrated circuit package is presented. In an embodiment, the integrated circuit package has contact pads formed on the top side of a package substrate, a die electrically attached to the contact pads, and input/output (I/O) pads formed on the top side of the package substrate. The I/O pads are electrically connected to the contact pads. The integrated circuit package also includes a flex cable receptacle electrically connected to the I/O pads on the top side of the package substrate. The flex cable receptacle is non-compressively attachable to a flex cable connector and includes receptacle connection pins electrically connected to the I/O pads.

Abstract: A compatibility indication system includes a connectable module that includes a first connector and a first wireless communication device that is configured to transmit connectable module information. A computing system includes a second connector and a second wireless communication device that is configured to receive the connectable module information when the connectable module is located adjacent the second connector. A compatibility engine in the computing system is coupled to the second wireless communication device and configured to receive the connectable module information, determine a compatibility level of the connectable module, and activate a warning that is based on the compatibility level before the first connector on the connectable module is connected to the second connector on the computing system.

Abstract: Methods and articles of manufacture for hosting a safety critical application on an uncontrolled data processing device are provided. Various combinations of installation, functional, host integrity, coexistence, interoperability, power management, and environment checks are performed at various times to determine if the safety critical application operates properly on the device. The operation of the SCA on the UDPD may be controlled accordingly.

Abstract: Embodiments of the present invention provide methods, program products, and systems for testing a memory cell arrangement. Embodiments of the present invention can determine categories of memory fail conditions by checking memory cells of with a sequence of test parameter configurations for a malfunction using test parameters, storing for test parameter configurations for which a malfunction is detected, and assigning the respective test parameter configuration with a bit fail count comprising the number of malfunctioning memory cells. Embodiments of the present invention can be used to create a relational data structure representing test parameter configurations and can combine one or more test parameter configurations and can create a representation of the bit fail counts of the respective test parameter configurations.

Abstract: A touch panel includes electrode lines and a detecting circuit. The detecting circuit includes driving units and detecting units. The driving units are configured to sequentially output driving signals to the electrodes lines according to a first clock signal, so as to change the voltage levels of the electrode lines. Two ends of each of the electrode lines are respectively coupled to a driving unit and a corresponding detecting unit. The detecting units are configured to sequentially scan the voltage levels of the electrode lines according to a second clock signal and to output scan signals, in which the first clock signal and the second clock signal have different frequencies. The detecting circuit generates a detecting signal according to the scan signals.

Abstract: A method and electronic device for identifying when to replace/clean a probe card or socket are provided. The method includes receiving an ID of the probe card or socket from a tag associated with the probe card or socket before performing an insertion on a test system. For the received ID, there is determined a count of insertions performed on the probe card, and an indication to replace/clean the probe card or socket is generated when the count of insertions equals the threshold value.

Abstract: A semiconductor device operates with electric power supplied from a direct-current power supply to an internal circuit in a state where a bypass capacitor is connected to a power supply terminal. The semiconductor device includes a load current control unit and a detection unit. The load current control unit changes an electric current supplied from the power supply terminal only in a predetermined operation period. The detection unit detects a voltage of the power supply terminal. The detection unit outputs a detection signal when the voltage is higher than a threshold upper limit in a case of being provided with the threshold upper limit. Alternatively, the detection unit outputs a detection signal when the voltage is lower than a threshold lower limit in a case of being provided with the threshold lower limit.

Abstract: Some forms relate to an electronic assembly that includes a plurality of electronic package. The electronic assembly includes a frame and a first electronic package mounted on the frame. The first electronic package includes a first pin grid array. The electronic assembly further includes a second electronic package mounted on the frame. The second electronic package includes a second pin grid array. The electronic assembly further includes an actuation mechanism on the frame. The actuation mechanism is configured to move the first electronic package and the second electronic package relative to the frame during operation of the actuation mechanism.

Abstract: A saturation edge detection circuit for testing a saturation level in an insulated gate bipolar transistor (“IGBT”) includes a first input operable to receive an on signal, a second input coupled to an IGBT driver circuit, and an output coupled to a control electrode of the IGBT. The output indicates a change in a state of a saturation voltage associated with the IGBT during operation of the IGBT.

Abstract: A semiconductor device may include a semiconductor substrate; a test circuit array region; a pad region on the semiconductor substrate and at at least a first side of the test circuit array region and outside of the test circuit array region, transistors arranged in the test circuit array region in a first direction and a second direction perpendicular to the first direction, source lines spaced apart from each other in the second direction, each of the source lines extending in the first direction and electrically connected to corresponding source electrodes of the transistors, and drain lines spaced apart from each other in the second direction, each of the drain lines extending in the first direction and electrically connected to drain electrodes of the transistors.

Abstract: Provided are a tester configured to test a semiconductor device and a test system including the same. The tester may include at least one contact unit and at least one memory controller. The contact unit is in contact with the semiconductor device. The memory controller is connected to the contact unit. The memory controller controls data input/output (I/O) operations of the semiconductor device and tests the semiconductor device.

Abstract: Methods and articles of manufacture for hosting a safety critical application on an uncontrolled data processing device are provided. Various combinations of installation, functional, host integrity, coexistence, interoperability, power management, and environment checks are performed at various times to determine if the safety critical application operates properly on the device. The operation of the SCA on the UDPD may be controlled accordingly.

Abstract: An inspection apparatus for inspecting an inspection object. The inspection object includes a base body and wiring passing through the base body. The inspection apparatus includes an insulating substrate, a first electrode in the substrate with a portion of the first electrode exposed from a surface of the substrate to form a connection portion which may be electrically connected with the wiring, and a second electrode in the substrate. The first electrode and the second electrode are spaced apart, have mutually parallel portions, and are electrically insulated from each other.

Abstract: Methods and articles of manufacture for hosting a safety critical application on an uncontrolled data processing device are provided. Various combinations of installation, functional, host integrity, coexistence, interoperability, power management, and environment checks are performed at various times to determine if the safety critical application operates properly on the device. The operation of the SCA on the UDPD may be controlled accordingly.