Abstract: A method of measuring a parameter of a device in a circuit includes providing a device under test (DUT). The DUT includes a metal oxide semiconductor (MOS) transistor having a gate, a source, and a drain coupled to a first voltage supply node. The method further includes coupling a constant current source to the source of the transistor, coupling an operational amplifier to the transistor, and measuring a parameter of the transistor.

Abstract: In order to detect the current state of a system component, e.g. to display whether an electrical conductor, a cable or the like, is currently live, a field generator that generates a magnetic field in the environment of the system part is provided, which generator is connected to an organic magnetoresistive OMR semiconductor element that is arranged stationary in the environment of the system component to be monitored, and a voltage source for generating an electrical voltage between two electrodes of the OMR semiconductor element is provided. The device and the method can be fitted in a simple manner and cost-effectively to almost any system part, even at a later stage to already existing systems. A corresponding display shows the desired information locally limited and in the simplest manner: if the electric conductor is currently energized, an additional evaluation is not necessary.

Abstract: An electronic component includes an oscillator element, a driving circuit outputting a driving signal to the oscillator element, a clock frequency generator outputting a clock signal to the driving circuit, a clock frequency controller controlling a frequency of the clock signal, a consumption-current detection unit detecting a consumption current of the driving circuit, and a fault detection unit electrically connected to the consumption-current detection unit and the clock frequency controller. When the clock frequency controller changes the frequency of the clock signal, the detected consumption current changes, and allows the consumption-current detection unit to detect the change of the consumption current. The fault detection unit detects a fault based on the change of the frequency of the clock signal and the change of the consumption current. This electronic component can have a fault detection function and a small size.

Abstract: A plurality of assembly sheets are placed on an upper surface of a substrate adsorption platform, and a pressing plate is placed on the plurality of assembly sheets placed on the substrate adsorption platform such that the plurality of assembly sheets are pressed by the pressing plate. In this state, a DC power supply device is turned on and causes the upper surface of the substrate adsorption platform to be charged, thereby causing the plurality of assembly sheets to be adsorbed on the upper surface by an electrostatic force. Then, the pressing plate placed on the plurality of assembly sheets is removed while the upper surface of the substrate adsorption platform is charged, and automatic appearance inspection is performed on the plurality of assembly sheets adsorbed on the upper surface of the substrate adsorption platform.

Abstract: A system and method for testing multiple-input-multiple-output (MIMO) devices under test (DUTs) with multiple radio frequency (RF) signal testers. Each tester receives one or more RF signals from one or more of the DUTs, and the testers are mutually coupled in a ring such that successive ones receive a trigger input signal from an upstream tester and provide a trigger output signal to a downstream tester. Each tester is responsive to its input trigger signal and its one or more RF signals by providing its output trigger signal such that its output trigger signal has an asserted state initiated in response to an assertion of its input trigger signal and a transcending of a predetermined magnitude by at least one of the one or more RF signals.

Abstract: Provided are a first test substrate and a second test substrate opposing each other, a first test circuit testing a device under test and being disposed on a face of the first test substrate that faces the second test substrate, a second test circuit testing the device under test and being disposed on a face of the second test substrate that faces the first test substrate, and a sealing section that is formed by sealing a space between the first test substrate and the second test substrate to enclose the first test circuit and the second test circuit in a common space that is filled with coolant.

Abstract: An ESD monitor device may take the form of an integrated circuit with a plurality of monitor components available at each I/O site of the ESD monitor device. Each monitor component has a physical structure which provides scalable ESD robustness. The monitor components are connected in parallel to an ESD bus. An integrated circuit may be formed by processing an ESD monitor device through one or more process steps of an integrated circuit manufacturing line, and subsequently measuring the ESD monitor device. Parameters of a process step of the manufacturing line may be adjusted to reduce ESD events at the process step, based on measurement results from the ESD monitor device. The integrated circuit may subsequently be processed through the adjusted process step.

Abstract: A sensor system includes a sensor device and a cover device. The sensor device includes an external surface on which at least one electrical test contact is arranged. The cover device includes at least partially an electrically insulating material and is mechanically connected to the sensor device. The cover device is configured to cover the at least one electrical test contact of the sensor device so as to prevent contact from being made to the at least one electrical test contact from outside the sensor system.

Abstract: An apparatus and method for determining a status of a power unit in a portable terminal are provided. The apparatus includes a power unit for supplying power to a internal circuit, a resistor located between the power unit and the internal circuit, and a voltage determination unit for determining an amount of a current consumption by the internal circuit by considering a difference between a first voltage between the power unit and the resistor and a second voltage between the resistor and the internal circuit, and for determining status information of the power unit by compensating for a voltage drop of the first voltage in accordance with the amount of the current consumption.

Abstract: A monitoring circuit and a monitoring system for electrostatic discharge (ESD) protective device are disclosed herein. The monitoring circuit includes an oscillating unit, a signal processing unit and a comparator. The oscillating unit includes a first monitoring end and a second monitoring end. The first monitoring end is configured to be electrically connected to an ESD protective device. The second monitoring end is configured to be electrically connected to ground. When the first monitoring end is not electrically contacted to a user's body or the second monitoring end is not connected to ground, the oscillating unit is configured to output an oscillating signal. The signal processing unit is electrically connected to the oscillating unit, and is configured to output a first voltage according to the oscillating signal. The comparator is configured to compare the first voltage and a reference voltage, and correspondingly output an alarm signal.

Abstract: The present invention relates to a measurement system for characterising a device under test (DUT) wherein impedance is controlled or varied over a set of measurement conditions and a parameter or a set of parameters measured for each measurement condition. The measurement system comprises at least one impedance control device, signal separation hardware connected with the impedance control device, receiving means for measuring electrical quantities related to characteristics of the DUT and for converting the measured electrical quantities, a data processing unit connected to the receiving means and adapted to provide characteristics of the device under test based on the converted electrical quantities, whereby the at least one impedance control device is integrated into the signal separation hardware.

Abstract: Test structures for simultaneously testing for electromigration or stress migration fails and time dependent dielectric breakdown fails in integrated circuits, test circuits using four test structures arranged as a bridge balance circuit and methods of testing using the test circuits. The electromigration or stress migration portions of the test structures include via chains of wire segments connected in series by electrically conductive vias, the wire segments formed in at least two adjacent wiring levels of an integrated circuit. The time dependent dielectric breakdown portions of the test structures include digitized wire structures in one of the at least two adjacent wiring levels adjacent to a less than whole portion of the wire segments in the same wiring level as the digitized wire structures.

Abstract: Disclosed are embodiments of an integrated circuit chip designed for reliability at low ambient temperatures. The chip substrate can be divided into zones, including at least one temperature-sensitive zone (TSZ) that contains one or more temperature-sensitive circuits. Temperature sensor(s) can be positioned in the semiconductor substrate adjacent to the TSZ. Thermal radiator(s) can be embedded in a metal wiring layer and aligned above the TSZ. The temperature sensor(s) can be operatively connected to the thermal radiator(s) and can trigger operation of the thermal radiator(s) when the temperature in the TSZ is below a predetermined threshold temperature. Additionally, an on-chip power control system can be operatively connected to the thermal radiator(s) so that operation of the thermal radiator(s) is only triggered when a circuit within the TSZ is about to be powered up. Also disclosed are associated embodiments of a system and method for designing such an integrated circuit chip.

Abstract: A method for producing an arc detection signal on the basis of a plurality of observation signals comprises producing an arc detection part-signal for each of at least two observation signals. Producing each of the part-signals includes correlating the respective observation signal with a correlation signal by influencing the correlation signal with the respective observation, thereby producing a correlation result; producing or modifying a coefficient on the basis of the correlation result; and weighting the respective observation signal with the coefficient. The arc detection part-signals are added to form the arc detection signal.

Abstract: A contactor is brought into contact with and separated from an electrode formed on a test target, and includes an elastic member that overlaps with a conductive member having a contact and which urges the contact in a pressing direction. The elastic member is fixed at a predetermined fixed position in a state projecting to the outside of a main body member and the conductive member is electrically connected from the outside of a housing of the main body member of the contactor.

Abstract: A method of detecting a short circuit affecting a sensor, at least one terminal of the sensor being connected to a bias resistor, includes: applying to at least one bias resistor at least one test bias voltage having at least one predefined characteristic that is different from a corresponding characteristic of a nominal bias voltage of the resistor; measuring a resulting differential voltage across the terminals of the sensor; and as a function of at least one characteristic of the measured differential voltage corresponding to the predefined characteristic of the test bias voltages, determining whether the sensor presents a short circuit.

Abstract: A ripple spring is provided having one or more conductive layers, and one or more non-conductive layers. The conductive layers and the non-conductive layers are laminated together to form a symmetrical stack of layers. A method is also provided for monitoring the ripple spring. The method includes the steps of providing a ripple spring that holds a winding in place, where the ripple spring is positioned at least partially within a stator slot defined within an electromechanical device. Providing a conductive layer disposed within the ripple spring, and generating signals from the conductive layer, the signals corresponding to at least one aspect of the ripple spring. An analyzing step analyzes the signals to determine the at least one aspect of the ripple spring, wherein the at least one aspect facilitates an identification of faults in the ripple spring.

Abstract: Diagnosing the condition of an electrical system during operation may comprise identifying the intended operating status of the system, measuring an electrical consumption in the system, comparing the measured electrical consumption at least with one predetermined electrical consumption that is associated to the intended operating status of the system, and diagnosing the condition of the system based on the comparison.

Abstract: This invention relates to a method of detecting faults on an electrical power line (7) and a sensor (5) for use in such a method. Preferably, the sensor is a line-mounted sensor (5). The method comprises the initial step of determining an initial impedance profile for the power line (7), and thereafter the method comprises the subsequent steps of the line-mounted sensor (5) transmitting a conducted communication signal (41) along the power line, receiving a reflected signal (43) particular to the transmitted communication signal and correlating the transmitted signal and the reflected signal. By correlating the signals, it is possible to determine the actual impedance of the power line. The actual impedance of the power line may then be compared with the initial impedance profile and it is possible to ascertain whether a fault exists on the power line. Preferably, the method uses an adaptive filter to determine the location of the fault.

Abstract: An embedded structure of circuit board is provided. The embedded structure includes a substrate, a first patterned conductive layer disposed on the substrate and selectively exposing the substrate, a first dielectric layer covering the first patterned conductive layer and the substrate, a pad opening disposed in the first dielectric layer, and a via disposed in the pad opening and exposing the first patterned conductive layer, wherein the outer surface of the first dielectric layer has a substantially even surface.

Abstract: A non-mechanical contact signal measurement apparatus includes a first conductor on a structure under test and a gas in contact with the first conductor. At least one electron beam is directed into the gas so as to induce a plasma in the gas where the electron beam passes through the gas. A second conductor is in electrical contact with the plasma. A signal source is coupled to an electrical measurement device through the first conductor, the plasma, and the second conductor when the plasma is directed on the first conductor. The electrical measurement device is responsive to the signal source.

Abstract: One aspect includes an electronic device that includes a component configured to generate diagnostic information indicative of a fault occurring in the electronic device. The electronic device also includes a persistent display coupled to the component and configured to display the diagnostic information.

Abstract: An apparatus includes: a current control unit to control an amount of constant current and supply a first and second constant currents to an infrared detection pixel; a constant current supply time control unit to control periods of time in which the first and second constant currents are supplied to the infrared detection pixel; an A-D converter to convert a first and second electrical signals from the infrared detection pixel into a first and second digital signals, the first and second electrical signals being generated when the first and second constant currents is supplied to the infrared detection pixel, respectively; a subtracting unit to calculate a difference between the first and second digital signals; and a determining unit to determine whether the infrared detection pixel is a defective pixel based on the absolute value of the difference calculated by the subtracting unit.

Abstract: A structure and method is provided for testing a 2-dimensional array of electrical devices, such as a 2-dimensional array in the first metal level (M1) of an electronic structure. The method for testing the 2-dimensional array provides a parallel test approach. The test structure provides a plurality of test pad structures to implement the parallel test approach. The test pad structures may include field effect transistors.

Abstract: A semiconductor device includes; a first pad that receives an external voltage during a test, a second pad coupled to an external impedance during the test, a voltage-current converter coupled to the first pad and the second pad and generating a bias current substantially in response to only the external voltage and the external impedance, and an internal circuit responsive to a test current during the test, such that the level of the test current is defined by the level of the bias current.

Abstract: An apparatus for performing measurements on a utility power device that shares a common ground with the apparatus selectively sends a first high voltage signal via a first lead to a first terminal of the utility power device, measures a first corresponding signal returned via a second lead of the apparatus from a second terminal of the utility power device. While the corresponding first lead and the second lead of the apparatus remain electrically coupled to the corresponding first and the second terminal of the utility power device. The apparatus selectively sends a second high voltage signal via the second lead to the second terminal of the utility power device, and measures a second corresponding signal returned via the first lead of the apparatus from the first terminal of the utility power device.

Abstract: Methods and systems for determining the status of a solenoid. A method includes measuring a plurality of parameters associated with a current conducting through the solenoid. The measured parameters are compared to predetermined reference parameters to determine the status of the solenoid. A system includes a sensor configured to measure a plurality of parameters associated with a current conducting through the solenoid. The system includes a control module configured to receive the measured parameters and operable to compare the measured parameters to predetermined reference parameters to determine the status of the solenoid.

Abstract: A main microcomputer abnormality determination section checks whether or not a voltage value of Vcc based on digital data output from a main microcomputer analog-to-digital converter is equal to or higher than a threshold value to thereby perform abnormality determination for the main microcomputer analog-to-digital converter and Vref. A sub microcomputer abnormality determination section checks whether or not the voltage value of Vcc is equal to or higher than a threshold value based on digital data output from a sub microcomputer analog-to-digital converter to thereby perform abnormality determination for the sub microcomputer analog-to-digital converter and Vref. An abnormality identifying section identifies an abnormality occurring site by using both results of the abnormality determination performed by the main microcomputer abnormality determination section and the sub microcomputer abnormality determination section.

Abstract: A wiring testing device configured to test the wiring correctness of an inverter is disclosed. The inverter is configured to be connected to a low-voltage three-phase system with a neutral conductor serving as a reference point for grid-side conductor voltages. The wiring testing device includes a test circuit configured to measure the grid-side conductor voltages and determine an average value from the sum of the instantaneous values of the grid-side conductor voltages, and a display unit configured to display an error message if the average value exceeds a threshold voltage for a defined time period. The wiring testing device further includes a capacitor connected between a phase of the three-phase system and the neutral conductor configured to generate a voltage imbalance if the neutral conductor connection is missing, wherein the test circuit is configured to measure the conductor voltages and determine the voltage imbalance.

Abstract: The fault current detecting circuit includes: a current detection unit that outputs a current detection signal; a first comparing circuit unit that compares the current detection signal with a predetermined reference current value and outputs a first output signal; a differentiator that differentiates the current detection signal to output a change slope of the current detection signal; a second comparing circuit unit that compares the change slope with a predetermined reference change slope value and outputs a second output signal; a third comparing circuit unit that compares the current detection signal with a predetermined current detection limit reference value and output a third output signal; and a trip determining unit that outputs a trip control signal only when the first output signal and the second output signal are maintained to be received and the third output signal is not received.

Abstract: A current differential protection system for a multi-terminal power line includes a current sensor for sensing a current at a local terminal, a controller for time synchronizing the local terminal and remote terminals, and a fault detection module to detect a fault in the multi-terminal power line if a differential current exceeds a threshold value. The controller includes a time measurement exchange module for exchanging time stamp data with remote terminals, an upper range clock for exchanging time stamp data with remote terminals and a lower range clock for indexing the current at the local terminal. A first time period of the upper range clock is N times a second time period of the lower range clock where N is a number of multi-terminals. The controller includes a clock offset calculation module for determining an average time offset based on time stamp data from remote terminals and the local terminal.

Abstract: A testing method tests the performance of a disc loading and transferring mechanism having a tray. The testing method includes steps of transmitting tray-out and tray-in instructions in that order, to drive the tray between a closed position and an opened position, detecting when the tray reaches the opposing position, counting the number of operations of the tray alternating between a closed position and an opened position; determining when the number of counts is equal to a predetermined number and outputting test results when the actual count is equal to a predetermined number or when the count is interrupted by malfunction.

Abstract: In one embodiment, a method for inspecting an electronic component includes preparing a current detector which is electrically connected to a current detection terminal via a gating device, and electrically connecting the current detection terminal to an interconnect which is in the electronic component and on which a failure portion is suspected to be generated. The method further includes pulsing an electron beam and irradiating the interconnect with the electron beam, and detecting a current generated when the interconnect is irradiated with the electron beam, by the current detector, while adjusting an opening and a closing of a gate in the gating device.

Abstract: There is here disclosed a method and apparatus for detecting the occurrence of arcing of a conductor by monitoring the current on an AC power line. The signal detected is split and directed along four separate paths to generate four signals having separate characteristics which represent the current in the line. Upon the detection of arcing, an output signal can be generated to activate a circuit interrupting mechanism, sound an audio alarm and/or alert a central monitoring station.

Abstract: Systems, methods and devices which utilize Spread Spectrum Time Domain Reflectometry (SSTDR) techniques to measure degradation of electronic components are provided. Such measurements may be implemented while the components “live” or otherwise functioning within an overall system. In one embodiment, monitoring a power converter in a high power system is accomplished. In this embodiment, degradation of components within the power converter (e.g. metal-oxide-semiconductor field-effect transistors (MOSFETs), capacitors, insulated-gate bipolar transistors (IGBTs), and the like) may be monitored by processing data from reflections of an SSTDR signal to determine changes in impedance, capacitance, or any other changes that may be characteristic of components degrading. For example, an aging MOSFET may experience an increase of drain to source resistance which adds additional resistance to a current path within a power converter.

Abstract: A circuit configuration for detecting an error occurring in a converter, that is designed for integrating an analog useful signal and a digital useful signal of the converter and checking in each instance, when the integrated analog useful signal reaches a specific threshold value, and when the integrated digital useful signal reaches a specific threshold value, the circuit configuration for the converter detecting an error if the threshold values are not reached within a defined time window.

Abstract: A method and system increase processed specimen yield in the laser processing of target material that includes multiple specimens formed on a common substrate. Preferred embodiments implement a feature that enables storage in the laser processing system a list of defective specimens that have somehow been subject to error during laser processing. Once the common substrate has been completely processed, the system alerts an operator to the number of improperly processed specimens and gives the operator an opportunity to run a software routine, which in a preferred embodiment uses a laser to scribe a mark on the top surface of each improperly processed specimen.

Abstract: A discharge control apparatus in an electric motorcycle includes a main battery; a motor driven based upon electric power supplied from the main battery and a lighting device that is a load other than the motor for consuming electric power. A BMU determines a remaining capacity of the main battery. A control member performs a discharge control of the main battery for supplying electric power to the motor and the lighting device. The BMU and the control member allow the discharge of the main battery until the remaining capacity becomes a threshold value higher than zero. When the control member receives an instruction of checking a deterioration state of the main battery from an external checking device, the control member performs a discharge of the main battery until the remaining capacity reaches zero, and then, allows the main battery to be fully charged so as to determine a chargeable capacity.

Abstract: Provided is a test apparatus comprising a plurality of testing sections and a synchronizing section that synchronizes operation of at least two testing sections among the plurality of testing sections. Each testing section transmits a synchronization standby command to the synchronizing section when a predetermined condition is fulfilled during execution of the corresponding program and the testing section enters a synchronization standby state, and on a condition that the synchronization standby commands have been received from all of one or more predetermined testing sections among the plurality of testing sections, the synchronizing section supplies a synchronization signal, which ends the synchronization standby state, in synchronization to two or more predetermined testing sections among the plurality of testing sections.

Abstract: A display panel and a testing method of the display panel are provided. The display panel has a display region and a non-display region and includes a first substrate, a second substrate, and a display medium. The display panel further includes scan lines, data lines, pixel units, at least one testing line, and at least one testing pad. The scan lines and the data lines are located on the first substrate within the display region. The pixel units are located on the first substrate within the display region. Each pixel unit electrically connects one of the scan lines and one of the data lines. The testing line is located on the first substrate within the non-display region, crosses over the scan lines, and is insulated from the scan lines. The testing pad is located on the first substrate within the non-display region and electrically connected to the testing line.

Abstract: In an embodiment, a method of testing a radio frequency integrated circuit (RFIC) includes generating high frequency test signals using the on-chip test circuit, measuring signal levels using on-chip power detectors, and controlling and monitoring the on-chip test circuit using low frequency signals. The RFIC circuit is configured to operate at high frequencies, and an on-chip test circuit that includes frequency generation circuitry configured to operate during test modes.

Abstract: Circuitry and methods for measuring capacitive mismatch with improved precision. The capacitors under measurement are connected in series in a voltage divider, with the node common to both capacitors connected to the gate of a source follower transistor. In one disclosed embodiment of the invention, a ramped voltage is applied to the drain of the source follower transistor simultaneously with the ramped voltage applied to the voltage divider; the slope of the ramped drain voltage is at the nominal slope of the voltage at the common node of the voltage divider. In another embodiment, a second transistor in saturation has its gate coupled to the source of the source follower device, and its source connected to the drain of the source follower device in series with a constant voltage drop. The drain-to-source voltage of the source follower device is thus held constant in each embodiment, improving precision of the measurement.

Abstract: A system and method for detecting transition delay faults decouples the test enable pins of the clock gating cells from other elements in the circuitry. The test enable pins are controlled during test mode by a unique signal, allowing the tester to independently control the clock gating logic of the circuitry. By being able to ungate the clock, the tester can ensure that the two clock pulses needed to check for transition delay faults will always be present.

Abstract: A diagnostic circuit is configured for connecting to a unit under test that has a load and a sinusoidal source. The diagnostic circuit includes a voltage sensing device that has an input for sensing a signal, a first terminal for connecting to the load, a second terminal for connecting to the sinusoidal source, and a relay connected between the first and second terminals for connecting the sinusoidal source to the load. Clamping diodes are provide for clamping a sinusoidal signal and include a first clamping diode connected between a D/C voltage source and the input and a second clamping diode connected between ground and the input. A resistor is connected between the D/C voltage source and the first terminal. The diagnostic circuit verifies the operational functionality of the load, related wiring and connections.

Abstract: A condition estimation device includes a voltage measurement circuit, memory, and a controller. The voltage measurement circuit measures an open circuit voltage (OCV) of an electric storage device. The memory is configured to store first information on a correlation between a positive electrode potential and an electric storage capacity and second information on a correlation between a negative electrode potential and an electric storage capacity. The controller is configured to: measure an OCV under charge or discharge; calculate an electric storage capacity of the electric storage device having the OCV equal to a reference voltage; correct at least one of the first information and the second information such that a potential difference at the calculated capacity is equal to the reference voltage; and generate an OCV characteristic based on the first and the second information after the at least one of the first and the second information is corrected.

Abstract: A sensing element suitable for sensing an interference signal radiated by an object under test is provided, including a substrate, a ground plane and a sensing antenna. The ground plane is disposed on a first surface of the substrate. The sensing antenna is disposed on the first surface of the substrate and is located on a first side of the ground plane. The sensing antenna and the ground plane are separated by a preset distance. Besides, the sensing antenna is electrically connected to the ground plane through a coaxial wire and receives the interference signal through the ground plane.

Abstract: The method according to the present invention includes the steps of: sequentially applying a plurality of different voltages to an MR element and sequentially detecting output signals from the MR element; and eliminating the MR element as a defective product when an evaluation value, based on a difference of SN ratios of the output signals from the MR element respectively obtained for each applied voltage, is less than a threshold value, and selecting the MR element as a non-defective product when the evaluation value is greater than or equal to the threshold value.

Abstract: A process and apparatus for collecting data for nondestructive evaluation of the quality of a crimped wire connector are provided. The process involves providing a crimping tool having an anvil and opposing jaw for crimping a terminal onto a stranded wire, moving the jaw relative to the anvil to close the distance between the jaw and the anvil and thereby compress the terminal against the wire, while transmitting ultrasonic waves that are propagated through the terminal-wire combination and received at a receiving ultrasonic transducer as the jaw is moved relative to the anvil, and detecting and recording the position of the jaw relative to the anvil as a function of time and detecting and recording the amplitude of the ultrasonic wave that is received at the receiving ultrasonic transducer as a function of time as the jaw is moved relative to the anvil.

Abstract: The present disclosure describes techniques for testing optical devices in a manner that, in some implementations, simulates the environment in which the devices will be used when they are integrated into the end-product or system. For example, one aspect includes providing a transparent sheet that is positioned near the optical device in a manner that simulates at least some aspects of the environment when the device is incorporated into the end-product or system. The testing can be performed, for example, while the optical devices are in production or at some other time prior to their being integrated into an end-product or system.

Abstract: A current measurement unit measuring power supply currents each consumed in a plurality of circuit blocks of which at least one of the circuit blocks includes a processor, and outputting the measurement result as the power supply current values. A selection unit selecting at least one of the power supply current values according to selection information. A trace buffer sequentially holding the power supply current values being selected by the selection unit together with execution information of the processor, and sequentially outputting the held information. By selecting the power supply current values of the circuit blocks required for debugging according to the selection information, the number of external terminals of a semiconductor integrated circuit required for the debugging which includes tracing the power supply current values may be reduced. As a result, a chip size of the semiconductor integrated circuit with a debug function may be reduced.