Of Individual Circuit Component Or Element Patents (Class 324/537)
  • Publication number: 20150145522
    Abstract: The invention relates to an analog signal input circuit with a first number of analog signal detection channels (100) and at least one diagnostics circuit (130), with each analog signal detection channel respectively including a third number of analog signal detection circuits (110, 120) and at least one first connection selection device (115, 125), and each analog signal detection circuit comprising a first connection device and a second connection device.
    Type: Application
    Filed: May 16, 2013
    Publication date: May 28, 2015
    Applicant: Phoenix Contact GmbH & Co., KG
    Inventors: Viktor Oster, Hubertus Lohre
  • Patent number: 9041426
    Abstract: The present invention provides to a default current testing method of the high voltage direct current converter valve composited by impulse voltage. The technical scheme of the invention composites the symmetrical positive and negative voltage and the impulse into asymmetric positive and negative high voltage, it makes the test valve voltage accurately achieve required peak value at the set time. The test circuit is simple relatively; the high voltage source of the default current test circuit is instead by surge generators. The test method is flexible, safe, and suitable for different DC project converter valves.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: May 26, 2015
    Assignees: STATE GRID SMART GRID RESEARCH INSTITUTE, STATE GRID CORPORATION OF CHINA, CHINA-EPRI ELECTRIC POWER ENGINEERING CO., LTD., CHINA ELECTRIC POWER RESEARCH INSTITUTE
    Inventors: Guang fu Tang, Kunpeng Zha, Jun Yang, Chong Gao
  • Patent number: 9041411
    Abstract: An integrated circuit (10) comprises a functional circuit (12a-c) that contain information that must be secured against unauthorized access. The integrated circuit comprises a test access circuit (14, 16) coupled to the functional circuit (12a-c), and a plurality of fuse elements (18) coupled to the test access circuit (14, 16). The fuse elements (18) are connected in a circuit configuration that makes the functional circuit (12a-c) consistently accessible via the test access circuit (14, 16) only when first fuse elements (18) of the plurality are in a blown state and second fuse elements (18) of the plurality are in a not-blown state. As a result the integrated circuit can be tested after selectively blowing all of the first fuse elements (18). After testing at least part of the second fuse elements (18) is blown.
    Type: Grant
    Filed: August 9, 2006
    Date of Patent: May 26, 2015
    Assignee: NXP B.V.
    Inventors: Erik J. Marinissen, Sandeep Kumar Goel, Andre K. Nieuwland, Hubertus G. H. Vermuelen, Hendrikus P. E. Vranken
  • Patent number: 9041392
    Abstract: There is provided a current sensor capable of performing malfunction determination with high accuracy even under the influence of an adscititious magnetic field. A current sensor includes first and second current sensor units, a computation unit, a storage unit, and a determination processing unit. The first current sensor unit measures a target current. The first and second current sensor units have almost the same sensitivity. The computation unit calculates and outputs an addition value and a difference value of outputs of the first and second current sensor units. In the storage unit, the addition and difference values output from the computation unit are stored. The determination processing unit determines whether a malfunction has occurred by using the addition and difference values stored in the storage unit. The determination processing unit determines that a malfunction has occurred, in a case where there is a correlation between the addition and difference values.
    Type: Grant
    Filed: July 10, 2013
    Date of Patent: May 26, 2015
    Assignee: ALPS GREEN DEVICES CO., LTD.
    Inventors: Yasuo Kotera, Manabu Tamura, Hisanori Kiyomatsu
  • Publication number: 20150137827
    Abstract: A system for detecting partial discharge in electrical components may include a control system that may operate a drive in an industrial automation system. The industrial automation system may include the electrical components being analyzed for partial discharge. The system may also include one or more acoustic sensors that may detect one or more acoustic waveforms generated within at least one of the electrical components. The system may also include a monitoring system that may receive the acoustic waveforms from the acoustic sensors and determine whether the one electrical component is experiencing partial discharge based on the acoustic waveforms. The monitoring system may then send a notification to the control system when the one electrical component is determined to be experiencing partial discharge, such that the notification indicates that the one electrical component is experiencing partial discharge.
    Type: Application
    Filed: January 28, 2015
    Publication date: May 21, 2015
    Inventors: Zhongyuan Cheng, Catalin F. Gemanaru, Navid Reza Zargari, Robert N. Bickford
  • Publication number: 20150137826
    Abstract: Disclosed herein is an apparatus and method for detecting a fault in a digitizer. The apparatus includes a function generator for generating test signals, a transmitting switch for transmitting the test signals generated by the function generator to a selective part or all of X- and Y-channels of a transmitting digitizer, a receiving digitizer arranged in a shape identical to that of the transmitting digitizer to be adjacent to the transmitting digitizer, the receiving digitizer receiving reception signals produced by the transmitting digitizer, a receiving switch for receiving resulting signals, generated by the receiving digitizer in response to the reception signals, from a selective part or all of X- and Y-channels of the receiving digitizer, a channel controller for controlling the transmitting switch and the receiving switch, a data collection unit for collecting the resulting signals, and an analysis unit for analyzing the collected resulting signals.
    Type: Application
    Filed: October 31, 2014
    Publication date: May 21, 2015
    Applicant: KOREA INSTITUTE OF INDUSTRIAL TECHNOLOGY
    Inventors: Dae Yeong IM, Hyun Rok CHA, Bong Kee PARK, Jin Ho YOU
  • Patent number: 9035790
    Abstract: A transmit pad inspection device includes a magnetic coupling device, which includes an inductive circuit that is configured to magnetically couple to a primary circuit of a charging device in a transmit pad through an alternating current (AC) magnetic field. The inductive circuit functions as a secondary circuit for a set of magnetically coupled coils. The magnetic coupling device further includes a rectification circuit, and includes a controllable load bank or is configured to be connected to an external controllable load back. The transmit pad inspection device is configured to determine the efficiency of power transfer under various coupling conditions. In addition, the transmit pad inspection device can be configured to measure residual magnetic field and the frequency of the input current, and to determine whether the charging device has been installed properly.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: May 19, 2015
    Assignee: UT-BATTELLE, LLC
    Inventors: Perry T. Jones, John M. Miller
  • Publication number: 20150130476
    Abstract: A direct-current regulator includes: a fuse, a high-side switch, and a low-side switch connected in series between a high potential side input voltage terminal and a low potential side input voltage terminal; and a control unit configured to control the high-side switch and the low-side switch, wherein the fuse is formed on a silicon substrate on which the high-side switch is formed, and the fuse includes: two electrodes separately formed on the silicon substrate; a plurality of band-shaped polysilicon films formed between the two electrodes; and a linking part of a polysilicon film provided so as to connect the neighboring band-shaped polysilicon films at intermediate portions.
    Type: Application
    Filed: September 25, 2014
    Publication date: May 14, 2015
    Applicant: FUJITSU LIMITED
    Inventors: Yoshimasa TAKAHASHI, Yuji UCHIYAMA
  • Patent number: 9030224
    Abstract: A semiconductor integrated circuit includes a plurality of dies, wherein each of the dies is configured to enable a power circuit provided therein according to a power control signal, in a state in which the die was determined to be a good die or a fail die.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: May 12, 2015
    Assignee: SK Hynix Inc.
    Inventors: Jae Bum Ko, Sang Jin Byeon
  • Patent number: 9030225
    Abstract: An over voltage protection testing apparatus is applied for testing an over voltage protection function of a power supply apparatus. The over voltage protection testing apparatus mainly includes a voltage boost-storage unit and an energy release unit. The voltage boost-storage unit boosts an original output voltage outputted from the power supply apparatus into a testing voltage. Therefore, no extra testing voltage source is required for testing the over voltage protection function of the power supply apparatus. Moreover, the extra energy would be released to the energy release unit after the testing of the over voltage protection function of the power supply apparatus is finished. Therefore, the energy releasing of the present invention is faster than the energy releasing of a related art.
    Type: Grant
    Filed: May 2, 2013
    Date of Patent: May 12, 2015
    Assignee: Chicony Power Technology Co., Ltd.
    Inventors: Chih-Ching Huang, Jhen-Siang Huang, Wen-Nan Huang, Shiu-Hui Lee
  • Patent number: 9024641
    Abstract: A method of detecting a wire break in a high voltage generating device that is configured to detect a wire breakage in a low-voltage cable is disclosed. The method of a wire break includes: detecting whether a wire break has occurred in each of the lines in accordance with a combination pattern of whether the time differential value of an IM signal value of a CW circuit obtained when an operating voltage is boosted is positive, negative, or 0, and whether the time differential value of a VM signal value obtained after the operating voltage is boosted by the CW circuit is positive, negative, or 0; and identifying which of the lines is broken.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: May 5, 2015
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Isamu Yamasaki, Kimiyoshi Nagai
  • Patent number: 9024640
    Abstract: A PV system includes a plurality of PV strings configured to generate a string output power responsive to received solar irradiation, with a source conductor and a return conductor being provided from the PV strings. One or more DC voltage regulators are electrically connected to the PV strings on at least one of the source or return conductors, with the DC voltage regulator being configured to regulate the voltage of a respective PV string or group of strings. A controller selectively controls a voltage output by the DC voltage regulator and is programmed to periodically cause the DC voltage regulator to alter the voltage of a PV string or group of strings, detect a change in current in the respective PV string(s) responsive to the altering of the voltage, and perform at least one of a PV string degradation detection and causal diagnosis and a grounded conductor fault detection.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: May 5, 2015
    Assignee: Eaton Corporation
    Inventors: Yu Liu, Charles John Luebke, Christopher Scott Thompson
  • Publication number: 20150115742
    Abstract: A line break detection system for detecting a break in a conductor (1.004), the system including a first return signal generator (1.020) proximate a first end of a segment of the conductor, the first return signal generator being adapted to apply a first return signal to the conductor, the system including a first return signal detector (1.016) proximate a second end of the segment of the line, the second end being upstream of the first end, the first detector being adapted to receive the first return signal from the line, wherein the first return signal generator ceases to generate the first return signal if the line is broken.
    Type: Application
    Filed: April 1, 2014
    Publication date: April 30, 2015
    Inventors: Barber Kenneth Willis, Lee Michael
  • Publication number: 20150120219
    Abstract: Methods, apparatuses, and systems for using Digital Signal Processing (DSP) to detect, measure, and/or compensate for, antenna load mismatch are described. One method provides a test sweep signal as digital input to a Digital-to-Analog Converter (DAC) in a transmit path ending with an antenna, and determines a transmit transfer function based on the digital input and digital output from an Analog-to-Digital Converter (ADC) in a loopback path which is electrically connected in parallel with a load impedance of the antenna. The determined transmit transfer function may be used for any of detecting, measuring, and compensating for, antenna mismatch.
    Type: Application
    Filed: February 28, 2014
    Publication date: April 30, 2015
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Marco MERLIN, Albert CESARI-BOHIGAS, Alexander THOUKYDIDES, Dean ARMSTRONG
  • Publication number: 20150115973
    Abstract: A simultaneous electrical testing device for TSV interconnection elements passing through a substrate and including one end connected to an integrated testing circuit and another end to a removable connection mechanism assembled to the substrate through an anisotropic conductive glue.
    Type: Application
    Filed: July 11, 2013
    Publication date: April 30, 2015
    Applicant: Commissariat a l'energie atomique et aux ene alt
    Inventor: Haykel Ben Jamaa
  • Publication number: 20150108996
    Abstract: The invention provides a testing circuit for testing a connection between a chip and external circuitry. A current source is used to inject a DC current towards the connection to be tested from the chip side. On-chip ESD protection is provided giving a path between the connection to be tested and a fixed voltage line. A shunt path is also coupled to the connection to be tested on the external circuitry side. It is determined if the current source current flows through the ESD protection circuit, and this can be used to determine whether or not the connection to be tested presents an open circuit for the DC test current.
    Type: Application
    Filed: August 28, 2014
    Publication date: April 23, 2015
    Inventors: Cicero Silveira Vaucher, Mingda Huang, Antonius de Graauw
  • Patent number: 9013202
    Abstract: A metal-to-metal leakage and breakdown testing structure for semiconductor structures and method of using the testing structure is disclosed. The testing structure includes plurality of resistor bridges connected to respective two terminal devices. The testing structure further includes a plurality of switches each having a voltage node provided between resistors of a respective one of the plurality of resistor bridges. The voltage node is read at a circuit pad when a respective one of the plurality of switches is in an on state. The testing structure further includes a device turning on and off each of the plurality of switches, individually.
    Type: Grant
    Filed: May 23, 2012
    Date of Patent: April 21, 2015
    Assignee: International Business Machines Corporation
    Inventors: Fen Chen, Kai Di Feng, Pui Ling Yee
  • Patent number: 9013205
    Abstract: The present disclosure provides a testing apparatus for executing a test program, to perform a first test on a circuit component on a circuit board and a second test on the circuit board. The testing apparatus includes a first module, a second module, and a signal transmission line that connects the two. The first module includes a control unit, a signal generation unit, a signal processing unit, a signal expansion unit, and a power supply unit. The control unit generates a first control signal or a second control signal. The signal generation unit generates a current signal or a voltage signal. The signal processing unit generates a numerical signal. The signal expansion unit generates a second data signal. The power supply unit generates a working voltage. The second module includes a test address assignment unit that assigns an address and a signal isolation unit that performs noise immunization process.
    Type: Grant
    Filed: October 21, 2013
    Date of Patent: April 21, 2015
    Assignees: Inventec (Pudong) Technology Corporation, Inventec Corporation
    Inventors: Lien-Feng Chen, Chun-Hao Chu
  • Patent number: 9007069
    Abstract: A method of testing a short circuit protection system applied to a spur of an electric circuit. The short circuit protection system has a current limiting means which applies a current limit to the spur if the current thereon exceeds a trip level. The electric circuit has a power supply and an isolation means adapted to fully or partially isolate the power supply from the electric circuit if the current thereon exceeds a power supply trip level for longer than a deadband period. The method includes applying a test current demand to the short circuit protection system which has a current and duration sufficient for the spur current trip level but a current insufficient to exceed the power supply trip level and/or a duration insufficient to exceed the deadband period, and detecting if the current limiting means applies the current limit or not during the test current demand.
    Type: Grant
    Filed: February 4, 2011
    Date of Patent: April 14, 2015
    Assignee: Pepperl + Fuchs GmbH
    Inventors: Renato Kitchener, Gunther Rogoll
  • Publication number: 20150097572
    Abstract: A technique for tamper protection in an electronic device is disclosed. A conductive mesh is affixed onto one or more interior surfaces of the outer housing of the device. The mesh includes one or more conductive traces coupled to one or more detectors within the device. The detector can detect an open-circuit or short-circuit condition resulting from an unauthorized attempt to open the housing, and output a signal to trigger an appropriate countermeasure. The electrical contacts along the trace that are monitored can be selected differently from one manufactured unit to the next, and can be selected based on a randomness function. The selection of contacts may be made during or after manufacturing of the device. The mesh can include multiple metal traces that run very close together, in parallel, across one or more interior surfaces of the housing, allowing detection of both open-circuit and short-circuit conditions.
    Type: Application
    Filed: October 4, 2013
    Publication date: April 9, 2015
    Applicant: Square, Inc.
    Inventors: Jeremy Wade, Thomas Templeton, Trent Weber, Michael Lamfalusi
  • Publication number: 20150097575
    Abstract: A method of evaluating a device includes a first electric circuit acting as a noise source and a second electric circuit which is likely to malfunction due to a noise signal. The method includes: obtaining malfunction frequency characteristics indicating magnitudes of a threshold noise signal causing malfunction of the second electric circuit; obtaining internal noise arrival frequency characteristics indicating magnitudes of an internal noise signal arriving at the second electric circuit from the first electric circuit; and comparing the malfunction frequency characteristics with the internal noise arrival frequency characteristics.
    Type: Application
    Filed: October 6, 2014
    Publication date: April 9, 2015
    Inventor: Noriaki Hiraga
  • Publication number: 20150097573
    Abstract: A load apparatus for testing is provided. The load apparatus for testing includes a first comparison circuit, a switch circuit, a voltage-dividing load circuit and a second comparison circuit. The first comparison circuit receives an input voltage from an input terminal and obtains a first sensing voltage according to the input voltage, and compares whether the first sensing voltage is greater than a first reference voltage for providing a first sensing signal. The switch circuit receives the first sensing signal and the input voltage. The switch circuit guides the input voltage to the voltage-dividing load circuit according to the first sensing signal. The voltage-dividing load circuit generates a second sensing voltage according to an input current generated at the input terminal. The second circuit is coupled to the voltage-dividing load circuit and compares whether the input current is greater than a reference current for providing a testing signal.
    Type: Application
    Filed: January 2, 2014
    Publication date: April 9, 2015
    Applicant: Wistron Corporation
    Inventors: Kung-Hao Chang, Chih-Hao Chang, Kun-Liang Lai
  • Publication number: 20150097574
    Abstract: A non-transitory computer-readable recording medium stores therein a program that causes a computer to execute a phase determining process. The phase determining process includes: transmitting electricity to a consumer via a power distribution line branched from a power distribution line using a three-phase three-wire system; identifying a time change pattern of a highest correlation with a time change pattern of power consumption, voltage, or current at the consumer out of time change patterns of power consumption, voltage, or current of respective phases of a high-voltage power distribution line using the three-phase three-wire system; and determining a phase corresponding to the identified time change pattern to be a phase at a time of branching the power distribution line to the consumer.
    Type: Application
    Filed: September 4, 2014
    Publication date: April 9, 2015
    Inventors: Tetsuya KASHIWAGI, Yuichi Matsufuji
  • Patent number: 8988062
    Abstract: A branch circuit monitoring system (BCMS) for monitoring branch circuit currents in one or more electrical circuit panels is described. The system is comprised of a data center server, one or more panel processors, each with one or more collection devices, and one or more current sensors per collection device. The BCMS is designed to be installed entirely inside the panel without the need for a dedicated enclosure or power supply to facilitate ease of installation and low-cost. The BCMS also allows for future upgradability through standard software updates so that the system can be updated or patched easily. The BCMS data center server collects, aggregates, stores, and serves historical branch circuit current data from the panel processors to networked users via a web server to provide visualization of data such as tables, charts, and gauges.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: March 24, 2015
    Assignee: Precision Air & Energy Services, LLC
    Inventors: Montgomery J. Sykora, Daniel L. Janovy, David L. Janovy
  • Publication number: 20150077133
    Abstract: Detection of a fault in an ungrounded electric power distribution system that includes a plurality of feeders and buses is disclosed herein. Embodiments consistent with the present disclosure may monitor an electrical parameter associated with each of a plurality of feeders and buses in the ungrounded electric power distribution system. An incremental change in the monitored electrical parameters may be determined using the monitored electrical parameter. Further, the incremental change may be associated with a first sub-set of the plurality of feeders. Torque values for the feeders may be calculated using a reference quantity from the bus first exhibiting an incremental change above a threshold. A feeder having the largest incremental change in the first sub-set of the plurality of feeders may be identified. A fault may be identified based on the torque and the incremental change.
    Type: Application
    Filed: September 4, 2014
    Publication date: March 19, 2015
    Inventors: Normann Fischer, Amandeep Singh Kalra
  • Publication number: 20150077132
    Abstract: As a configuration for detecting an occurrence of abnormalities such as a disconnection of output wiring or an overcurrent of a PLC analog output module that controls a load by an analog current signal, the PLC analog output module includes a current output circuit that outputs the analog current signal, a current sensing resistor provided at a current output terminal of the current output circuit for directly detecting an analog current output to the load, a monitoring circuit that monitors voltages at both ends of the current sensing resistor, and an abnormality detection circuit that discriminates whether there is an occurrence of a disconnection or an overcurrent based on a monitoring result of the monitoring circuit.
    Type: Application
    Filed: April 9, 2012
    Publication date: March 19, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Masataka Watahiki, Masaru Hoshikawa, Shigeaki Takase
  • Patent number: 8981809
    Abstract: A compliant printed circuit semiconductor tester interface that provides a temporary interconnect between terminals on integrated circuit (IC) devices being tested. The compliant printed circuit semiconductor tester interface includes at least one dielectric layer printed with recesses corresponding to a target circuit geometry. A conductive material is deposited in at least a portion of the recesses comprising a circuit geometry and a plurality of first contact pads accessible along a first surface of the compliant printed circuit. At least one dielectric covering layer is preferably applied over the circuit geometry. A plurality of openings in the dielectric covering layer are provided to permit electrical coupling of terminals on the IC device and the first contact pads. Testing electronics that to test electrical functions of the IC device are electrically coupled to the circuit geometry.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: March 17, 2015
    Assignee: Hsio Technologies, LLC
    Inventor: James Rathburn
  • Patent number: 8981786
    Abstract: A test apparatus that tests a device under test outputting a data signal and a clock signal indicating a timing at which the data signal is to be sampled, the test apparatus comprising a data acquiring section that acquires the data signal output by the device under test, at a timing corresponding to a sampling clock corresponding to the clock signal output by the device under test or a timing of a timing signal corresponding to a test period of the test apparatus; a judging section that judges pass/fail of the device under test, based on a result of a comparison between the data signal acquired by the data acquiring section and an expected value; and a designating section that designates whether the data acquiring section acquires the data signal at the timing corresponding to the sampling clock or at the timing corresponding to the timing signal.
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: March 17, 2015
    Assignee: Advantest Corporation
    Inventor: Hiromi Oshima
  • Patent number: 8975899
    Abstract: An inverter device for feeding electrical energy from a DC-power source into a power grid includes a pair of bus lines to be connected to the DC-power source; a plurality of capacitors connected in series between the bus lines; a surveying topology surveying an integrity of the plurality of capacitors, and to provide a signal indicating a loss of integrity of one capacitor of the plurality of capacitors; a voltmeter measuring a voltage drop over the plurality of capacitors; a DC/AC-inverter; and a controller. in case of the signal indicating a loss of integrity of one capacitor of the plurality of capacitors, the controller compares the voltage drop over the plurality of capacitors to a lost integrity threshold voltage value, and reduces a current load to the plurality of capacitors by reducing the power uptake of the DC/AC-inverter, when the voltage drop exceeds the lost integrity threshold voltage value.
    Type: Grant
    Filed: July 13, 2012
    Date of Patent: March 10, 2015
    Assignee: SMA Solar Technology AG
    Inventors: Henrik Wolf, Thomas Wegener, Daniel Clemens, Harald Drangmeister
  • Publication number: 20150061693
    Abstract: Apparatus and method for assessing the quality of membrane electrode assemblies.
    Type: Application
    Filed: March 19, 2013
    Publication date: March 5, 2015
    Inventors: Orlin B. Knudson, Daniel M. Pierpont, James F. Poch
  • Publication number: 20150061692
    Abstract: Devices include an impulse current generator that is configured to provide a direct impulse current (DIC) that includes a specified waveform to a test load during a test duration, a continuous power supply that is configured to provide a continuous power to the test load during the test duration, a trigger circuit that is configured to determine a trigger condition that corresponds to the DIC and to generate a trigger signal responsive to determining the trigger condition, and a current bypass circuit that is configured to receive the trigger signal generated by the trigger circuit and to conduct a majority portion of the DIC being conducted by the load responsive to the trigger signal.
    Type: Application
    Filed: September 12, 2013
    Publication date: March 5, 2015
    Applicant: Raycap Intellectual Property Ltd.
    Inventors: Grigoris Kostakis, Evaggelia Giannelaki, Thomas Tsovilis, Zafiris Politis
  • Publication number: 20150061691
    Abstract: An apparatus and method for measuring the properties of a DUT characterized by a signal gain applied to an input signal to that DUT and a DUT noise spectrum introduced by that DUT is disclosed. An apparatus includes first and second measurement channels and a controller. The first and second measurement channels are characterized by gains and noise spectrums that are different for the different channels and generate first and second measurement signals. The controller measures an average value of a product of the first and second measurement signals when an input signal is applied to the input of the DUT, the controller providing a measure of the signal to noise ratio of the output of the DUT, independent of the noise spectrums in the first and second measurement channels. Four channel embodiments reduce the amount of calibration needed to measure the gain and noise spectrum of the DUT.
    Type: Application
    Filed: August 29, 2013
    Publication date: March 5, 2015
    Inventor: Robert T. Cutler
  • Patent number: 8972216
    Abstract: Methods and apparatus for a power regulator according to various aspects of the present invention may comprise a sensor adapted to generate a measurement of a voltage or a current. A memory may store a correction parameter that corresponds to the measurement, and a correction system may be adapted to adjust the measurement according to the correction parameter.
    Type: Grant
    Filed: March 8, 2011
    Date of Patent: March 3, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Benjamim Tang, Chun-Yen Lin, Rohan Samsi, Jinghong Guo, Tim M. Ng, Richard Pierson
  • Patent number: 8970238
    Abstract: A probe module for testing an electronic device comprises at least two contacts, each contact including a first end portion extending in a first direction along a first line, a second end portion extending linearly in a second direction opposite from the first direction and along a second line, and a third curved portion extending between the first end portion and the second end portion. The first line is spaced apart from and in parallel with the second line, and the at least two contacts are spaced apart from each other in a direction perpendicular to the first line and the second line. Methods for making such a probe module are also taught.
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: March 3, 2015
    Assignee: Electro Scientific Industries, Inc.
    Inventor: Douglas J. Garcia
  • Patent number: 8963558
    Abstract: A current differential protection system for a multi-terminal power line includes a current sensor for sensing a current at a local terminal, a controller for time synchronizing the local terminal and remote terminals, and a fault detection module to detect a fault in the multi-terminal power line if a differential current exceeds a threshold value. The controller includes a time measurement exchange module for exchanging time stamp data with remote terminals, an upper range clock for exchanging time stamp data with remote terminals and a lower range clock for indexing the current at the local terminal. A first time period of the upper range clock is N times a second time period of the lower range clock where N is a number of multi-terminals. The controller includes a clock offset calculation module for determining an average time offset based on time stamp data from remote terminals and the local terminal.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: February 24, 2015
    Assignee: General Electric Company
    Inventors: Yan Pan, William James Premerlani
  • Publication number: 20150048842
    Abstract: An illustrative example conductor monitoring device includes a generator configured to radiate a field into a conductor. A detector is configured to detect at least some of the field propagated along the conductor. A processor is configured to determine when a change in the propagated field detected by the detector indicates contact between the conductor and a conductive blade of a wire processing machine. The example conductor monitoring device is capable of providing information regarding the condition of a conductor that has gone through a wire handling process that involves cutting the wire and stripping insulation from near the end of the cut wire, for example. The information regarding the condition of the wire is obtained without making contact with the wire and without interfering with or requiring any alteration of the wire handling process or machine.
    Type: Application
    Filed: August 19, 2013
    Publication date: February 19, 2015
    Applicant: OES, Inc.
    Inventors: Kiet NGO, Michael REEVE
  • Patent number: 8957686
    Abstract: A voltage measurement device, includes: a multiplexer that includes a plurality of input terminals at which voltage signals are inputted; a control circuit that performs voltage measurement by acquiring the voltage signal at a selected input terminal from the multiplexer; and a decision circuit that makes a decision as to whether or not an abnormality has occurred, based upon voltage values measured by the control circuit, wherein: the plurality of input terminals include input terminals at which voltage signals from a plurality of subjects of measurement are inputted, and an input terminal at which a potential for diagnosis is inputted; the control circuit, when performing voltage measurement for the plurality of subjects of measurement, measures voltages at the input terminals at which the voltage signals from the plurality of subjects of measurement are inputted, and a voltage at the input terminal at which the potential for diagnosis is inputted.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: February 17, 2015
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Masahiro Ueda, Yoshinori Aoshima, Akihiko Kudo
  • Publication number: 20150042356
    Abstract: A test system for testing electrostatic testers, is used to test at least one electrostatic tester each including a voltage test terminal and a connection test terminal. The test system includes at least one optical coupler circuit and a chip. Each optical coupler circuit is coupled the voltage test terminal and the connection test terminal of one corresponding electrostatic tester, and each optical coupler circuit converts voltages of the voltage test terminal and the connection test terminal respectively to a voltage test signal and a connection test signal. The chip is couple to the at least one optical coupler circuit, and receives the connection test signal and the voltage test signal produced by the at least one optical coupler circuit, and determines whether the corresponding electrostatic tester connected to each optical coupler circuit is worked normally according to the connection test signal and the voltage test signal.
    Type: Application
    Filed: August 1, 2014
    Publication date: February 12, 2015
    Inventors: GUI-ZHEN ZHANG, QUAN-LONG YANG, HUNG-JEN TSENG
  • Patent number: 8952704
    Abstract: A test arrangement is provided for AC testing of electrical high voltage components including at least one inverter, at least one test transformer and at least one high-voltage inductor arranged as test components in a common cuboid container. The at least one high-voltage inductor is at least partly removable from the container through at least one opening on a boundary surface of the container by means of a movement apparatus.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: February 10, 2015
    Assignee: ABB Technology AG
    Inventors: Peter Werle, Matthias Steiger, Juergen Wohlfarth
  • Patent number: 8941108
    Abstract: A method performs electrical testing and assembly of an electronic device on a wafer and comprising a pad made in an oxide layer covered by a passivation layer. The method includes connecting the electronic device to a testing apparatus; providing said electronic device with a metallization layer extending on the passivation layer from the pad to a non-active area of said wafer. The method comprises-performing the electrical testing on wafer of the electronic device by placing a probe of on a portion of the extended metallization layer; performing the cut of said wafer, reducing the extension of the metallization layer to the edge of the electronic device; embedding the device inside a package, forming on the metallization layer an electrical connection configured to connect the metallization layer to a circuit in said package.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: January 27, 2015
    Assignee: STMicroelectronics S.r.l.
    Inventor: Alberto Pagani
  • Patent number: 8941404
    Abstract: In accordance with an embodiment, a method of testing a power supply controller includes detecting whether an external switch is coupled between a first supply pin and the second supply pin. If the external switch is detected, the method determines whether there is a short circuit between the second supply pin and the switching output pin. If the short circuit between the second supply pin and the switching output pin is not detected, however, the method determines whether there is a short circuit between a switch control pin and the second supply pin. If the short circuit between the switch control pin and the second supply pin is not detected, the method determines whether there is a conductive path between the first supply pin and the second supply pin when the switch control pin activates the external switch.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: January 27, 2015
    Assignee: Infineon Technologies Austria AG
    Inventor: Derek Bernardon
  • Patent number: 8937483
    Abstract: A semiconductor package transferring apparatus is disclosed. The apparatus includes a tray that includes a front side and a rear side opposite the front side, the rear side including a plurality of package covering portions that each correspond to the shape of a semiconductor package and that are arranged to align with corresponding package loading portions on a front side of another tray. Each package covering portion has a surface configured to cover a semiconductor chip disposed below the surface. The apparatus further includes an anti-attachment portion disposed on the surface of one or more of the package covering portions. For each package covering portion on which an anti-attachment portion is disposed, the anti-attachment portion protrudes beyond the surface of the package covering portion.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: January 20, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyeck-Jin Jeong, Yong-Ki Park, Yong-Jin Jung, Heul-Seog Kim
  • Publication number: 20150015270
    Abstract: A relative angle detection apparatus includes a first magnetometric sensor and a first voltage amplifier that output a signal corresponding to a relative rotation angle between a first rotation shaft and a second rotation shaft; a first amplifier circuit that amplifies the output signal of the first voltage amplifier; a second magnetometric sensor and a second voltage amplifier that output a signal that corresponds to the relative rotation angle; a second amplifier circuit that amplifies the output signal of the second voltage amplifier; a first resistor that is provided between the first amplifier circuit and a power supply terminal, or between the first amplifier circuit and a GND terminal; and a second resistor that is provided between the second amplifier circuit and the power supply terminal, or between the second amplifier circuit and the GND terminal.
    Type: Application
    Filed: October 30, 2012
    Publication date: January 15, 2015
    Applicant: SHOWA CORPORATION
    Inventor: Hiroyuki Muto
  • Publication number: 20150019051
    Abstract: An electronic system with real-time fault detection is provided. In one embodiment, the system includes analog circuitry, having a first input coupled to receive an input signal and a second input coupled to receive a test signal. The test signal is at an edge of a selected band that contains the input signal. The test signal is used to identify faults in the electronic system during operation of the electronic system. The electronic system further includes an analog to digital (A/D) converter coupled to an output of the analog circuitry. The A/D converter generates digitized spectrum. Digital circuitry is coupled to the output of the A/D converter. The digital circuitry processes the input signal from the band to provide an output for the system and processes the test signal to detect faults in the analog circuitry, the digital circuitry and the A/D converter.
    Type: Application
    Filed: July 12, 2013
    Publication date: January 15, 2015
    Inventors: Alfonso Malaga, Walter Devensky
  • Publication number: 20150012238
    Abstract: A method for determining test sets of operating parameter values for an electronic component, the method including: determining a first set of intermediate sets, each intermediate set containing a combination of a first number of operating parameters of the electronic component; determining a second set of reference sets, wherein the second set contains a union of sets, each set comprising all possible combinations of parameter values for the parameters of a respective intermediate set; selecting a third set with a second number of test sets out of a set of predefined sets, wherein each predefined set comprises a different combination of the parameter values for all parameters from the predefined parameter set, such that the second set is a subset of a union of a number of sets, each set comprising all possible combinations of the first number of parameter values for all parameters of a respective test set.
    Type: Application
    Filed: September 25, 2014
    Publication date: January 8, 2015
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Georg Pelz, Thomas Nirmaier
  • Publication number: 20150008936
    Abstract: A method for evaluating a device including a plurality of electric circuits has: a step of finding a first malfunction frequency property for individual electric circuits included in the device, the first malfunction frequency property representing the magnitude of a critical noise signal at which each electric circuit causes a malfunction; and a step of finding a second malfunction frequency property based on the first malfunction frequency property found for each of the electric circuits, an equivalent circuit of the entire device, and an equivalent circuit of each of the electric circuits, the second malfunction frequency property representing the magnitude of a critical noise signal at which the entire device causes a malfunction.
    Type: Application
    Filed: July 1, 2014
    Publication date: January 8, 2015
    Inventor: Noriaki HIRAGA
  • Publication number: 20150009598
    Abstract: An exemplary embodiment relates to a method for detecting a failure on a differential bus. The method may include: determining an allowed voltage range of the differential bus based on a minimum load and a maximum load; comparing a differential bus voltage with the allowed voltage range; and determining a failure state in case the differential bus voltage is outside the allowed voltage range.
    Type: Application
    Filed: July 6, 2013
    Publication date: January 8, 2015
    Inventor: Daniela TROMBETTI
  • Publication number: 20150008935
    Abstract: A method of verifying a protection apparatus is provided. The method includes: setting a plurality of relay elements for sensing an abnormal state of the protection apparatus; receiving an input regarding test information for testing each of the plurality of relay elements; and when at least one of the plurality of relay elements is in an abnormal state from the reception of the input regarding the test information, identifying whether the protection apparatus has created an abnormal state sensing signal.
    Type: Application
    Filed: June 23, 2014
    Publication date: January 8, 2015
    Applicant: LSIS CO., LTD.
    Inventors: Ho Seok CHOI, Yong Kil CHOI
  • Patent number: 8928331
    Abstract: A diagnostic circuit for trouble shooting electronic control units of appliances includes a voltage sensing and signal generation device with an input/output and an input. The circuit includes first terminals for connecting to the load and second terminals for connecting to the two lines of the sinusoidal source. One of the first terminals is connected to the input/output, and another one of the first terminals is connected to the input. A relay is connected between one of the second terminals and the input/output. Another relay is connected between another one of the second terminals and the input. A first diode pair with clamping diodes is connected to the input/output, and a second diode pair first diode pair with clamping diodes is connected to the input.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: January 6, 2015
    Assignee: Diehl AKO Stiftung & Co. KG
    Inventors: Robert Alvord, James Kopec, Jochen Aicher, Vu Nguyen
  • Patent number: 8928341
    Abstract: An apparatus and a method for automated testing of electrostatic discharge of a Device Under Test (DUT) are provided. In the apparatus and the method, an electrostatic pulse is applied to the DUT, a malfunction type is detected from the DUT, and a control command is transmitted to the DUT to return a test mode of the DUT to a normal mode according to the detected malfunction type.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: January 6, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han-Awl Lee, Jae-Kyu Lee, Woong-Hae Choi, Byoung-Hee Lee