Abstract: Apparatus and methods for power amplifiers are disclosed. In one embodiment, a power amplifier circuit assembly includes a power amplifier and an impedance matching network. The impedance matching network is operatively associated with the power amplifier and is configured to provide a load line impedance to the power amplifier between about 6 ? and about 10 ?. The impedance matching network includes a fundamental matching circuit and one or more termination circuits, and the fundamental matching circuit and each of the of the one or more termination circuits include separate input terminals for coupling to an output of the power amplifier so as to allow the fundamental matching circuit and each of the one or more termination circuits to be separately tuned.

Abstract: A power amplifier (20) for operation in at least a first and a second frequency band, wherein a center frequency f2 of the second frequency band is higher than a center frequency f1 of the first frequency band, is disclosed. The power amplifier (20) comprises a transistor (35) for amplifying an input signal of the power amplifier (20) and an output coupling network (45) for connecting the power amplifier to a resistive load (55). The output coupling network (45) is operatively connected to an output terminal (40) of the transistor (35), has an output terminal (50) for connection to said resistive load (55), and is configured such that, when the power amplifier (20) is connected to said resistive load (55), the power amplifier (20) is arranged to operate in class F for frequencies in one of the first and the second frequency bands, and operate in inverse class F for frequencies in the other one of the first and the second frequency band.

Abstract: Embodiments provide transmitter topologies that improve the power efficiency and bandwidth of RF transmitters for high transmission power applications. In an embodiment, the common-emitter/source PA of conventional topologies is replaced with a current-input common-base/gate PA, which is stacked on top on an open-collector/drain current-output transmitter. The common-base/gate PA protects the output of the transmitter from large output voltage swings. The low input impedance of the common-base/gate PA makes the PA less susceptible to frequency roll-off, even in the presence of large parasitic capacitance produced by the transmitter. At the same time, the low input impedance of the common-base/gate PA reduces the voltage swing at the transmitter output and prevents the transmitter output from being compressed or modulated. In an embodiment, the DC output current of the transmitter is reused to bias the PA, which results in power savings compared to conventional transmitter topologies.

Abstract: A speaker driver circuit driven by positive and negative voltages, comprising: at least one operational amplifier providing an output to a headphone speaker, and a voltage converter receiving a supplied voltage (VDD), generating r-fold positive and negative voltages (r·VDD and ?r·VDD, wherein r is any positive real number except 1) according to the supplied voltage, and supplying the positive and negative voltages to the operational amplifier for its high and low operation voltage levels respectively.

Abstract: System and method for common mode translation in continuous-time sigma-delta analog-to-digital converters. An embodiment includes a loop filter having an RC network coupled to a differential signal input, a Gm-C/Quantizer/DAC circuit (GQD) coupled to the loop filter, a common-mode level adjust circuit coupled to signal inputs of the GQD, and a tuning circuit coupled to the GQD and the common-mode level adjust circuit. The GQD evaluates an input signal provided by the RC network. computes a difference between a filtered input signal and the feedback quantization signal to generate an error signal, measures the error signal, and compensates for the error signal with sigma-delta noise-shaping. The common-mode level adjust circuit alters a common-mode level of a differential input signal to be substantially equal to a desired common-mode level and the tuning circuit provides a compensation voltage to the common-mode level adjust circuit based on a difference between the common-mode levels.

Abstract: Power amplifiers and methods of coating a protective film of alumina (Al2O3) on the power amplifiers are disclosed herein. The protective film is applied through an atomic layer deposition (ALD) process. The ALD process can deposit very thin layers of alumina on the surface of the power amplifier in a precisely controlled manner. Thus, the ALD process can form a uniform film that is substantially free of free of pin-holes and voids.

Abstract: A circuitry adapted to operate in a high-temperature environment of a turbine engine is provided. A relatively high-gain differential amplifier (102) may have an input terminal coupled to receive a voltage indicative of a sensed parameter of a component (20) of the turbine engine. A hybrid load circuitry may be coupled to the differential amplifier. A voltage regulator circuitry (244) may be coupled to power the differential amplifier. The differential amplifier, the hybrid load circuitry and the voltage regulator circuitry may each be disposed in the high-temperature environment of the turbine engine.

Abstract: There is presented a high bandwidth circuit for high-speed transceivers. The circuit may comprise an amplifier combining capacitor splitting, inductance tree structures, and various bandwidth extension techniques such as shunt peaking, series peaking, and T-coil peaking to support data rates of 45 Gbs/s and above while reducing data jitter. The inductance elements of the inductance tree structures may also comprise high impedance transmission lines, simplifying implementation. Additionally, the readily identifiable metal structures of inductors and t-coils, the equal partitioning of the load capacitors, and the symmetrical inductance tree structures may simplify transceiver implementation for, but not limited to, a clock data recovery circuit.

Abstract: A compound semiconductor device includes a substrate; and a compound semiconductor multilayer structure which is formed above the substrate and which contains compound semiconductors containing Group III elements, wherein the compound semiconductor multilayer structure has a thickness of 10 ?m or less and a percentage of aluminum atoms is 50% or more of the number of atoms of the Group III elements.

Abstract: A variable gain amplifier device (100) with improved gain resolution is achieved. The device includes a programmable gain amplifier (PGA) (110), an analog-to-digital converter (ADC) (160), an automatic level control (ALC) algorithm means (176), and a delta-sigma modulator (180). The PGA (110) is capable to receive and to amplify an analog input signal (154) to thereby generate an analog output signal (164). The PGA (110) includes an amplifier (160) and a switchable resistor network (120). The ADC (170) is coupled to the PGA (110) and is capable to convert the analog output signal (164) to a digital signal (174). The ALC algorithm means (176) is coupled to the ADC (170) and is capable to generate a control code (178) by processing the digital signal (174). The delta-sigma modulator (186) is coupled to the ALC algorithm means (186) and is capable to generate a pulse-density modulated (PDM) signal (182) by processing the control code (178).

Abstract: An amplifier includes a separating unit, a generator, first to fourth switching amplifiers, and an outputting unit. The separating unit separates a pulse signal into a first separated pulse signal and a second separated pulse signal. The generator generates first to fourth low speed pulse signals by using the first and the second separated pulse signal. The first switching amplifier amplifies the first low speed pulse signal. The second switching amplifier amplifies the second low speed pulse signal by using the output of the first switching amplifier as a power-supply. The third switching amplifier amplifies the third low speed pulse signal. The fourth switching amplifier amplifies the fourth low speed pulse signal by using the output of the third switching amplifier as a power-supply. The outputting unit combines and outputs the first and the second output pulse signal.

Abstract: An amplifying circuit includes: an amplifying cell portion configured by cascade-connecting a plurality stage of amplifying cells each including a pair of N-type transistors differentially connected to each other, load resistors and a current source for generating an operating current, and each having a function of amplifying differential signals; a feedback portion configured to feed differential output signals from the amplifying cell in a rear stage side of the amplifying cell portion back to differential input terminals of the amplifying cell on a front stage side; and an input portion configured to supply differential input signals to input terminals in a first stage of the amplifying cell portion.

Abstract: This disclosure provides systems, methods and apparatus for increasing the efficiency of an amplifier when driven by a variable load. In one aspect a transmitter device is provided. The transmitter device includes a driver circuit characterized by an efficiency. The driver circuit is electrically connected to a transmit circuit characterized by an impedance. The transmitter device further includes a filter circuit electrically connected to the driver circuit and configured to modify the impedance to maintain the efficiency of the driver circuit at a level that is within 20% of a maximum efficiency of the driver circuit. The impedance is characterized by a complex impedance value that is within a range defined by a real first impedance value and a second real impedance value. A ratio of the first real impedance value to the second real impedance value is at least two to one.

Abstract: An amplifier circuit for actuating a light diode is provided. The amplifier circuit may have a small output impedance of approximately 3 Ohms, a large bandwidth having a lower threshold frequency of 200 kHz and an upper threshold frequency of 5 MHz, for example, and an amplitude of the output current of several 100 mA, for example. The amplifier circuit may have an entry stage for actuating a driver circuit that actuates the light diode by means of a direct current supply.

Abstract: Embodiments of the present disclosure relate to an overlay class F choke of a radio frequency (RF) power amplifier (PA) stage and an RF PA amplifying transistor of the RF PA stage. The overlay class F choke includes a pair of mutually coupled class F inductive elements, which are coupled in series between a PA envelope power supply and a collector of the RF PA amplifying transistor. In one embodiment of the RF PA stage, the RF PA stage receives and amplifies an RF stage input signal to provide an RF stage output signal using the RF PA amplifying transistor. The collector of the RF PA amplifying transistor provides the RF stage output signal. The PA envelope power supply provides an envelope power supply signal to the overlay class F choke. The envelope power supply signal provides power for amplification.

Abstract: Power amplifying systems and modules and components therein are designed based on CRLH structures, providing high efficiency and linearity.

Abstract: On a surface of a compound semiconductor layer including inner wall surfaces of an electrode trench, an etching residue 12a and an altered substance 12b which are produced due to dry etching for forming the electrode trench are removed, and a compound semiconductor is terminated with fluorine. Gate metal is buried in the electrode trench via a gate insulating film, or the gate metal is directly buried in the electrode trench, whereby a gate electrode is formed.

Abstract: An amplification system of the invention can decrease power consumption in a power amplification section if the power amplification section need not be used. The power consumption in the power amplification section can be decreased by shutting off power feed into a voltage amplification stage by a power control section, and the power feed state into a power amplification stage from a power supply section is not changed. Thus, power feed into the voltage amplification stage of the circuit wherein a large current does not flow needs only to be controlled using limiter means also used for a different application, so that the power consumption of the power amplification section can be decreased without the need for enlarging the circuit scale, with saved space, and simply.

Abstract: A compound semiconductor device includes a substrate having an opening formed from the rear side thereof; a compound semiconductor layer disposed over the surface of the substrate; a local p-type region in the compound semiconductor layer, partially exposed at the end of the substrate opening; and a rear electrode made of a conductive material, disposed in the substrate opening so as to be connected to the local p-type region.

Abstract: An LNA circuit for providing a wide range of gain while maintaining the output headroom. In a radio frequency (RF) receiver, the signal received by the receiver may be extremely small. For a transmitter in a short distance, the received signal may be relatively strong. A low power amplifier usually is used to amplify the input signal. The LNA has to be designed to accommodate a wide range of gain. A convention LNA circuit supporting a wide range of gain often suffers from reduced output headroom due to increased current through the load resistor. The present invention discloses the use of current bleeding branch to allow a portion of current to flow through the current bleeding branch and consequently reduces the current that would have flown through the load resistor. Consequently, the voltage across the load resistor may be maintained low to allow adequate output headroom.

Abstract: A high performance radio frequency receiver includes an isolated transconductance amplifier with large binary and stepped gain control range, controlled impedance, and enhanced blocker immunity, for amplifying and converting a radio frequency signal to multiple electrically isolated currents; a pulse generator for generating in-phase and quadrature pulses; a crossover correction circuit and pulse shaper for controlling a crossover threshold of the pulses and interaction between in-phase and quadrature mixers; and a double balanced mixer for combining the RF signal with the pulses to generate an intermediate frequency or baseband zero intermediate frequency current-mode signal. The intermediate frequency signal and second order harmonics may be filtered with a high frequency low pass filter and a current injected complex direct-coupled filter. IIP2 calibration of the in-phase and quadrature channels may be optimized using the isolated transconductance amplifier.

Abstract: A current control mechanism for use in low power consumption circuits with limited headroom includes a differential transistor pair from whose collectors a current output is taken. The current output is a function of a reference voltage provided at bases of a reference transistor pair having emitters that are coupled to the bases of the differential pair. The reference voltage is controlled by a pair of control transistors that control current through a load. A pair of tracking transistors can be provided to track supply voltage. A single-ended topology can also be implemented.

Abstract: An amplifier circuit for current amplification. An input stage is adapted to receive an input signal. At least one current multiplication stage is connected to the input stage. The current multiplication stage is adapted to receive a current signal from the input stage and to produce a multiplied output current signal at an output of the amplifier circuit. The current multiplication stage includes at least two current multiplication circuits connected to each other. Each current multiplication circuit is adapted to produce an output current signal essentially equal to the current signal from the input stage, such that the output current signal at an output of the amplifier circuit includes a sum of the current signals received at each current multiplication circuit. A method of improving linearity in an amplification circuit.

Abstract: An amplifying device has an amplifier which amplifies an input signal supplied from an input terminal and outputs the amplified input signal, a feedback loop which has at least one of a resistive element and a capacitance connected between an output terminal of the amplifier and the input terminal, a variable current unit which adjusts a current value in accordance with a controlling signal and supplies an operating current to the amplifier, a signal analyzing unit which generates a time difference signal having a value corresponding to a slew rate of the input signal and outputs the time difference signal, and a controlling unit which generates the controlling signal in accordance with the time difference signal and outputs the controlling signal.

Abstract: Various embodiments comprise apparatus, methods, and systems that include an amplification apparatus comprising a first input, a second input, and an output, a first plurality of series-connected transistors including a first transistor having a first channel ratio and a first gate coupled to the first input, and a second plurality of series-connected transistors including a second transistor having a second channel ratio that is greater than the first channel ratio, the second transistor including a second gate coupled to the second input.

Abstract: The present invention discloses a half-voltage headphone driver circuit, comprising: at least one operational amplifier providing an output to a headphone speaker, and a charge pump receiving a supply voltage (VDD), generating a positive half-voltage and a negative half-voltage (VDD/2 and ?VDD/2) based on the supply voltage, and supplying the positive half-voltage and negative half-voltage as high and low operation levels to the at least one operational amplifier.

Abstract: Receiver architectures and bias circuits for a data processor are provided. A receiver architecture includes a linear receiver having a first input node for a data (DQ) signal, a second input node for a reference voltage, and output nodes for a differential output signal. The linear receiver compares the DQ signal to the reference voltage, and generates the differential output signal in response to the comparison. A sense amplifier is coupled to the linear receiver. The sense amplifier has input nodes connected to the output nodes of the linear receiver, and an output node for a binary output signal having voltage characteristics compatible with the processor. The sense amplifier transforms the differential output signal into the binary output signal. The receiver architecture also includes a programming architecture coupled to the linear receiver to set operating characteristics of the linear receiver.

Abstract: The collector, emitter, and base of a bipolar transistor circuit are connected to a high side power supply terminal, the drain of a level shift transistor, and a floating power supply terminal, respectively. When a high side output transistor is on, the floating power supply terminal is at the potential of a high potential power supply terminal. The high side power supply terminal is at a potential higher than the potential of the floating power supply terminal by a constant voltage. Turning the level shift transistor on, its drain potential drops below the potential of the floating power supply terminal; The base current flows through the bipolar transistor circuit and the drain potential of the level shift transistor is clamped near the potential of the floating power supply terminal; The bipolar transistor circuit is turned on and its collector current supplies the drain current of the level shift transistor.

Abstract: A system for saturation detection, correction and recovery in a power amplifier includes a power amplifier, a closed power control loop configured to develop a power control signal (VPC), and power control circuitry configured to reduce the power control signal if the power amplifier is operating in a saturation mode.

Abstract: A thin film transistor (TFT) liquid crystal display panel driving device and a method thereof are provided. The TFT liquid crystal display panel driving device is characterized by including a modulation signal generator for providing at least one modulation signal to at least one output buffer of a source driver of the TFT liquid crystal display panel. The output buffer(s) has chopper function. Each output buffer changes the offset voltages of the pixels of a same frame under the control of different modulation signals, thus eliminating the effect of the offset voltages of the output buffer(s) on the display quality.

Abstract: A voltage supply circuit includes a booster outputting a voltage boosted from a power supply voltage and an amplifier operating with a voltage output from the booster as a power supply and supplying a bias voltage to a sensor. An output voltage value of the booster that generates a power supply voltage of the amplifier is set according to a signal for specifying a sensitivity of the sensor.

Abstract: A method for compensating a power amplifier based on operational-based changes begins by measuring one of a plurality of operational parameters of the power amplifier to produce a measured operational parameter. The method continues by comparing the measured operational parameter with a corresponding one of a plurality of desired operational parameter settings. The method continues by, when the comparing of the measured operational parameter with the corresponding one of a plurality of desired operational parameter settings is unfavorable, determining a difference between the measured operational parameter and the corresponding one of a plurality of desired operational parameter settings. The method continues by calibrating the one of the plurality of operational settings based on the difference.

Abstract: A highly linear and very low-noise down-conversion mixer for extracting weak signals in the presence of very strong unwanted signals is disclosed. Aspects of an embodiment may include a source follower circuit in a transmitter front end of a mobile terminal. The source follower circuit may receive RF signals prior to the RF signals being amplified by a power amplifier for transmission. The RF signals may comprise in-phase and quadrature components. The source follower circuit may generate output RF voltage signals, and communicate the output RF voltage signals to a switching circuit via a coupling capacitor. The switching circuit may down-convert the communicated output RF voltage signals to generate differential baseband signals. The capacitance of the coupling capacitor may be changed to change gain and/or linearity of the differential baseband signals. Each of the differential baseband signals may be low-pass filtered to attenuate higher frequencies.

Abstract: An electrical circuit includes an amplifier. The amplifier includes an input circuit in communication with an input of the amplifier. A start-up circuit is in communication with the input circuit. The start-up circuit is configured to generate a start-up signal to enable subsequent operation of the amplifier. The start-up circuit turns off when an output of the amplifier reaches a threshold voltage. An output circuit is in communication with each of the outputs of the amplifier, the input circuit, and the start-up circuit.

Abstract: A semiconductor device includes a p-type semiconductor layer and an n-type semiconductor layer that are joined by sandwiching a depletion layer with a thickness that allows transmission of a plurality of electrons and holes by direct-tunneling.

Abstract: A circuit arrangement for providing an analog signal is disclosed. The circuit arrangement comprises a biasing resistor; an analog input arrangement; and a signal output, wherein the biasing resistor and the analog input arrangement are connected in series between a supply voltage and a reference voltage, and the signal output is connected such that the alternating voltage over the biasing resistor is provided as an output signal. An electronic apparatus comprising such a circuit arrangement is also disclosed.

Abstract: An embodiment of a multi-path, multi-oxide-thickness amplifier circuit includes a first amplifier having at least one thin-oxide output transistor, and a second amplifier having at least one thick-oxide output transistor. The first and second amplifiers are connected in parallel with each other between an input terminal and an output terminal of the amplifier circuit. The thin-oxide output transistor has a gate-oxide layer thickness that is less than a gate-oxide layer thickness of the thick-oxide output transistor.

Abstract: A current limiting circuit including a transistor is disclosed. The current limiting circuit is coupled with a voltage and includes a summing network, wherein a first voltage input of the summing network is capable of receiving a voltage that is proportional with the current flowing through the transistor. The current limiting circuit further including a differential circuit, wherein a first input of the differential circuit is coupled with an output of the summing network, a second input of the differential circuit is coupled with a voltage ramp signal, and an output of the differential circuit is coupled with a gate of the transistor. The current limiting circuit still further including a voltage divider network coupled between the drain of the transistor and the second voltage input of the summing network.

Abstract: A transimpedance amplifier according to an exemplary aspect of the present invention includes a first terminal supplied with a first power supply voltage, and a second terminal supplied with a second power supply voltage having a potential lower than that of the first power supply voltage. The transimpedance amplifier outputs a voltage signal that is converted into a binary signal of one of the first power supply voltage and the second power supply voltage, based on an input analog current signal. This makes it possible to reduce a conversion error.

Abstract: The present invention relates to an amplifier circuit (1; 12), comprising amplifying means (2; 2?) adapted to amplify a signal and to output the amplified signal in a first output (3; 3?), a coupling line (6; 6?) connected to the first output line (3; 3?) in a first connection point (5; 5?) and having a length so that a standing electrical wave is generated in it, and a second output line (8; 8?) coupled to the coupling line (6; 6?) in a second connection point (7; 7?) so that a power level of a resulting signal in the second output line (8; 8?) is depending on the power level of the amplified signal in the first output line (3; 3?). The present invention allows a high integration of an amplifier circuit and an integrated circuit with small size.

Abstract: A system for processing signal communications between a frequency translation module and an integrated receiver decoder. According to an exemplary embodiment, the decoder and the frequency translation module comprise a signal processing apparatus comprising an input for receiving an frequency shift keyed modulated signal, an amplifier having negative feedback coupled to said input, wherein said input is further coupled to a first source of reference potential and a second source of reference potential; and a tank circuit coupled between said differential amplifier and an output.

Abstract: A power amplifier of the present invention includes (i) a bipolar transistor for amplifying a signal supplied via a base terminal, so as to obtain an amplified signal, and outputting the amplified signal via a collector terminal and (ii) an inductor between an emitter terminal of the bipolar transistor and a ground. An inductance between the emitter terminal and the ground is larger than a parasitic inductance between the emitter terminal and the ground between which the inductor is not provided. This allows the bipolar transistor to increase an output power without increasing an emitter area. As a result, the present invention makes it possible to provide a highly efficient high-power power amplifier.

Abstract: An amplifier circuit and a method of signal amplification are provided. The amplifier circuit includes a first amplifier and a charge pump. The first amplifier includes a first terminal, a second terminal, and a third terminal. The first terminal is coupled to a first external voltage. The second terminal is coupled to a negative voltage. The third terminal is coupled to a ground reference voltage. The charge pump is coupled to the first amplifier for providing the negative voltage transformed from a second external voltage.

Abstract: A data sampler including a first stage and a second stage. The first stage is configured to receive differential signals and provide a first edge rate in a first output signal and a second edge rate in a second output signal based on the differential signals. The second stage is configured to amplify the difference between the first output signal and the second output signal to provide regenerated output signals. The second stage provides a third edge rate in a first internal signal and a fourth edge rate in a second internal signal based on the first edge rate and the second edge rate.

Abstract: Disclosed embodiments provide a method and apparatus for measuring the gain of output transistors of pixels in an imager device. Source/drain terminals of the output transistor and a reset transistor are driven with various input voltages to generate pixel output voltages. The slope of a line representing the relationship between the output voltages and the input voltages is determined. A component of the slope corresponding to gain not caused by the output transistor is removed from the slope to determine the gain of the output transistor.

Abstract: A system for saturation detection, correction and recovery in a power amplifier includes a power amplifier, a closed power control loop configured to develop a power control signal (VPC), and power control circuitry configured to reduce the power control signal if the power amplifier is operating in a saturation mode.

Abstract: A semiconductor photosensor device includes a plurality of photodiode sections, a switch, and an output section is provided. The plurality of photodiode sections have different illuminance-output characteristics. The switch selects any one of the plurality of photodiode sections on the basis of an illuminance of incident light irradiated on the photodiode sections. The output section outputs an output signal from the selected photodiode section through the switch.

Abstract: According to one embodiment, a system, apparatus, and method for receiving high-speed signals using a receiver with a transconductance amplifier is presented. The apparatus comprises a transconductance amplifier to receive input voltage derived from an input signal, a clocked current comparator to receive output current from the transconductance amplifier, and a storage element to receive a binary value from the clocked current comparator.

Abstract: A power amplifier system includes a first power detector configured to detect a forward power output of a power amplifier, the first power detector configured to provide a first power detector output and an adjustable load coupled to the output of the power amplifier and configured to receive the first power detector output, the adjustable load configured to provide an adjustable impedance at the output of the power amplifier in response to one of the output of the power amplifier and the first power detector output.

Abstract: The present invention discloses an apparatus and a method for determining the voltage level of a first signal from a playback device having an interface in compliance with an industrial standard. According to the method, first receive the first signal by a signal receiving pin electrically coupled to a signal transmitting pin of the interface. Then output a first output voltage by processing the first signal by the combination of a first zener diode and a first transistor and a second output voltage by processing the first signal by the combination of a second zener diode and a second transistor. Thus the voltage level of the first signal can be determined according to the first output voltage and the second output voltage.