Abstract: Hardmask films having high hardness and low stress are provided. In some embodiments a film has a stress of between about ?600 MPa and 600 MPa and hardness of at least about 12 GPa. In some embodiments, a hardmask film is prepared by depositing multiple sub-layers of doped or undoped silicon carbide using multiple densifying plasma post-treatments in a PECVD process chamber. In some embodiments, a hardmask film includes a high-hardness boron-containing film selected from the group consisting of SixByCz, SixByNz, SixByCzNw, BxCy, and BxNy. In some embodiments, a hardmask film includes a germanium-rich GeNx material comprising at least about 60 atomic % of germanium. These hardmasks can be used in a number of back-end and front-end processing schemes in integrated circuit fabrication.

Abstract: A substrate processing apparatus having a processing chamber for processing a substrate; a processing gas feeding line for feeding a processing gas into the processing chamber; an inert gas feeding line for feeding an inert gas into the processing chamber; an inert gas vent line provided in the inert gas feeding line, for exhausting the inert gas fed into the inert gas feeding line without feeding the inert gas into the processing chamber; a first valve provided in the inert gas feeding line, on a downstream side of a part where the inert gas vent line is provided in the inert gas feeding line; a second valve provided in the inert gas vent line; and an exhaust line that exhausts an inside of the processing chamber.

Abstract: A method and apparatus are presented for reducing halide-based contamination within deposited titanium-based thin films. Halide adsorbing materials are utilized within the deposition chamber to remove halides, such as chlorine and chlorides, during the deposition process so that contamination of the titanium-based film is minimized. A method for regenerating the halide adsorbing material is also provided.

Abstract: A metal substrate with an insulation layer includes a metal substrate having at least an aluminum base and an insulation layer formed on said aluminum base of said metal substrate. The insulation layer is a porous type anodized film of aluminum. The anodized film includes a barrier layer portion and a porous layer portion, and at least the porous layer portion has compressive strain at room temperature. a magnitude of the strain ranges from 0.005% to 0.25%. The anodized film has a thickness of 3 micrometers to 20 micrometers.

Abstract: A semiconductor device and a method of forming it are disclosed in which at least two adjacent conductors have an air-gap insulator between them which is covered by nanoparticles of insulating material being a size which prevent the nanoparticles from substantially entering into the air-gap.

Abstract: The present invention provides a method for forming by plasma CVD a silicon nitride film that can be formed over heat-sensitive elements as well as an electroluminescent element and that has favorable barrier characteristics. Further, the present invention also provides a semiconductor device, a display device and a light-emitting display device formed by using the silicon nitride film. In the method for forming a silicon nitride film by plasma CVD, silane (SiH4), nitrogen (N2) and a rare gas are introduced into a deposition chamber in depositing, and the reaction pressure is within the range from 0.01 Torr to 0.1 Torr.

Abstract: A manufacturing method of a gate dielectric layer that includes a nitride layer and an oxide layer is provided. A substrate is provided. A nitridation treatment is performed to form the nitride layer on the substrate. An oxidation treatment is performed subsequent to the formation of the nitride layer to form the oxide layer between the nitride layer and the substrate.

Abstract: A resist underlayer composition includes a solvent and an organosilane condensation polymerization product, the organosilane condensation polymerization product including about 40 to about 80 mol % of a structural unit represented by the following Chemical Formula 1,

Abstract: A method for forming the gate insulator of a MOS transistor, including the steps of: a) forming a thin silicon oxide layer at the surface of a semiconductor substrate; b) incorporating nitrogen atoms into the silicon oxide layer by plasma nitridation at a temperature lower than 200° C., to transform this layer into a silicon oxynitride layer; and c) coating the silicon oxynitride layer with a layer of a material of high dielectric constant, wherein steps b) and c) follow each other with no intermediate anneal step.

Abstract: A method for the formation of an Ni film is herein disclosed, which comprises the steps of maintaining the temperature of an Si substrate at a desired level in a vacuum chamber; introducing, into the vacuum chamber, a nickel alkylamidinate (in this organometal compound, the alkyl group is a member selected from the group consisting of a methyl group, an ethyl group, a butyl group and a propyl group), H2 gas and NH3 gas; and then forming an Ni film according to the CVD technique, wherein the film-forming temperature is set at a level between higher than 280° C. and not higher than 350° C.

Abstract: The present invention provides a surface treatment method for germanium based device. Through performing surface pretreatment to the germanium based device by using an aqueous solution of ammonium fluoride as a passivant, the interface state may be reduced, the formation of natural oxidation layer at the germanium surface may be inhibited, the regeneration of natural oxidation layer and the out-diffusion of the germanium based substrate material can be effectively inhibited, and the thermal stability of the metal germanide may also be increased significantly, so that the interface quality of the germanium based device is improved easily and effectively, which are advantageous to improve the performance of the germanium based transistor.

Abstract: Devices and methods for forming a self-aligned airgap interconnect structure includes etching a conductive layer to a substrate to form conductive structures with patterned gaps and filling the gaps with a sacrificial material. The sacrificial material is planarized to expose a top surface of the conductive layer. A permeable cap layer is deposited over the conductive structure and the sacrificial material. Self-aligned airgaps are formed by removing the sacrificial material through the permeable layer.

Abstract: The present invention forms Hf1-xSixOy having a cubic phase or a tetragonal phase by doping a specific amount of SiO2 component into the high-K gate dielectric material HfO2 in combination with an optimized thermal processing technique, to thereby acquire a high-K gate dielectric thin film material having a greater bandgap, a higher K value and high thermal stability. Besides, the high-K gate dielectric thin film and a preparation method thereof proposed in the present invention are helpful to solve the problem of crystallization of ultra-thin films.

Abstract: The invention relates to integrated circuit fabrication, and more particularly to a semiconductor device with a gate dielectric layer. An exemplary structure for a semiconductor device comprises a substrate having a first active region; a first gate structure over the first active region, wherein the first gate structure comprises a first interfacial layer having a convex top surface; a first high-k dielectric over the first interfacial layer; and a first gate electrode over the first high-k dielectric.

Abstract: A back contact single heterojunction solar cell and associated fabrication process are provided. A first semiconductor substrate is provided, lightly doped with a first dopant type. The substrate has a first energy bandgap. A second semiconductor is formed over a region of the substrate backside. The second semiconductor has a second energy bandgap, larger than the first energy bandgap. A third semiconductor layer is formed over the first semiconductor substrate topside, moderately doped with the first dopant and textured. An emitter is formed in the substrate backside, heavily doped with a second dopant type, opposite of the first dopant type, and a base is formed in the substrate backside, heavily doped with the first dopant type. Electrical contacts are made to the base and emitter. Either the emitter or base is formed in the second semiconductor.

Abstract: An isolation structure, such as a trench isolation structure, may be formed by forming an aperture in a semiconductor substrate and then filling the aperture with boron. In some embodiments, the aperture filling may use atomic layer deposition. In some cases, the boron may be amorphous boron. The aperture may be a high aspect ratio aperture, such as a trench, in some embodiments.

Abstract: A semiconductor device including a substrate having at least one nitride material lined isolation cavity; and a hafnium containing dielectric fill at least partially contained in and at least partially covering at least a portion of the at least one nitride lined isolation cavity.

Abstract: A deposition method capable of forming an oxide film with a predetermined film thickness ratio using a deposition gas with which a small film thickness ratio is obtained and a deposition gas with which a large film thickness ratio is obtained. When forming an oxide film having a larger film thickness on the surface of a substrate than on the bottom surface of the hole so that the film thickness ratio of the oxide film formed on the surface of the substrate to the oxide film formed on the bottom surface of the hole becomes a predetermined ratio, plasma is generated from a gas mixture including tetraethoxysilane and oxygen to form an oxide film and then plasma is generated from a gas mixture including silane and nitrous oxide.

Abstract: Methods for formation and treatment of pure metal layers using CVD and ALD techniques are provided. In one or more embodiments, the method includes forming a metal precursor layer and treating the metal precursor layer to a hydrogen plasma to reduce the metal precursor layer to form a metal layer. In one or more embodiments, treating the metal precursor layer includes exposing the metal precursor layer to a high frequency-generated hydrogen plasma. Methods of preventing a hydrogen plasma from penetrating a metal precursor layer are also provided.

Abstract: Discloses is a method for depositing a thin metal oxide film on a substrate, comprising: providing a substrate (104); sequentially and alternatingly exposing a surface of said substrate to a first metal precursor and a first oxidant precursor, so as to deposit a first portion (116) of said metal oxide film (114) having a first thickness; and sequentially and alternatingly exposing the surface of the substrate to a second metal precursor and a second oxidant precursor, so as to deposit a second portion (118) of said metal oxide film (114) having a second thickness over said first portion of said metal oxide film, wherein the second oxidant precursor is ozone or oxygen plasma, while the first oxidant precursor is a milder oxidant than ozone. Also disclosed is a solar cell (100) including a metal oxide passivation film (114) deposited by said method.

Abstract: Antireflective residues during pattern transfer and consequential short circuiting are eliminated by employing an underlying sacrificial layer to ensure complete removal of the antireflective layer. Embodiments include forming a hard mask layer over a conductive layer, e.g., a silicon substrate, forming the sacrificial layer over the hard mask layer, forming an optical dispersive layer over the sacrificial layer, forming a silicon anti-reflective coating layer over the optical dispersive layer, forming a photoresist layer over the silicon anti-reflective coating layer, where the photoresist layer defines a pattern, etching to transfer the pattern to the hard mask layer, and stripping at least the optical dispersive layer and the sacrificial layer.

Abstract: A method for fabricating a nonvolatile charge trap memory device is described. The method includes providing a substrate having a charge-trapping layer disposed Thereon. A portion of the charge-trapping layer is then oxidized to form a blocking dielectric layer above the charge-trapping layer by exposing the charge-trapping layer to a radical oxidation process.

Abstract: A method of manufacturing a semiconductor device according to the present invention includes the steps of: (a) introducing hydrogen and oxygen on a SiC substrate; and (b) subjecting the hydrogen and the oxygen to a combustion reaction on the SiC substrate to form a gate oxide film being a silicon oxide film on a surface of the SiC substrate by the combustion reaction.

Abstract: A method for forming a germanium oxide film between a germanium substrate and an insulating film includes producing atomic oxygen on a surface of the insulating film formed on a surface of the germanium substrate by generating a plasma of a processing gas containing oxygen atom-containing gas. The method further includes forming a germanium oxide film by reacting germanium with the atomic oxygen which has reached the germanium substrate after penetrating the insulating film by irradiating the plasma on the surface of the insulating film.

Abstract: A method of manufacturing a semiconductor device includes the steps of: preparing an underlying structure having a silicon carbide layer covering a copper wiring, and growing silicon oxycarbide on the underlying structure by vapor deposition using, as source gas, tetramethylcyclotetrasiloxane, carbon dioxide gas and oxygen gas, a flow rate of said oxygen gas being at most 3% of a flow rate of the carbon dioxide gas. The surface of the silicon carbide layer of the underlying structure may be treated with a plasma of weak oxidizing gas which contains oxygen and has a molecular weight larger than that of O2 to bring the surface more hydrophilic. Film peel-off and cracks in the interlayer insulating layer decrease.

Abstract: High performance thin-film, transistors are entirely processed at temperatures not exceeding 150° C., using amorphous multi component dielectrics based on the mixture of high band gap and high dielectric constant (K) materials. The sputtered or ink jet printed mixed dielectric materials such as Ta2O5 with SiO2 or Al2O3 or HfO2 with SiO2 or Al2O3 are used. These multicomponent dielectrics allow producing amorphous dielectrics to be introduced in high stable electronic devices with low leakage currents, while preserving a high dielectric constant. This results in producing thin film transistors with remarkable electrical properties, such as the ones produced based on Ga—In—Zn oxide as channel layers and where the dielectric was the combination of the mixture Ta2O5:SiO2, exhibiting field-effect mobility exceeding 35 cm2 V?1 s?1, close to 0 V turn-on voltage, on/off ratio higher than 106 and subthreshold slope below 0.24 V dec?1.

Abstract: Disclosed is a processing method that removes moisture in a low permittivity film formed on a substrate to be processed which has a damaged layer on the surface thereof while maintaining the specific permittivity or a leakage current value low when the film is subjected to a recovery processing. The method for the recovery processing includes applying, on the damaged layer of the low permittivity film, a first processing gas whose molecules are small sufficient to permeate the inside of the damaged layer of the low permittivity film and which is able to remove the moisture in the damaged layer and a second processing gas which forms a hydrophobic dense reformatted layer on the surface of the damaged layer, thereby allowing the first processing gas and the second processing gas to react with the damaged layer.

Abstract: A method of forming a dielectric film including a zirconium oxide film includes: forming a zirconium oxide film on a substrate to be processed by supplying a zirconium material and an oxidant, the zirconium material including a Zr compound which includes a cyclopentadienyl ring in a structure, and forming a titanium oxide film on the zirconium oxide film by supplying a titanium material and an oxidant, the titanium material including a Ti compound which includes a cyclopentadienyl ring in a structure.

Abstract: An improved method of performing sidewall spacer imager transfer is presented. The method includes forming a set of sidewall spacers next to a plurality of mandrels, the set of sidewall spacers being directly on top of a hard-mask layer; transferring image of at least a portion of the set of sidewall spacers to the hard-mask layer to form a device pattern; and transferring the device pattern from the hard-mask layer to a substrate underneath the hard-mask layer.

Abstract: A semiconductor memory device includes a semiconductor substrate, a plurality of element isolations, a plurality of first stacked bodies, a second stacked body, and an interlayer insulating film. Distance between each of the first stacked bodies and the second stacked body is longer than distance between adjacent ones of the first stacked bodies. A first void is formed in the interlayer insulating film between the first stacked bodies. A second void is formed in the interlayer insulating film between one of the first stacked bodies and the second stacked body. And, a lower end of the second void is located above a lower end of the first void.

Abstract: The present invention relates to formula, comprising at least one solvent, and at least one functional composition of the general formula (I), wherein A is a functional structural element, B is a solvent-providing structural element, and k is an integer in the range of 1 to 20. The molecular weight of the functional composition is at least 550 g/mol, and the solvent-providing structural element B corresponds to the general formula ((L-I). Ar1, Ar2 JeWeUs, independently of each other, signify an aryl or heteroaryl group, which can be substituted with one or several discretionary residues R. Each X is, independently of one another, N or CR2, preferably CH.

Abstract: A system for the long-term storage and high-speed retrieval of color images stored on semiconductor substrates. The images are stored on semiconductor substrates by utilizing semiconductor fabrication techniques to produce a plurality of images. A transparent thin-film dielectric varies in thickness to product a color palette.

Abstract: A reactive cyclodextrin derivative or a reactive glucose derivative is used as a template derivative for forming an ultra-low dielectric layer. A layer is formed of the reactive cyclodextrin derivative or the reactive glucose derivative capped with Si—H and then cured in an atmosphere of hydrogen peroxide to form the ultra-low dielectric layer.

Abstract: A substrate structure is produced by forming a first material layer on a substrate having a recess, removing the first material layer from the portion of the substrate except for the recess using a second material that reacts with the first material, and forming a deposition film from the first material layer using a third material that reacts with the first material. A method of manufacturing a device may include the method of forming a substrate structure.

Abstract: A process for forming a protective layer at a surface of an aluminum bond pad. The aluminum bond pad is exposed to a solution containing silicon, ammonium persulfate and tetramethylammonium hydroxide, which results in the formation of the protective layer. This protective layer protects the bond pad surface from corrosion during processing of an imager, such as during formation of a color filter array or a micro-lens array.

Abstract: The temperature of a substrate is elevated rapidly while improving the temperature uniformity of the substrate. The substrate is loaded into a process chamber, the loaded substrate is supported on a first substrate support unit, a gas is supplied to the process chamber, the temperature of the substrate supported on the first substrate support unit is elevated in a state of increasing the pressure in the process chamber to higher than the pressure during loading of the substrate or in a state of increasing the pressure in the process chamber to higher than the pressure during processing for the surface of the substrate, the substrate supported on the first substrate support unit is transferred to the second substrate support unit and supported thereon after lapse of a predetermined time, and the surface of substrate is processed while heating the substrate supported on the second substrate support unit.

Abstract: A method for forming a split gate flash cell memory device provides for establishing a floating gate region then using spacers or other hard mask materials that cover opposed edges of a gate electrode material in the gate region, to serve as hard masks during an etching operation that partially etches the gate electrode material which may be polysilicon. The gate electrode so produced serves as a floating gate electrode and includes a recessed central portion flanked by a pair of opposed upwardly extending fins which may terminate upwardly at an apex. A floating gate oxide is then formed by thermal oxidation and/or oxide deposition techniques.

Abstract: Aspects of the disclosure pertain to methods of depositing conformal silicon oxide multi-layers on patterned substrates. The conformal silicon oxide multi-layers are each formed by depositing multiple sub-layers. Sub-layers are deposited by flowing BIS(DIETHYLAMINO)SILANE (BDEAS) and an oxygen-containing precursor into a processing chamber such that a relatively uniform dielectric growth rate is achieved across the patterned substrate surface. A plasma treatment may follow formation of sub-layers to further improve conformality and to decrease the wet etch rate of the conformal silicon oxide multi-layer film. The deposition of conformal silicon oxide multi-layers grown according to embodiments have a reduced dependence on pattern density while still being suitable for non-sacrificial applications.

Abstract: A method for fabricating a semiconductor memory device includes forming a photoresist layer on a substrate, performing an exposure process such by illuminating a first area of the photoresist layer with a first amount of a light and illuminating a second area of the photoresist layer with a light of a second amount smaller than the first amount, removing the first area of the photoresist layer to form a photoresist pattern, and forming a capping layer on a surface of the photoresist pattern.

Abstract: The present invention relates to coated binary and ternary nanoparticle chalcogenide compositions that can be used as copper zinc tin chalcogenide precursor inks. In addition, this invention provides processes for manufacturing copper zinc tin chalcogenide thin films and photovoltaic cells incorporating such thin films.

Abstract: According to one embodiment, a pattern data generating apparatus comprises a storage unit that stores a table defining direct self assembly information that combines a direct self assembly material, a film thickness of the direct self assembly material, and a process condition for the direct self assembly material according to a pattern dimension, a division unit that divides layout data of a device based on the pattern dimension to generate divided layouts, an extraction unit that extracts the direct self assembly information corresponding to the pattern dimension of the divided layout from the table, and a generation unit that generates pattern data by allocating the direct self assembly information extracted by the extraction unit to the divided layouts.

Abstract: In a low-temperature, a silicon nitride film having a low in-film chlorine (Cl) content and a high resistance to hydrogen fluoride (HF) is formed. The formation of the silicon nitride film includes (a) supplying a monochlorosilane (SiH3Cl or MCS) gas to a substrate disposed in a processing chamber, (b) supplying a plasma-excited hydrogen-containing gas to the substrate disposed in the processing chamber, (c) supplying a plasma-excited or heat-excited nitrogen-containing gas to the substrate disposed in the processing chamber, (d) supplying at least one of a plasma-excited nitrogen gas and a plasma-excited rare gas to the substrate disposed in the processing chamber, and (e) performing a cycle including the steps (a) through (d) a predetermined number of times to form a silicon nitride film on the substrate.

Abstract: A method of forming a film on a semiconductor substrate by plasma enhanced atomic layer deposition (PEALD), includes: introducing a nitrogen- and hydrogen-containing reactive gas and a rare gas into a reaction space inside which the semiconductor substrate is placed; introducing a precursor in pulses of less than 1.0-second duration into the reaction space wherein the reactive gas and the rare gas are introduced; exiting a plasma in pulses of less than 1.0-second duration immediately after the precursor is shut off; and maintaining the reactive gas and the rare gas as a purge of less than 2.0-second duration.

Abstract: A method for forming a pattern includes: forming a resist film on an object and patterning the formed resist film; forming a spacer film to coat the object and the resist film, and forming a concave portion surrounded by the spacer film; forming a first opening from the concave portion by etching a portion of the spacer film so that the spacer film remains beside a side wall of the resist film while exposing the object under the concave portion and the top surface of the resist film; and forming a second opening by removing the resist film.

Abstract: A method of forming a dielectric film having at least Si—N, Si—C, or Si—B bonds on a semiconductor substrate by atomic layer deposition (ALD), includes: adsorbing a precursor on a surface of a substrate; supplying a reactant gas over the surface; reacting the precursor and the reactant gas on the surface; and repeating the above steps to form a dielectric film having at least Si—N, Si—C, or Si—B bonds on the substrate. The precursor has at least one Si—C or Si—N bond, at least one hydrocarbon, and at least one halogen attached to silicon in its molecule.

Abstract: A method of manufacturing a semiconductor device comprises the steps of (a) applying a resin member onto a front surface of a semiconductor wafer having an uneven structure on the front surface thereof, and (b) flattening a surface of the resin member by heating the resin member, and in the method, the resin member is formed also on a side surface of the semiconductor wafer. The method further comprises the steps of (c) performing a thinning process for the semiconductor wafer on a back surface thereof after the step (b), and (d) removing the resin member from the semiconductor wafer after the step (c). By the method, it is possible to uniformize the thickness of a semiconductor wafer which is thinned and reduce the number of foreign matters remaining on a surface of the semiconductor wafer.

Abstract: A semiconductor device and a method of fabricating a semiconductor device including a step of providing a substrate having a first region and a second region adjacent to each other, a step of forming a structure on the substrate in the first region, the structure including a top surface and a sidewall, a step of forming a first insulation layer on the substrate including the structure, the first insulation layer including a first top surface in the first region, an inclined sidewall on the sidewall of structure, and a second top surface in the second region, a step of forming a second insulation layer on the first insulation layer, and a step of planarizing the second and first insulation layers to form a common planarized surface.

Abstract: A substrate processing apparatus includes a processing chamber configured to process a plurality of substrates, a substrate holder accommodated within the processing chamber and configured to hold the substrates in a vertically spaced-apart relationship, a thermal insulation portion configured to support the substrate holder from below within the processing chamber, a heating unit provided to surround a substrate accommodating region within the processing chamber, and a gas supply system configured to supply a specified gas to at least a thermal insulation portion accommodating region within the processing chamber.

Abstract: Hardmask films having high hardness and low stress are provided. In some embodiments a film has a stress of between about ?600 MPa and 600 MPa and hardness of at least about 12 GPa. In some embodiments, a hardmask film is prepared by depositing multiple sub-layers of doped or undoped silicon carbide using multiple densifying plasma post-treatments in a PECVD process chamber. In some embodiments, a hardmask film includes a high-hardness boron-containing film selected from the group consisting of SixByCz, SixByNz, SixByCzNw, BxCy, and BxNy. In some embodiments, a hardmask film includes a germanium-rich GeNx material comprising at least about 60 atomic % of germanium. These hardmasks can be used in a number of back-end and front-end processing schemes in integrated circuit fabrication.

Abstract: A method of manufacturing an SiC semiconductor device includes the steps of forming a first oxide film on a first surface of an SiC semiconductor, removing the first oxide film, and forming a second oxide film constituting the SiC semiconductor device on a second surface exposed as a result of removal of the first oxide film in the SiC semiconductor. Between the step of removing the first oxide film and the step of forming a second oxide film, the SiC semiconductor is arranged in an atmosphere cut off from an ambient atmosphere.