Abstract: A chemical vapor deposition (CVD) method for depositing materials including germanium (Ge), antimony (Sb) and nitrogen (N) which, in some embodiments, has the ability to fill high aspect ratio openings is provided. The CVD method of the instant invention permits for the control of nitrogen-doped GeSb stoichiometry over a wide range of values and the inventive method is performed at a substrate temperature of less than 400° C., which makes the inventive method compatible with existing interconnect processes and materials. In some embodiments, the inventive method is a non-selective CVD process, which means that the nitrogen-doped GeSb materials are deposited equally well on insulating and non-insulating materials. In other embodiments, a selective CVD process is provided in which the nitrogen-doped GeSb materials are deposited only on regions of a substrate in a metal which is capable of forming an eutectic alloy with germanium.

Abstract: A method for forming a semiconductor device includes forming a gate dielectric over a substrate, forming a metal electrode over the gate dielectric, forming a first sacrificial layer which includes polysilicon or a metal over the metal electrode, removing the first sacrificial layer, and forming a gate electrode contact over and coupled to the metal electrode.

Abstract: A semiconductor package can comprise a die stack attached to a substrate, with bond wires electrically connecting the two. Often multiple die stacks are adhered to a single substrate so that several semiconductor packages can be manufactured at once. A molding compound flow controller is optimally associated with the substrate or semiconductor package at one or more various locations. Flow controllers can control or direct the flow of the molding compound during the encapsulation process. Flow controllers can be sized, shaped, and positioned in order to smooth out the flow of the molding compound, such that the speed of the flow is substantially equivalent over areas of the substrate containing dies and over areas of the substrate without dies. In this manner, defects such as voids in the encapsulation, wire sweeping, and wire shorts can be substantially avoided during encapsulation.

Abstract: A method of fabricating a gate structure is provided. First, a sacrificial oxide layer is formed on a substrate. A nitridation treatment process is performed to redistribute the nitrogen atoms in the sacrificial layer and the substrate and produce a concentration profile such that the concentration of nitrogen progressively increases and then decreases toward the substrate with the maximum concentration of nitrogen in the sacrificial oxide layer. Next, the sacrificial oxide layer is removed. A re-oxidation process is performed to produce an interface layer on the surface of the substrate. A high K (dielectric constant) gate dielectric layer, a barrier layer and a metal layer are sequentially formed on the substrate. The metal layer, the barrier layer, the high K gate dielectric layer and the interface layer are defined to form a stacked gate structure.

Abstract: Provided are an image sensor package used as a semiconductor device package and a method of packaging the image sensor package. The package and method prevent defects in sealing rings and connections for electrical connection during manufacturing process, by designating the melting point of solder balls used for the image sensor package different from the melting point of solder used in other bonding applications. The semiconductor device package includes a semiconductor device, a substrate assembly, a solder sealing ring, and a plurality of solder balls. The substrate assembly is disposed facing the semiconductor device. The solder sealing ring tightly seals the semiconductor device and the substrate assembly. The solder balls are formed in an outer periphery of the solder sealing ring of the substrate assembly. The solder sealing ring has a higher melting point than the solder balls.

Abstract: The present invention provides an image sensor, and methods of manufacturing the same, that includes a color filter layer on a semiconductor substrate, and a microlens array on the color filter layer, in which the microlens includes a transparent conductive layer.

Abstract: A method for forming a semiconductor device comprising forming an inter-layer dielectric (ILD) layer on a semiconductor substrate; forming a first trench and second trench in a cell area on the ILD layer, wherein the second trench has a width which is wider than the first trench; forming a first metal layer on the substrate, such that the first metal layer fills the first trench and does not entirely fill the second trench; performing a planarization process on the first metal layer such that the surface of the first metal layer in the first trench and the surface of the substrate has a height which is different than the height of the surface of the first metal layer in the second trench; and forming a plurality of align key and overlay key areas by forming a second metal layer on the surface of the substrate and first metal layer.

Abstract: Methods are provided for fabricating memory devices. A method comprises fabricating charge-trapping stacks overlying a silicon substrate and forming bit line regions in the substrate between the charge trapping stacks. Insulating elements are formed overlying the bit line regions between the stacks. The charge-trapping stacks are etched to form two complementary charge storage nodes and to expose portions of the silicon substrate. Silicon is grown on the exposed silicon substrate by selective epitaxial growth and is oxidized. A control gate layer is formed overlying the complementary charge storage nodes and the oxidized epitaxially-grown silicon.

Abstract: A process for fabricating an electronic device comprising the step of patterning a metallic electrode to the electronic device by laser ablation followed by electroless plating, wherein the process of fabricating the electronic device comprises at least one other laser patterning step over the area of the metallic electrode performed after said step of patterning the metallic electrode.

Abstract: A method for manufacturing a sensor image may include forming a pixel array including a photodiode structure and an insulating film structure in an active area of a semiconductor substrate; forming a metal pad on the insulating film structure; forming a dielectric and/or etch stop film on the metal pad (and optionally over the pixel array); forming a protective layer on the dielectric and/or etch stop film; and forming a pad opening and a pixel opening by etching the protective layer.

Abstract: A manufacturing method of a semiconductor wafer includes forming a plurality of alignment trenches in the wafer substrate. A dielectric layer is formed over the substrate filling the trenches. A planarization process is performed to remove the dielectric layer above the substrate. A photolithograph process is subsequently performed to selectively remove the dielectric layer formed in the trenches in the alignment area.

Abstract: According to one embodiment, a polymer coating is disposed on a surface of a package substrate. The polymer coating comprises a material capable of inhibiting the flow of an underfill material into a keep-out zone (KOZ). In a further embodiment, a die is disposed on the substrate and a layer of the underfill material is disposed between the die and substrate, and the polymer coating inhibits the flow of the underfill into the KOZ. Other embodiments are described and may be claimed.

Abstract: In a thin film transistor using a polycrystalline semiconductor film, when a storage capacitor is formed, it is often that a polycrystalline semiconductor film is used also in one electrode of the capacity. In a display device having a storage capacitor and thin film transistor which have a polycrystalline semiconductor film, the storage capacitor exhibits a voltage dependency due to the semiconductor film, and hence a display failure is caused. In the display device of the invention, a metal conductive film 5 is stacked above a semiconductor layer 4d made of a polycrystalline semiconductor film which is used as a lower electrode of a storage capacitor 130.

Abstract: In a method of manufacturing a semiconductor device, a flexible tube connects at least part of a path extending from a reaction chamber to a detoxification device through a vacuum pump. The flexible tube has a tube body made of hard material, the tube body having projected parts and depressed parts and a cover provided over an outer surface of the tube body, the cover being made of elastic material, the cover being in contact with around the projected parts of the tube body and formed over the depressed parts of the tube body so that a vacant space is formed between the tube body and the cover. Then, a semiconductor substrate is disposed within the reaction chamber. The vacuum pump is activated to bring the reaction chamber into a pressure-reduced state. A reaction gas is supplied to the reaction chamber. Finally, the reaction gas causes to react to thereby deposit a reactant on the semiconductor substrate.

Abstract: An image sensing device is disclosed having a die formed with an array of photosensing sites and a structure of optical material having infrared absorbing characteristics formed over the photosensing sites. An embodiment is disclosed in which the structure of optical material having infrared absorbing characteristics is formed as an array of microlenses for directing visible image light onto the photosensing sites and at the same time filtering out infrared wavelengths that interfere with image capture. Alternatively, the structure may be designed to filter out other ranges of wavelengths outside of the visible spectrum.

Abstract: A semiconductor process is provided. The semiconductor process includes providing a substrate. Then, a surface treatment is performed to the substrate to form a buffer layer on the substrate. Next, a first pre-amorphous implantation is performed to the substrate.

Abstract: Embodiments of the present invention include an apparatus, method, and/or system for an integrated circuit package with signal connections on the chip-side of the package structure.

Abstract: A light source having a die, a substrate, and a housing is disclosed. The die has a semiconducting light emitting device thereon, the die having a top surface and a bottom surface, light being emitted through the top surface. The die is characterized by a maximum dimension. The substrate has a top surface bonded to the bottom surface of the die. The substrate includes a plurality of electrical traces connected to the die that are used to power the light emitting device. The housing includes a reflector having a reflective inner wall facing the die and an aperture through which light reflected from the inner wall exits the housing. The aperture lies in a plane normal to the top surface of the die and has a height that is less than the maximum dimension of the die. The die is encapsulated in a transparent layer of material.

Abstract: A method of fabricating a memory cell including forming nanodots over a first dielectric layer and forming a second dielectric layer over the nanodots, where the second dielectric layer encases the nanodots. In addition, an intergate dielectric layer is formed over the second dielectric layer. To form sidewalls of the memory cell, a portion of the intergate dielectric layer and a portion of the second dielectric layer are removed with a dry etch, where the sidewalls include a location where a nanodot has been deposited. A spacing layer is formed over the sidewalls to cover the location where a nanodot has been deposited and the remaining portion of the second dielectric layer and the nanodots can be removed with an isotropic etch selective to the second dielectric layer.

Abstract: A two-step process for manufacturing a deep trench in a semiconductor device that prevents shorts and leakages between neighboring capacitors due to over etching is disclosed. The process comprises conducting a first etching step to remove a portion of a substrate to form a trench with a first determined depth therein; conducting a thermal oxidation to form an oxide film on the sidewall of the trench; and conducting a second etching step to remove a portion of the substrate under the trench to form a deep trench with a second determined depth.

Abstract: A semiconductor device exhibits a first metal layer, made of a first metal, with at least one contiguous subsection. At least one second metal layer, made of a second metal, is placed on the contiguous subsection of the first metal layer. The second metal is harder than the first metal. The second metal layer is structured to form at least two layer regions, which are disposed on the contiguous subsection of the first metal layer. The second metal exhibits a boron-containing or phosphorus-containing metal or a boron-containing or phosphorus-containing metal alloy.

Abstract: In one embodiment, a preliminary insulation layer is formed over a cell region and a peripheral circuit region of a semiconductor substrate. The preliminary insulation layer covers a capacitor formed over the cell region. The preliminary insulation layer over the cell region has a first height higher than a second height of the preliminary insulation layer over the peripheral circuit region. A preliminary node separate polymer layer is formed over the preliminary insulation layer. A portion of the preliminary node separate polymer layer is uniformly removed by a developing process to form a node separate polymer layer exposing the preliminary insulation layer over the cell region. A portion of the preliminary insulation layer over the cell region is removed to form an insulation layer.

Abstract: A method of manufacturing a semiconductor device, in which a stress film having a large stress can be formed with high accuracy over a transistor. The method comprises the steps of: depositing a tensile stress film over the whole surface of a substrate having formed thereon an n-MOSFET; removing by etching the deposited stress film while leaving it on the n-MOSFET; and performing UV irradiation to the remaining stress film. By the UV irradiation, a tensile stress of the stress film is improved. Further, although the stress film is cured by the UV irradiation, occurrence of etching defects caused by the curing is prevented because the UV irradiation is performed after the etching. Thus, speeding-up and high quality of the n-MOSFET can be attained.

Abstract: A semiconductor package and method of making the package uses at least one encapsulant delamination-reducing structure positioned on an upper major surface of a semiconductor chip to provide a structural interface between the semiconductor chip and an encapsulant formed over the semiconductor chip.

Abstract: A package structure of a memory card includes a Printed Circuit Board (PCB) and at least one chip package. Plural solder pads are set on the upper surface of the PCB, and an exposed golden finger is set on the bottom surface of the PCB. Every chip package includes at least one chip and a substrate. At least one layer of trace is set inside the substrate, and the trace has plural conductive terminals exposed on the bottom surface of the substrate. The conductive terminals are adhered to and electrically connected with the solder pads. A package method for a memory card includes: providing at least one chip package using a substrate as a chip carrier; adhering the chip package onto a PCB to electrically connect the chip package and the PCB; and covering the chip package and the PCB.

Abstract: The present invention provides a method for restoring the dielectric properties of a porous dielectric material. The method comprises providing a substrate comprising at least one layer of a porous dielectric material comprising a contaminant comprising at least one entrapped liquid having a surface tension, wherein the porous dielectric material comprising the at least one contaminant has a first dielectric constant. The substrate is contacted with a restoration fluid comprising water and at least one compound having a surface tension that is less than the surface tension of the at least one entrapped liquid in the at least one layer of a porous dielectric material. Upon drying, the porous dielectric material has a second dielectric constant that is lower than the first dielectric constant and all constituents of the restoration fluid are removed upon drying.

Abstract: A semiconductor package (100, 150, 200, 250), and method of forming the package, including a substrate (102, 102?, 202, 202?) having an opening (104, 104?, 204, 204?) formed therein. Contact pads (112, 112?, 212, 212?) are formed about a periphery of the opening on a first side of the substrate (106, 106?, 206, 206?) and a second opposing side (132, 132?, 232, 232?) of the substrate. A flip chip die (120, 120?, 220, 220?) is mounted to the substrate, having an active side (114, 114?, 214, 214?) mounted on a first side of the substrate and in electrical communication with at least some of the contact pads formed on the first side of the substrate. At least one wire bond die (110, 110?, 210, 210?) is mounted through the opening, with a non-active side mounted on the active side of the flip chip die. The wire bond die is in electrical communication with at least some of the plurality of contact pads formed on the second opposing side of the substrate.

Abstract: A method for manufacturing an image sensor includes forming first to third photodiodes and first to third color filters corresponding thereto; forming a photoresist film including photosensitive materials on the upper surfaces of the first to third color filters; forming a first exposed part by exposing the photoresist film with a first exposure energy using a first pattern mask with a first light transmitting part having a first width at boundaries between the individual color filters; forming a second exposed part overlapping a portion of the first exposed part by exposing the photoresist film with a second exposure energy smaller than the first exposure energy using a second pattern mask with a second light transmitting part having a second width wider than the first width; and forming microlenses by developing the photoresist film.

Abstract: The structure of a trans-reflective liquid crystal display panel includes stacks in longitudinally and two areas in transversely, which are reflective area and transmissive area. A thin-film-transistor layer and a dielectric layer are formed on a substrate in sequential. For the transmissive area, a transparent conductive film, such as a pixel electrode, is formed. For the reflective area, a reflective film with multi-layer is formed on the dielectric layer and then the thin-film-transistor layer. After assembling, the trans-reflective liquid crystal display is complete. The materials of the reflective film with multi-layer and the dielectric layer are similar to have greater adhesion. Each layer of the reflective film with multi-layer includes two sublayers, the first reflective sublayer and the second reflective sublayer, which have the different refractive indexes. By modifying the temperature, pressure, gas flow and power of emitting in manufacturing process can make the refractive indexes of both layers.

Abstract: In the case of cutting streets on the rear surface of a wafer by laser beam irradiation, even if the wafer is variously doped or thermally-treated, the streets of a wafer front surface can accurately be detected and cut. Infrared light is emitted from an infrared light source to the front surface side of the wafer to penetrate the wafer. The penetrating image is captured by an infrared microscope disposed on the rear surface side of the wafer. The streets are detected by the image pattern of a wafer front surface captured. A laser beam is emitted from a laser head to the wafer rear surface along the streets detected, thus processing the streets for cutting.

Abstract: A semiconductor device includes a bump electrode including a bump made of resin, a base layer disposed on the bump, and a conductive surface layer disposed on the base layer. The base layer has ductility lower than that of the conductive surface layer and includes base regions which are spaced from each other and which are arranged at least in a top zone of the bump electrode.

Abstract: A method of fabricating a phase-change memory cell is described. The cross-sectional area of a contact with a phase-change memory element within the cell is controlled by a first dimension of a bottom electrode and a second dimension controlled by an etch process. The contact area is a product of the first dimension and the second dimension. The method allows the formation of very small phase-change memory cells.

Abstract: A semiconductor device of the present invention includes a lead frame having an island portion having a roughened upper surface and side faces, and an unroughened lower surface, and also having a plurality of leads having roughened inner lead portions and unroughened outer lead portions; a semiconductor chip placed on the upper surface of the island portion of the lead frame; a plurality of electrode pads provided on the upper surface of the semiconductor chip; a plurality of wires connecting the plurality of electrode pads and the plurality of leads; and a resin molding the semiconductor chip.

Abstract: A method of manufacturing a semiconductor device with at least a first dielectric material and a second dielectric material is disclosed. In one aspect, the method comprises providing a first dielectric material on a substrate. The method further comprises providing a patterned sacrificial layer covering the first dielectric material in at least a first region of the substrate. The method further comprises providing a second dielectric material covering the patterned sacrificial layer in the first region and covering the first dielectric material in at least a second region, the second region being different from the first region. The method further comprises patterning the second dielectric material such that the patterned second dielectric material covers the first dielectric material in the second region but not the patterned sacrificial layer in the first region. The method further comprises removing the patterned sacrificial material.

Abstract: A display panel and a method of manufacturing the same in which a storage electrode is formed on a first base substrate, and an insulating layer is formed on the first base substrate to cover the storage electrode. The insulating layer is recessed directly above the storage electrode. A pixel electrode faces the storage electrode and is formed on the insulating layer. A protruding portion is formed on a second base substrate facing the first base substrate. The protruding portion protrudes toward a concaved portion of the insulating layer.

Abstract: An exemplary liquid crystal panel (2) has a first substrate (21); a second substrate (23) opposite to the first substrate, which includes a conductive layer formed (233) thereat; a liquid crystal layer (25) sandwiched between the first and the second substrates, and a sealant (27) provided at the peripheral region of the first substrate and the second substrate. The conductive layer is adjacent to the liquid crystal layer, which remains the peripheral region of the second substrate uncovered.

Abstract: The present invention provides a transflective liquid crystal display device which includes diffusion reflective electrodes suitable for a display of high definition. Into an organic resin film material PET which is formed by mixing NQD as a photosensitive agent in an acrylic resin having a specific gravity of 1.05 and a refractive index of 1.50, spherical particles PTC made of acrylic modified polystyrene which has a specific gravity of 1.00, a refractive index of 1.50 and a particle size of 1.6 ?m are mixed at a rate of 3:1 so as to form an organic insulation film material in which a total solid content is adjusted to 30% and viscosity is adjusted 20 mPa·s. The organic insulation film material is applied and is dried to form an organic insulation film. A portion of the organic insulation film which is to be arranged below a diffusion reflective electrode is exposed using an exposure mask having half exposure apertures which are formed of a large number of slits and the organic insulation film is hardened.

Abstract: The present invention intends to provide an optical element that can be incorporated in a liquid crystal display device, is provided with a birefringent layer obtained by aligning and polymerizing polymerizable liquid crystal molecules, and, while sufficiently reflecting an actual condition of a liquid crystal display device, can reduce fear that a thickness of a driving liquid crystal layer unexpectedly varies. An optical element includes a light-transmitting base material and a birefringent layer comprising of aligned and polymerized liquid crystal molecules and having a value of indentation depth of 6% or less relative to a thickness of the birefringent layer, wherein said value is measured under conditions where a cylindrical indenter having a diameter of 30 (?m) is applied at a load of 10 mN/sec up to the maximum load of 400 mN.

Abstract: A semiconductor image sensor die includes a substrate, an imaging area, a surrounding circuit area, a plurality of electrode portions, a translucent member, a transparent adhesive, and a bump. The imaging area, the surrounding circuit area, and the electrode portion are provided on an upper surface of the substrate. The surrounding circuit area is provided outside the imaging area. The electrode portion is provided outside the surrounding circuit area. The translucent member is adhered via the transparent adhesive to the imaging area, covering the imaging area. The bump is provided on a portion of the electrode portions. The surface of the bump includes an upper surface which is located higher than an upper surface of the transparent adhesive.

Abstract: The invention includes a method of forming a metal-comprising mass for a semiconductor construction. A semiconductor substrate is provided, and a metallo-organic precursor is provided proximate the substrate. The precursor is exposed to a reducing atmosphere to release metal from the precursor, and subsequently the released metal is deposited over the semiconductor substrate. The invention also includes capacitor constructions, and methods of forming capacitor constructions.

Abstract: A manufacturing method for a liquid crystal display (LCD) includes forming an upper panel and a lower panel, applying a sealant to either one of the panels, adding a liquid crystal material within a boundary of the sealant, coupling the upper panel and the lower panel, and forming a sensor in an upper part of the upper panel.

Abstract: A sensor-type package and a fabrication method thereof are provided. A sensor-type chip is mounted on a substrate and is electrically connected to the substrate via bonding wires. A light-pervious body is attached to the sensor-type chip, and has one surface covered with a covering layer and another surface formed with an adhesive layer. An encapsulant encapsulates the light-pervious body. As an adhesive force between the covering layer and the encapsulant is greater than that between the covering layer and the light-pervious body, the covering layer and a portion of the encapsulant located on the covering layer can be concurrently removed, such that the light-pervious body is exposed and light can pass through the light-pervious body to be captured by the sensor-type chip. The above arrangement eliminates the need of using a dam structure as in the prior art and provides a compact sensor-type package with improved fabrication reliability.

Abstract: Disorder of the initial orientation (pretilt angle) of liquid crystal molecules and disorder of the active orientation of the liquid crystal molecules associated with higher resolution can be reduced to achieve high image quality display. A layer in which a drive element is configured is bonded into an adhesive layer above color filters for a plurality of colors provided on the inner surface of a rear panel. The layer in which the drive element is configured, a drive electrode (pixel electrode), a counter electrode, and the like are buried in the adhesive layer, so that the surface on the liquid crystal layer side is a smooth surface. An orientation film is formed on the smooth surface, so that a liquid crystal orientation control capability (orientation capability) is imparted thereto. A front panel includes a transparent substrate formed of a glass plate or a resin sheet, the surface of which on the liquid crystal layer side is a smooth surface.

Abstract: The present invention provides a technique, by which it is possible to obtain a liquid crystal display panel with high precision by forming very fine pattern of electroconductive film through linking of the areas with different widths, and it is also possible to reduce the number of processes. Like a wide-width electroconductive film and a narrow-width electroconductive film, most of the surface of an underlying film UW of a thin-film transistor substrate SUB1 is turned to lyophobic portion RA, and only the narrow-width gate electrode forming area is turned to lyophilic portion FA. An electroconductive ink is dropped evenly to the gate electrode forming area of the lyophilic portion FA, and a wide-width gate line is formed on the gate line forming area GLA of lyophobic portion RA by direct drawing of IJ.

Abstract: The present invention relates to a method of manufacturing a transflective liquid crystal display device including a color filter substrate having a plurality of pixels, each including a reflective display part and a transmissive display part, and retardation plates each built in areas on a principal surface of the color filter substrate opposed to a liquid crystal layer, which correspond to the reflective display parts.

Abstract: A display substrate includes a signal line, a test switch, a test pad, and a first electrostatic dispersion line. The signal line is formed in the display area of a base substrate. The test switch is formed in a peripheral area of the base substrate surrounding the display area. The test switch applies a test signal to the signal line. The test pad is electrically connected to the test switch and receives the test signal The first electrostatic dispersion line is extended from the test pad to an end of the base substrate.

Abstract: A manufacturing method for electronic device, includes: preparing a first substrate having a plurality of first regions; preparing a second substrate having a plurality of second regions; facing the first region and the second region each other, and connecting the first substrate and the second substrate while disposing at least a part of a functional element within a space between the first region and the second region; obtaining a plurality of first divisional substrates by cutting the first substrate at each of the first regions, after the connecting of the first substrate and the second substrate; forming a sealing film covering the plurality of the first divisional substrates on the second substrate, after cutting the first substrate; obtaining a plurality of second divisional substrates by cutting the second substrate at each of the second regions, after forming the sealing film; and obtaining a plurality of individual electronic devices.

Abstract: After a semiconductor chip is cut out, an In-10 atom % Ag pellet is placed on a metal film. Next, an epoxy sheet on a stiffener is stuck to a ceramic substrate. At this time, the In alloy pellet is sandwiched between a central protrusion portion and the metal film. Then, an In alloy film is formed from the In alloy pellet by heating, melting, and then cooling the In alloy pellet. As a result, the semiconductor chip and a heat spreader are bonded via the metal film and the In alloy film.

Abstract: In an array substrate, the array substrate includes an insulation member in each pixel area and a color filter layer that surrounds each insulation member. The color filter layer includes color filters having two or more colors that are different from each other, and a color filter is formed in each pixel area. An insulation member is arranged in each pixel area and all the insulation members include the same material. The insulation members are partially removed in each pixel area to form contact holes having the same size.

Abstract: Recesses and protrusions are formed on the surface of an orientation film that is formed on a substrate of the liquid crystal display panel comprising a glass substrate 1 and a TFT 2. An ion beam is radiated on the entire surface of the uneven orientation film to reach the saturating condition, thereby increasing the effective orientation surface area. If there are large bumps on the surface of the orientation film 3 that is radiated by an ion beam from an ion beam source to cause shadow portions, the ion beam is radiated on the shadow portions from the opposite direction. In order to form recesses and protrusions on the orientation film, it is preferable to have an orientation plate mesh structure having rough mesh depth and pitch and a particular solvent composition that easily causes recesses and protrusions on the surface chosen as the orientation material.