Abstract: A method is provided for bonding a first substrate carrying a semiconductor device layer on its front surface to a second substrate. The method comprises producing the semiconductor device layer on the front surface of the first substrate, depositing a first metal bonding layer or a stack of metal layers on the first substrate, on top of the semiconductor device layer, depositing a second metal bonding layer or a stack of metal layers on the front surface of the second substrate, depositing a metal stress-compensation layer on the back side of the second substrate, thereafter establishing a metal bond between the first and second substrate, by bringing the first and second metal bonding layers or stacks of layers into mutual contact under conditions of mechanical pressure and temperature suitable for obtaining the metal bond, and removing the first substrate.

Abstract: A high-efficiency light emitting diode including: a semiconductor stack positioned on a support substrate, including a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer; an insulating layer disposed in an opening that divides the p-type compound semiconductor layer and active layer; a transparent electrode layer disposed on the insulating layer and the p-type compound semiconductor layer; a reflective insulating layer covering the transparent electrode layer, to reflect light from the active layer away from the support substrate; a p-electrode covering the reflective insulating layer; and an n-electrode is formed on top of the n-type compound semiconductor layer. The p-electrode is electrically connected to the transparent electrode layer through the insulating layer.

Abstract: To provide a light-emitting device including the plurality of light-emitting elements having a structure in which a light-emitting area is large and defects in patterning of light-emitting elements are suppressed. To provide a lighting device including the light-emitting device. The light-emitting device includes a first wiring provided over a substrate having an insulating surface, an insulating film provided over the first wiring, a second wiring provided over the insulating film, and a light-emitting element unit including a plurality of light-emitting elements provided over the first wiring with the insulating film provided therebetween. The plurality of light-emitting elements each include a first electrode layer having a light-blocking property, a layer containing an organic compound in contact with the first electrode layer, and a second electrode layer having a light-transmitting property in contact with the layer containing an organic compound.

Abstract: Forming an alignment mark on a semiconductor structure using an optical lithography to form a metal alignment mark on a substrate of the structure, using the formed metal alignment mark to form a first feature of a semiconductor device being formed on the substrate using optical lithography, and using the formed metal alignment mark to form a second, different feature for the semiconductor using electron beam lithography. In one embodiment, the first feature is an ohmic contact, the second feature is a Schottky contact, the metal alignment mark is a refractory metal or a refractory metal compound having an atomic weight greater than 60 such as TaN and the semiconductor device is a GaN semiconductor device. A semiconductor structure having a metal alignment mark on a zero layer of the structure, the metal alignment mark is a TaN and the semiconductor is GaN.

Abstract: Multiple bonding layer schemes that temporarily join semiconductor substrates are provided. In the inventive bonding scheme, at least one of the layers is directly in contact with the semiconductor substrate and at least two layers within the scheme are in direct contact with one another. The present invention provides several processing options as the different layers within the multilayer structure perform specific functions. More importantly, it will improve performance of the thin-wafer handling solution by providing higher thermal stability, greater compatibility with harsh backside processing steps, protection of bumps on the front side of the wafer by encapsulation, lower stress in the debonding step, and fewer defects on the front side.

Abstract: The present invention provides a non-aromatic saturated hydrocarbon group-containing organopolysiloxane containing the following units (I) to (III): (I) a siloxane unit (T unit) represented by R1SiO3/2: 40 to 99 mol %; (II) a siloxane unit (D unit) represented by R2R3SiO2/2: 59 mol % or less; and (III) a siloxane unit (M unit) represented by R4R5R6SiO1/2: 1 to 30 mol %. There can be an organopolysiloxane, which is soluble in a nonpolar organic solvent so that the organopolysiloxane can be peeled in a short time, and which is hardly soluble in a polar organic solvent to be exemplarily used upon coating a photoresist onto a semiconductor side of a joined substrate and removing the photoresist therefrom so that the organopolysiloxane is not peeled from the supporting substrate upon coating a photoresist onto a semiconductor side of a joined substrate and removing the photoresist therefrom.

Abstract: A method to minimize edge-related substrate breakage during spalling using an edge-exclusion region where the stressor layer is either non-present (excluded either during deposition or removed afterwards) or present but significantly non-adhered to the substrate surface in the exclusion region is provided. In one embodiment, the method includes forming an edge exclusion material on an upper surface and near an edge of a base substrate. A stressor layer is then formed on exposed portions of the upper surface of the base substrate and atop the edge exclusion material, A portion of the base substrate that is located beneath the stressor layer and which is not covered by the edge exclusion material is then spalled.

Abstract: A method of cleaning an inside of a processing chamber is provided according to an embodiment of the present disclosure. The method includes supplying a fluorine-based gas and a nitrogen oxide-based gas as the cleaning gas, into the processing chamber heated to a first temperature, and removing a deposit by a thermochemical reaction. The method further includes changing a temperature in the processing chamber to a second temperature higher than the first temperature, and supplying the fluorine-based gas and the nitrogen oxide-based gas as the cleaning gas, and removing extraneous materials, remaining on the surface of the member in the processing chamber, by a thermochemical reaction.

Abstract: An atomic layer deposition apparatus and a sealing method of an organic light emitting device using the same are disclosed. In one embodiment, the atomic layer deposition apparatus improves a structure of the purge gas injection nozzle so as to increase the exhaust efficiency of the purge gas in an atomic layer deposition process, which increases a speed of a purge process. As a result, it is possible to improve a deposition speed and a quality of a sealing film when a sealing process for sealing the organic light emitting device is implemented by using the atomic layer deposition.

Abstract: An integrated circuit system includes a first device wafer bonded to a second device wafer at a bonding interface of dielectrics. Each wafer includes a plurality of dies, where each die includes a device, a metal stack, and a seal ring that is formed at an edge region of the die. Seal rings included in dies of the second device wafer each include a first conductive path provided with metal formed in a first opening that extends from a backside of the second device wafer, through the second device wafer, and through the bonding interface to the seal ring of a corresponding die in the first device wafer.

Abstract: According to one embodiment, a method of manufacturing a magnetic memory, the method includes forming a first magnetic layer having a variable magnetization, forming a tunnel barrier layer on the first magnetic layer, forming a second magnetic layer on the tunnel barrier layer, the second magnetic layer having an invariable magnetization, forming a hard mask layer as a mask on the second magnetic layer, patterning the second magnetic layer by using the mask of the hard mask layer, and executing a GCIB-irradiation by using the mask of the hard mask layer, after the patterning.

Abstract: A semiconductor processing apparatus includes a process chamber, a pedestal and a showerhead. The pedestal is inside the process chamber and holds a semiconductor wafer. The showerhead supplies process gas to the process chamber.

Abstract: A method of controlled layer transfer is provided. The method includes providing a stressor layer to a base substrate. The stressor layer has a stressor layer portion located atop an upper surface of the base substrate and a self-pinning stressor layer portion located adjacent each sidewall edge of the base substrate. A spalling inhibitor is then applied atop the stressor layer portion of the base substrate, and thereafter the self-pinning stressor layer portion of the stressor layer is decoupled from the stressor layer portion. A portion of the base substrate that is located beneath the stressor layer portion is then spalled from the original base substrate. The spalling includes displacing the spalling inhibitor from atop the stressor layer portion. After spalling, the stressor layer portion is removed from atop a spalled portion of the base substrate.

Abstract: An embodiment of the invention provides a solid-state image pickup element, including: a semiconductor layer having a photodiode, photoelectric conversion being carried out in the photodiode; a silicon oxide film formed on the semiconductor layer in a region having at least the photodiode by using plasma; and a film formed on the silicon oxide film and having negative fixed charges.

Abstract: An apparatus and method bond a first wafer to a second wafer. The apparatus includes a first pressure application device configured to apply pressure at a central region of the first wafer in a direction toward the second wafer to initiate a bonding process between the first wafer and the second wafer. The apparatus also includes one or more second pressure application devices configured to apply pressure between the central region and an outer edge of the first wafer to complete the bonding process. The one or more second pressure application devices apply pressure on the first wafer after the first pressure application device has initiated the bonding process and while the first pressure application device continues to apply pressure at the central region. A controller controls the first pressure application device and the one or more second pressure application devices.

Abstract: The invention is directed to a polymer thick film conductive composition comprising (a) a conductive silver-coated copper powder; and (b) an organic medium comprising two different resins and organic solvent, wherein the ratio of the weight of the conductive silver-coated copper powder to the total weight of the two different resins is between 5:1 and 45:1. The invention is further directed to a method of electrode grid and/or bus bar formation on thin-film photovoltaic cells using the composition and to cells formed from the method and the composition.

Abstract: A method produces a semiconductor device including a semiconductor body, an electrode thereon, and an insulating structure insulating the electrode from the semiconductor body. The semiconductor body includes a first contact region of a first conductivity type, a body region of a second conductivity type, a drift region of the first conductivity type, and a second contact region having a higher maximum doping concentration than the drift region. The insulating structure includes a gate dielectric portion forming a first horizontal interface. with the drift region and has a first maximum vertical extension A field dielectric portion forms with the drift region second and third horizontal interfaces arranged below the main surface. A second maximum vertical extension of the field dielectric portion is larger than the first maximum vertical extension. A third maximum vertical extension of the field dielectric portion is larger than the second maximum vertical extension.

Abstract: A method of processing a substrate having horizontal and non-horizontal surfaces is disclosed. The substrate is implanted with particles using an ion implanter. During the ion implant, due to the nature of the implant process, a film may be deposited on the surfaces, wherein the thickness of this film is thicker on the horizontal surfaces. The presences of this film may adversely alter the properties of the substrate. To rectify this, a second process step is performed to remove the film deposited on the horizontal surfaces. In some embodiments, an etching process is used to remove this film. In some embodiments, a material modifying step is used to change the composition of the material comprising the film. This material modifying step may be instead of, or in addition to the etching process.

Abstract: A film is formed so that the atomic numbers ratio of Sr to Ti, i.e., Sr/Ti, in the film is not less than 1.2 and not more than 3. The film is then annealed in an atmosphere containing not less than 0.001% and not more than 80% of O2 at 500° C. or above. An SrO film forming step or a TiO film forming step are repeated a plurality of times so that a sequence, in which a plurality of SrO film forming steps or/and a plurality of TiO film forming steps are performed continuously, is included. When Sr is oxidized after the adsorption of Sr, O3 and H2O are used as an oxidizing agent.

Abstract: There has been such a problem that radiation detecting elements using semiconductor elements have a low radiation detection efficiency, since the radiation detecting elements easily transmit radiation, even though the radiation detecting elements have merits, such as small dimensions and light weight. Disclosed are a radiation detecting element and a radiation detecting device, wherein a film formed of a metal, such as tungsten, is formed on the radiation incident surface of the radiation detecting element, and the incident energy of the radiation is attenuated. The efficiency of generating carriers by way of radiation incidence is improved by attenuating the incident energy, the thickness of the metal film is optimized, and the radiation detection efficiency is improved.

Abstract: Methods of transferring a layer of semiconductor material from a first donor structure to a second structure include forming a generally planar weakened zone within the first donor structure defined by implanted ions therein. At least one of a concentration of the implanted ions and an elemental composition of the implanted ions may be formed to vary laterally across the generally planar weakened zone. The first donor structure may be bonded to a second structure, and the first donor structure may be fractured along the generally planar weakened zone, leaving the layer of semiconductor material bonded to the second structure. Semiconductor devices may be fabricated by forming active device structures on the transferred layer of semiconductor material. Semiconductor structures are fabricated using the described methods.

Abstract: A method of manufacturing a semiconductor device includes supplying a process gas into a process vessel accommodating a substrate to form a thin film on the substrate and supplying a cleaning gas into the process vessel to clean an inside of the process vessel, after the supplying the process gas to form the thin film is performed a predetermined number of times. When cleaning the inside of the process vessel, a fluorine-containing gas, an oxygen-containing gas and a hydrogen-containing gas are supplied as the cleaning gas into the process vessel heated and kept at a pressure less than an atmospheric pressure to remove a deposit including the thin film adhering to the inside of the process vessel through a thermochemical reaction.

Abstract: The present invention includes methods directed to improved processes for producing a monolayer of sulfur on the surface of a semiconductor. As a surface layer, it functions to passivate the surface; if annealed, it provides a doping element.

Abstract: Disclosed is a semiconductor light emitting device, and a method of manufacturing the same. The semiconductor light emitting device includes a first conductivity type semiconductor layer, an active layer disposed on the top of the first conductivity type semiconductor layer, and a second conductivity type semiconductor layer disposed on the top of the active layer and comprising light extraction patterns in the top thereof, the light extraction patterns each having a columnar portion and a hemispherical top portion.

Abstract: Ions of silicon are implanted into source/drain regions in a semiconductor wafer to amorphize an ion implantation region in the semiconductor wafer. A nickel film is deposited on the amorphized ion implantation region. First irradiation from a flash lamp is performed on the semiconductor wafer with the nickel film deposited thereon to increase the temperature of a front surface of the semiconductor wafer from a preheating temperature to a target temperature for a time period in the range of 1 to 20 milliseconds. Subsequently, second irradiation from the flash lamp is performed to maintain the temperature of the front surface of the semiconductor wafer within a ±25° C. range around the target temperature for a time period in the range of 1 to 100 milliseconds. This causes nickel silicide to grow preferentially in a direction perpendicular to the semiconductor wafer.

Abstract: A method of manufacturing a solar cell includes forming jagged portions non-uniformly on a surface of a substrate, forming a first type semiconductor and a second type semiconductor in the substrate, forming a first electrode to contact the first type semiconductor, and forming a second electrode to contact the second type semiconductor. An etchant used in a wet etching process in manufacturing the solar cell includes about 0.5 wt % to 10 wt % of HF, about 30 wt % to 60 wt % of HNO3, and up to about 30 wt % of acetic acid based on total weight of the etchant.

Abstract: An integrated circuit (IC) having a microelectromechanical system (MEMS) device buried therein is provided. The integrated circuit includes a substrate, a metal-oxide semiconductor (MOS) device, a metal interconnect, and the MEMS device. The substrate has a logic circuit region and a MEMS region. The MOS device is located on the logic circuit region of the substrate. The metal interconnect, formed by a plurality of levels of wires and a plurality of vias, is located above the substrate to connect the MOS device. The MEMS device is located on the MEMS region, and includes a sandwich membrane located between any two neighboring levels of wires in the metal interconnect and connected to the metal interconnect.

Abstract: A micromechanical assembly for bonding semiconductor substrates includes a semiconductor substrate having a chip pattern having a plurality of semiconductor chips, each having a functional region and an edge region surrounding the functional region. There is a bonding frame made of a bonding alloy made from at least two alloy components in the edge region, spaced apart from the functional region. Within the part of the edge region surrounding the bonding frame between the bonding frame and the functional region, there is at least one stop frame made of at least one of the alloy components, which is configured such that when a melt of the bond alloy contacts the stop frame during bonding, the bonding alloy solidifies.

Abstract: Disclosed herein are MEMS resonator device designs and fabrication techniques that provide protection against electrostatic charge imbalances. In one aspect, a MEMS resonator device includes a substrate, an electrode including a first microstructure supported by the substrate, a resonant element including a second microstructure spaced from the first microstructure by a gap for resonant displacement of the second microstructure within the gap during operation, and a disabled shunt coupled to the electrode or the resonant element. The disabled shunt is disabled to enable the resonant displacement but otherwise configured to protect against damage from an electrostatic charge imbalance before the operation of the MEMS resonator device.

Abstract: Various applications are directed to a material stack having a strained active material therein. In connection with an embodiment, an active material (e.g. a semiconductor material) is at least initially and partially released from and suspended over a substrate, strained, and held in place. The release and suspension facilitates the application of strain to the semiconductor material.

Abstract: The present disclosure relates to a structure and method to create a self-repairing dielectric material for semiconductor device applications. A porous dielectric material is deposited on a substrate, and exposed with treating agent particles such that the treating agent particles diffuse into the dielectric material. A dense non-porous cap is formed above the dielectric material which encapsulates the treating agent particles within the dielectric material. The dielectric material is then subjected to a process which creates damage to the dielectric material. A chemical reaction is initiated between the treating agent particles and the damage, repairing the damage. A gradient concentration resulting from the consumption of treating agent particles by the chemical reaction promotes continuous diffusion the treating agent particles towards the damaged region of the dielectric material, continuously repairing the damage.

Abstract: A stress isolator that allows a sensor to be attached to materials of the same coefficient of thermal expansion and still provide the required elastic isolation between the sensor and the system to which it is mounted. The isolator is made of two materials, borosilicate glass and silicon. The glass is the same material as the mounting surface of the microelectromechanical system (MEMS) sensors. The silicon makes an excellent isolator, being very elastic and easy to form into complex shapes. The two materials of the isolator are joined using an anodic bond. The construction of the isolator can be specific to different types of MEMS sensors, making the most of their geometry to reduce overall volume.

Abstract: A method of edge protecting bonded semiconductor wafers. A second semiconductor wafer and a first semiconductor wafer are attached by a bonding layer/interface and the second semiconductor wafer undergoes a thinning process. As a part of the thinning process, a first protective layer is applied to the edges of the second and first semiconductor wafers. A third semiconductor wafer is attached to the second semiconductor wafer by a bonding layer/interface and the third semiconductor wafer undergoes a thinning process. As a part of the thinning process, a second protective layer is applied to the edges of the third semiconductor wafer and over the first protective layer. The first, second and third semiconductor wafers form a wafer stack. The wafer stack is diced into a plurality of 3D chips while maintaining the first and second protective layers.

Abstract: A method of repairing a defective pixel in a display apparatus that includes forming an insulating layer to cover the plurality of second signal wires, cutting both sides of a region of the corresponding second signal wire of the defective pixel and the insulating layer to form both sides of a cut region, forming contact holes adjacent to the both sides of the cut region, respectively, such that an upper portion of the corresponding second signal wire is exposed, forming a repair metal layer on the insulating layer to contact the contact holes and the second signal wire, and forming a repair insulating layer to cover the repair metal layer.

Abstract: An array of bonding pads including a set of reactive materials is provided on a first substrate. The set of reactive materials is selected to be capable of ignition by magnetic heating induced by time-dependent magnetic field. The magnetic heating can be eddy current heating, hysteresis heating, and/or heating by magnetic relaxation processes. An array of solder balls on a second substrate is brought to contact with the array of bonding pads. A reaction is initiated in the set of magnetic materials by an applied magnetic field. Rapid release of heat during a resulting reaction of the set of reactive materials to form a reacted material melts the solder balls and provides boding between the first substrate and the second substrate. Since the magnetic heating can be localized, the heating and warpage of the substrate can be minimized during the bonding process.

Abstract: Presented is a method for producing an optoelectronic component. The method includes separating a semiconductor layer based on a III-V-compound semiconductor material from a substrate by irradiation with a laser beam having a plateau-like spatial beam profile, where individual regions of the semiconductor layer are irradiated successively.

Abstract: A method is disclosed for depositing multiple seed layers for metallic interconnects over a substrate, the substrate includes a patterned insulating layer which comprises an opening surrounded by a field, said opening has sidewalls and top corners, and the method including: depositing a continuous seed layer over the sidewalls, using a first set of deposition parameters; and depositing another seed layer over the substrate, including inside the opening and over a portion of said field, using a second set of deposition parameters, wherein: the second set of deposition parameters includes one deposition parameter which is different from any parameters in the first set, or whose value is different in the first and second sets; the continuous seed layer has a thickness in a range from about 20 ? to not more than 250 ? over the field; and the combined seed layers leave sufficient room for electroplating inside the opening.

Abstract: Semiconductor structures and methods of fabrication are provided. One semiconductor structure includes a substrate, a semiconductor device layer supported by the substrate, and one or more buried through substrate vias (TSVs) disposed at least partially within the substrate. The buried through substrate via(s) is buried within the semiconductor substrate, and terminates below the semiconductor device layer of the semiconductor structure, and the semiconductor device layer extends over the buried through substrate via(s), thereby providing the buried through substrate via(s) without consuming space within the semiconductor device layer. A dielectric layer may be disposed between the substrate and the semiconductor device layer, with the TSV(s) terminating at a first end within the dielectric layer. Alternatively, the semiconductor device layer may be an epitaxially-grown layer extending over the TSV(s).

Abstract: The present invention concerns a method for bonding a first substrate having a first surface to a second substrate having a second surface. This method includes the steps of holding the first substrate by at least two support points, positioning the first substrate and the second substrate so that the first surface and the second surface face each other, deforming the first substrate by applying between at least one pressure point and the two support points a strain toward the second substrate, bringing the deformed first surface and the second surface into contact, and progressively releasing the strain to facilitate bonding of the substrates while minimizing or avoiding the trapping of air bubbles between the substrates.

Abstract: Presented is a method for producing an optoelectronic component. The method includes separating a semiconductor layer based on a III-V-compound semiconductor material from a substrate by irradiation with a laser beam having a plateau-like spatial beam profile, where individual regions of the semiconductor layer are irradiated successively.

Abstract: A method for the direct bonding of a first wafer having an intrinsic curvature before bonding to a second wafer having an intrinsic curvature before bonding, at least one of the two wafers including at least one series of microcomponents. The method includes bringing the two wafers into contact with each other so as to initiate the propagation of a bonding wave therebetween while imposing a predefined bonding curvature in the form of a paraboloid of revolution on one of the two wafers depending at least upon the intrinsic curvature before bonding of the wafer that includes the microcomponents, with the other wafer being free to conform to the predefined bonding curvature.

Abstract: A sensor and method for fabricating a sensor is disclosed that in one embodiment bonds an etched semiconductor substrate wafer to an etched first device wafer comprising a silicon on insulator wafer which is then bonded to a second device wafer comprising a silicon on insulator wafer to create a vented, suspended structure, the flexure of which is sensed by an embedded sensing element to measure differential pressure. In one embodiment, interconnect channels embedded in the sensor facilitate streamlined packaging of the device while accommodating interconnectivity with other devices.

Abstract: A method for fabricating a semiconductor device, according to the present invention includes the steps of: preparing an SOI substrate, which comprises a semiconductor supporting layer, an oxide layer formed on the semiconductor supporting layer and an SOI layer formed on the oxide layer; forming a semiconductor device on the SOI layer; forming a passivation layer over the SOI substrate, the passivation layer allowing a UV light to pass through it; and applying a UV light to the SOI substrate after the step of forming the semiconductor device is completed.

Abstract: A seed layer having a predetermined pattern is formed on a side of one surface of a second substrate, and a ferroelectric layer is formed on the side of the one surface of the second substrate. A lower electrode is formed on the ferroelectric layer, and the lower electrode and a first substrate are bonded via a bonding layer. A laser beam with a predetermined wavelength is irradiated from a side of other surface of the second substrate to transfer a ferroelectric film, which overlaps with the seed layer, of the ferroelectric layer and the seed layer onto the side of said one surface of the first substrate. The laser beam passes through the second substrate, is reflected by the seed layer, and is absorbed by a second portion of the ferroelectric layer. The second portion does not overlap with the seed layer.

Abstract: An apparatus and method for liquid treatment of wafer-shaped articles comprises a process unit comprising a chuck for holding a wafer-shaped article in a predetermined orientation, and a liquid recovery system that receives used process liquid recovered from the process unit. The liquid recovery system supplies process liquid to a dispenser in the process unit. A supply of fresh process liquid supplies fresh process liquid to the liquid recovery system and also supplies fresh process liquid to a dispenser in the process unit while bypassing the liquid recovery system.

Abstract: A method is provided for bonding a semiconductor chip to a packaging substrate while minimizing the variation in the solder ball heights and controlling the stress in the solder balls and the stress in the packaging substrate. During the solder reflow, the warp of the packaging substrate, including the absolute warp, thermal warp, and substrate to substrate variations of the warp, is constrained at a minimal level by providing a clamping constraint to the packaging substrate. During cool down of the solder balls, the stresses and strains of the solder joints are maintained at levels that do not cause tear of the solder joints or breakage of the packaging substrate by removing the clamping constraint. Thus, the bonding process provides both uniform solder height with minimized solder non-wets and stress minimization of the solder balls and the packaging substrate.

Abstract: A light-emitting module includes a supporting element, a number of optoelectronic semiconductor components mounted on the supporting element for the generation of electromagnetic radiation, and a metallic connecting layer by means of which the optoelectronic semiconductor components are supplied with operating voltage. An insulation layer is arranged in a region of the optoelectronic semiconductor components between the supporting element and the metallic connecting layer. The metallic connecting layer forms a light shade for the optoelectronic semiconductor components, so that the electromagnetic radiation is only emitted in a specified direction.

Abstract: Silicon-on-insulator (SOI) structures and related methods of forming such structures. In one case, a method includes providing a silicon-on-insulator (SOI) handle substrate having: a substantially uniform resistivity profile along a depth of the handle substrate; and an interstitial oxygen (Oi) concentration of less than approximately 10 parts per million atoms (ppma). The method further includes counter-doping a surface region of the handle, causing the surface region to have a resistivity greater than approximately 3 kOhm-cm, and joining the surface region of the handle substrate with a donor wafer.

Abstract: Etched trenches in a bond material for die singulation, and associated systems and methods are disclosed. A method for solid state transducer device singulation in accordance with one embodiment includes forming a plurality of trenches by etching through a metallic bond material forming a bond between a carrier substrate and a plurality of the dies and singulating the carrier substrate along the trenches to separate the dies. In particular embodiments, the trenches extend into the carrier substrate. In further particular embodiments, the dies are at least partially encapsulated in a dielectric material.

Abstract: A method of fabricating a semiconductor device includes providing a substrate having a fin disposed thereon. A gate structure is formed on the fin. The gate structure interfaces at least two sides of the fin. A stress film is formed on the substrate including on the fin. The substrate including the stress film is annealed. The annealing provides a tensile strain in a channel region of the fin. For example, a compressive strain in the stress film may be transferred to form a tensile stress in the channel region of the fin.